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https://github.com/a2-4am/4cade.git
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83 lines
2.7 KiB
Plaintext
83 lines
2.7 KiB
Plaintext
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;license:MIT
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;(c) 2017-2020 by qkumba/4am/John Brooks
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!cpu 6502
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!to "build/FX/DHGR.FIZZLE2BIT",plain
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*=$6000
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addrs = $6100 ; [256 bytes, page-aligned, does not need to be duplicated to auxmem]
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copymasks = $6200 ; [256 bytes, page-aligned, duplicated in auxmem]
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ldx #(end-start) ; copy LFSR code to zero page
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- lda start-1, x
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sta $FF, x
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dex
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bne -
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-- ldy #$40 ; create identical copymask tables in main and aux memory
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ora #%10000000
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- sta copymasks, x
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sta $C005
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sta copymasks, x
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sta $C004
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inx
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dey
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bne -
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asl
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asl
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bne --
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clc
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-- ldy #$20 ; create address lookup table (main memory only)
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tya
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- sta addrs, x
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eor #$80
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sta addrs+1, x
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eor #$80
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adc #1
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inx
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inx
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dey
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bne -
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txa
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bne --
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jmp loop ; exit via LFSR code on zero page
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start
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!pseudopc 0 {
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; in: X,Y=0
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!byte %00000011
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loop txa
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loop1 eor #$B4 ; LFSR form 0xB400 with period 65535
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tax ; X is LFSR high byte, Y is LFSR low byte
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loop2 lda addrs, x ; which means X is the index into the base address lookup table
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bpl + ; and Y is the offset from the base address
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and #$7F ; which works out well with the available addressing modes
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sta $C003 ; (half the addresses have their high bit set, which we strip and
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sta $C005 ; use as an indicator to switch to auxmem)
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+ sta <dst+2
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eor #$60
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sta <src+2
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lda (<dst+1), y
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src eor $FD00, y ; merge source and destination bits
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and copymasks, x ; isolate the bits to replace, zero the rest
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eor (<dst+1), y ; unmerge source and destination bits, leaves 'to keep' destination bits intact
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dst sta $FD00, y ; write the result
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sta $C002
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sta $C004
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txa
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lsr
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tax
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tya
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ror
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tay
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bcc loop2 ; C modified by ror
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bne loop ; Z modified by tay
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lda $C000
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bmi exit
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txa
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bne loop1
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lda $4000 ; last lousy byte (because LFSR never hits 0)
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sta $2000
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exit rts
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}
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end
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