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https://github.com/a2-4am/4cade.git
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Merge branch 'master' of https://github.com/a2-4am/4cade
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commit
10937b140f
@ -32,7 +32,7 @@ Has64K
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; out: C set if 128K detected
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; C clear if 128K not detected
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; all other flags and registers clobbered
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; zp $80-$9F clobbered
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; zp $80-$D2 clobbered
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; ROM in memory (not LC RAM bank)
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;
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; adapted from "Prince of Persia" by Jordan Mechner
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@ -50,6 +50,9 @@ Has128K
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ldx #@checklen
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- lda @checker,x
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sta $80,x
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sta SETAUXZP ; also copy to aux zp in case we pass
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sta $80,x
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sta CLRAUXZP
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dex
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bpl -
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jmp $80 ; check if auxmem actually works
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@ -57,21 +60,41 @@ Has128K
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lda #$EE
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sta WRITEAUXMEM
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sta READAUXMEM
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sta $0C00
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@x1 sta $0C00
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sta $0800
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lda $0C00
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@x2 lda $0C00
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cmp #$EE
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bne @no
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asl $0C00
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@x3 asl $0C00
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asl
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cmp $0C00
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@x4 cmp $0C00
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bne @no
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cmp $0800
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bne @yes
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@no clc
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+HIDE_NEXT_BYTE
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beq @no
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; now test the rest of memory, and bank 2 of LC
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clc
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lda <($80+(@x1-@checker)+2)
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adc #$20
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bcs @finish
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@x5 sta <($80+(@x1-@checker)+2)
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sta <($80+(@x2-@checker)+2)
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sta <($80+(@x3-@checker)+2)
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sta <($80+(@x4-@checker)+2)
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cmp #$CC
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bne @checker
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sta SETAUXZP
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+READ_RAM2_WRITE_RAM2
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lda #$D0
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bne @x5 ; always
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@yes sec
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+HIDE_NEXT_BYTE
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@no clc
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@finish sta WRITEMAINMEM
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sta READMAINMEM
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sta CLRAUXZP
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+READ_ROM_NO_WRITE
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rts
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@checklen=*-@checker
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