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better IIc+ support
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@ -228,45 +228,72 @@ build_addon
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;-----------------------------------------------------------
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; Function #1: Apple IIc+
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iicplus
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nop
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nop
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nop
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nop
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end_iicplus
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iicplus !pseudopc DisableAccelerator {
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; Set //c+ speed. Uses the horrible firmware in case other
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; code works "by the book", that is can check and set
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; whether the accelerator is enabled.
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; The //c+ is otherwise Zip compatible.
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; This code cannot run from either LC or stack,
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; so it's set off and left off. Sorry IIc+ users.
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lda #$60
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sta DisableAccelerator+3
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; This code cannot run from LC, and *must* bank in ROM.
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; CGGA assumes that ROM is already banked in.
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lda #2 ; disable accelerator entry point
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; !byte $2C ; BIT <ABSOLUTE>, hide next lda #
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; lda #1 ; enable accelerator entry point
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!byte $2C ; BIT <ABSOLUTE>, hide next lda #
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lda #1 ; enable accelerator entry point
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sta @pokery+1 ; action after CGGA_UNLOCK
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; cgga calls save X and Y regs but sets $0 to 0
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; (this will get a laugh from C programmers)
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ldx $0
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!cpu 65c02
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phx
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!cpu 6502
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php
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sei ; timing sensitive
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pha ; action after CGGA_UNLOCK
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jsr @jiggerypokery
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plp ; restore interrupt state
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pla
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sta $0
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rts
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@jiggerypokery
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tsx
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ldy #(@endpokery - @jiggery)
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@copyiicp
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lda @jiggery-1,y
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pha
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dey
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bne @copyiicp
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txa
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tsx
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iny
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!cpu 65c02
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phy
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phx
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!cpu 6502
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tax
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rts
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@jiggery
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+READ_ROM_NO_WRITE
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lda #CGGA_UNLOCK ; unlock to change
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pha
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jsr cgga
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@pokery
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lda #$D1 ; SMC
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pha
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jsr cgga ; disable/enable
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lda #CGGA_LOCK ; should lock after a change
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pha
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jsr cgga
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plp ; restore interrupt state
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stx $0
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jsr cgga ; reads parm from stack, must JSR
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txs
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+READ_RAM2_WRITE_RAM2
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rts
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@endpokery
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}
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end_iicplus
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; Function #2: IIgs, Laser 128EX, or IIe card
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;; setspeed - set 1Mhz with AND and fast with OR
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