VBL between mode-switches, blank aux text

This commit is contained in:
Peter Ferrie 2020-03-17 15:30:20 -07:00
parent 85a8005959
commit a485733df2
29 changed files with 132 additions and 109 deletions

View File

@ -111,6 +111,8 @@ ResetVector ; 6 bytes, copied to $100
!source "src/glue.decompress.a"
!source "src/ui.common.a"
!source "src/hw.vbl.a"
; add new files above here so ui.wait stays last
!source "src/ui.attract.dhgr.a" ; \-- execution falls through
@ -186,4 +188,9 @@ EvenLasterMover
!warn "LCRAM2 ends at ", LCRAM2_END - 1
!warn "RELBASE = ", $10000 - (LastMover - FirstMover)
}
} else {
!if (iWaitForVBL != WaitForVBL) or (iUnwaitForVBL != UnwaitForVBL) {
!error "WaitForVBL at ", WaitForVBL
!error "UnwaitForVBL at ", UnwaitForVBL
}
}

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@ -188,6 +188,10 @@
dex
bpl -
+READ_ROM_WRITE_RAM2
jsr BuildVBLFunction
+READ_RAM2_WRITE_RAM2
jsr DisableAccelerator ; cycle counting in Mockingboard detection requires 1MHz
+READ_ROM_WRITE_RAM2
@ -323,6 +327,7 @@ PrintAsDecimal
}
!source "src/hw.accel.a"
!source "src/hw.vbl.init.a"
!source "src/parse.games.a"
OneTimeSetup

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@ -6,10 +6,10 @@
; YE OLDE GRAND UNIFIED MEMORY MAP
;
; LC RAM BANK 1
; D000..E8A7 - persistent data structures (per-game cheat categories,
; D000..E8C9 - persistent data structures (per-game cheat categories,
; gGlobalPrefsStore, gGamesListStore)
; ...unused...
; EB7F..FFF9 - main program code
; EB2C..FFF9 - main program code
; FFFA..FFFF - NMI, reset, IRQ vectors
;
; LC RAM BANK 2
@ -134,3 +134,7 @@ IS_IIGS = %00100000 ; /!\ do not use this to gate SHR, use SUPP
HAS_VIDHD = %00010000
SUPPORTS_SHR = %00110000
CHEATS_ENABLED = %00001000
; VBL functions
WaitForVBL = $FCB2
UnwaitForVBL = $FCC7

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@ -11,6 +11,7 @@ col = $fe
counter = $ff
!source "src/fx/macros.a"
!source "src/constants.a"
lda #(40+12)
sta counter
@ -87,4 +88,3 @@ copymasks4
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

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@ -14,6 +14,7 @@ hgrlo = $8000
hgr1hi = $80C0
!source "src/fx/macros.a"
!source "src/constants.a"
+BUILD_HGR_LOOKUP_TABLES hgrlo, hgr1hi
@ -194,4 +195,3 @@ copymasks4
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

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@ -5,6 +5,8 @@
!to "build/FX/CASCADE",plain
*=$6000
!source "src/constants.a"
ldx #191
--- jsr WaitForVBL
@ -99,5 +101,3 @@ vposn txa
ora $e6
sta $27
rts
!source "src/fx/hw.vbl.a"

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@ -17,6 +17,7 @@ col1 = $fe
col2 = $ff
!source "src/fx/macros.a"
!source "src/constants.a"
lda #44
sta skipcounter
@ -122,4 +123,3 @@ copymasks2
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

View File

@ -10,6 +10,7 @@ col = $fe
counter = $ff
!source "src/fx/macros.a"
!source "src/constants.a"
+SWITCH_TO_MASKS copymasks
@ -59,4 +60,3 @@ copymasks
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

View File

@ -10,6 +10,7 @@ col = $fe
counter = $ff
!source "src/fx/macros.a"
!source "src/constants.a"
+SWITCH_TO_MASKS copymasks
@ -60,4 +61,3 @@ copymasks
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

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@ -10,6 +10,7 @@ col = $fe
counter = $ff
!source "src/fx/macros.a"
!source "src/constants.a"
+SWITCH_TO_MASKS copymasks
@ -61,4 +62,3 @@ copymasks
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

View File

@ -11,6 +11,7 @@ col = $fe
counter = $ff
!source "src/fx/macros.a"
!source "src/constants.a"
lda #32
sta counter
@ -145,4 +146,3 @@ copymasks4
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

View File

@ -11,6 +11,7 @@ row = $fe
col = $ff
!source "src/fx/macros.a"
!source "src/constants.a"
lda #5
sta maskindex
@ -218,4 +219,3 @@ copymask_odd6
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

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@ -9,6 +9,8 @@ maskindex = $fd
row = $fe
col = $ff
!source "src/constants.a"
@jump
jmp @copy ; skip clear the first time
@ -110,4 +112,3 @@ copymasks
!byte $FF,$BF,$9F,$8F,$87,$83,$81
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

View File

@ -10,6 +10,8 @@ row = $fd
col1 = $fe
col2 = $ff
!source "src/constants.a"
lda #0
sta col1
lda #39
@ -93,4 +95,3 @@ copymasks2
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

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@ -10,6 +10,7 @@ row = $fe
col = $ff
!source "src/fx/macros.a"
!source "src/constants.a"
lda #0
sta col
@ -106,4 +107,3 @@ copymask_odd
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

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@ -10,6 +10,7 @@ row = $fe
col = $ff
!source "src/fx/macros.a"
!source "src/constants.a"
lda #0
sta col
@ -106,4 +107,3 @@ copymask_odd
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

View File

@ -9,6 +9,8 @@ maskindex = $fd
row = $fe
col = $ff
!source "src/constants.a"
lda #$00
sta col
@colloop
@ -61,4 +63,3 @@ copymasks
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

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@ -11,6 +11,7 @@ col = $fe
counter = $ff
!source "src/fx/macros.a"
!source "src/constants.a"
lda #(40+24+7-1) ; columns + rows + blocks per row - 1
sta counter
@ -200,4 +201,3 @@ copymasks6
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

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@ -11,6 +11,7 @@ col = $fe
counter = $ff
!source "src/fx/macros.a"
!source "src/constants.a"
lda #(40+7-1) ; columns + blocks per row - 1
sta counter
@ -195,4 +196,3 @@ copymasks6
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

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@ -11,6 +11,7 @@ col = $fe
counter = $ff
!source "src/fx/macros.a"
!source "src/constants.a"
lda #(40+7-1) ; columns + blocks per row - 1
sta counter
@ -207,4 +208,3 @@ copymasks6
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

View File

@ -9,6 +9,7 @@ maskindex = $fc
row = $fd
!source "src/fx/macros.a"
!source "src/constants.a"
lda #$FA
sta row
@ -148,4 +149,3 @@ masks
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

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@ -9,6 +9,7 @@ maskindex = $fc
row = $fd
!source "src/fx/macros.a"
!source "src/constants.a"
lda #$FA
sta row
@ -156,4 +157,3 @@ masks
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

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@ -9,6 +9,7 @@ maskindex = $fc
row = $fd
!source "src/fx/macros.a"
!source "src/constants.a"
lda #$FA
sta row
@ -159,4 +160,3 @@ masks
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

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@ -5,6 +5,8 @@
!to "build/FX/SPIRAL",plain
*=$6000
!source "src/constants.a"
lda #$27
sta $FB
lda #$17

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@ -6,6 +6,7 @@
*=$6000
!source "src/fx/macros.a"
!source "src/constants.a"
col1 = $FE
col2 = $FF
@ -123,4 +124,3 @@ row2 = $FF
!source "src/wait.a"
!source "src/fx/fx.hgr.common.a"
!source "src/fx/hw.vbl.a"

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@ -1,84 +0,0 @@
;license:MIT
;(c) 2019 by 4am
;
; Public functions:
; - WaitForVBL
;
!source "src/fx/macros.a"
!source "src/constants.a"
WaitForVBL
bit $FDFD ; SMC
pha
tya
pha
+READ_ROM_NO_WRITE
lda $FBB3
cmp #$06
bne @nop
lda $FBC0
beq @iic
sec
jsr $FE1F ; check for IIgs
bcs @NotGS
lda #$30
sta patch_VBL_iigs1
lda #$10
sta patch_VBL_iigs2
@NotGS
+LDADDR WaitForVBL_iie
bne +
@iic
lda #$EA
sta UnwaitForVBL
+LDADDR WaitForVBL_iic
bne +
@nop
+LDADDR WaitForVBL_nop
+
+STAY WaitForVBL+1
lda #$4C ; JMP opcode
sta WaitForVBL
+READ_RAM1_WRITE_RAM1
pla
tay
pla
jmp WaitForVBL
WaitForVBL_nop ; II/II+ have no easy VBL
rts
WaitForVBL_iie ; IIe/IIgs have a relatively sane VBL
; but it's reversed between the two
; so we default to IIe, and patch in
; the reverse case if it's a IIGS.
- bit $c019
patch_VBL_iigs1
bpl -
- bit $c019
patch_VBL_iigs2
bmi -
rts
WaitForVBL_iic ; IIc is special
sei
sta $C07F ; enable access to VBL register
sta $C05B ; enable VBL polling
sta $C07E ; disable access to VBL register
- bit $C019
bpl -
lda $C070 ; $c019 bit 7 is sticky, reset it
rts
UnwaitForVBL
rts ; SMC on IIc
- bit $C019
bpl -
lda $C070 ; $c019 bit 7 is sticky, reset it
sta $C07F ; enable access to VBL register
sta $C05A ; disable VBL polling
sta $C07E ; disable access to VBL register
rts

35
src/hw.vbl.a Normal file
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@ -0,0 +1,35 @@
;license:MIT
;(c) 2020 by qkumba
;
; Functions to enable and disable VBL polling on various
; Apple II models
iWaitForVBL
sei ; IIc is special
sta $C07F ; enable access to VBL register
sta $C05B ; enable VBL polling
sta $C07E ; disable access to VBL register
WaitForVBL_iie ; IIe/IIgs have a relatively sane VBL
; but it's reversed between the two
; so we default to IIe, and patch in
; the reverse case if it's a IIGS.
- bit $C019
patch_VBL_iigs1
bpl -
patch_VBL_iic
- lda $C019 ; $c019 bit 7 is sticky, reset it (SMC->#$70 for IIc)
patch_VBL_iigs2
bmi -
WaitForVBL_nop ; II/II+ have no easy VBL
rts
iUnwaitForVBL
rts ; SMC on IIc
- bit $C019
bpl -
lda $C070 ; $c019 bit 7 is sticky, reset it
sta $C07F ; enable access to VBL register
sta $C05A ; disable VBL polling
sta $C07E ; disable access to VBL register
cli
rts

43
src/hw.vbl.init.a Normal file
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@ -0,0 +1,43 @@
;license:MIT
;(c) 2020 by qkumba
;
; Identify platform and construct appropriate VBL routine
romid = $FBB3
; $38=][, $EA=][+, $06=//e compatible
ROMID_IIECOMPAT = 6
romid_ec = $FBC0
; $EA=//e original, $E0=//e enhanced, $E1=//e EDM, $00=//c
; IIGS
idroutine = $FE1F ; SEC, JSR $FE1F, BCS notgs
BuildVBLFunction
lda #$60
ldx romid
cpx #ROMID_IIECOMPAT
bne @build_none ; not a //e
lda romid_ec
beq @build_iic ; //c family
sec
jsr idroutine ; check for IIgs
bcs @NotGS
lda #$30
sta patch_VBL_iigs1
lda #$10
sta patch_VBL_iigs2
@NotGS
lda #<WaitForVBL_iie
sta WaitForVBL+1
lda #>WaitForVBL_iie
sta WaitForVBL+2
lda #$4C
@build_none
sta WaitForVBL
rts
@build_iic
lda #$70
sta patch_VBL_iic+1
lda #$EA
sta UnwaitForVBL
rts

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@ -40,12 +40,18 @@ Home
stx PageTo+2
lda #$A0 ; clear text screen page 1
jsr ClearGR
sta WRITEAUXMEM
ldx #$04
stx PageTo+2
jsr ClearGR
sta WRITEMAINMEM
jsr WaitForVBL
sta DHIRESOFF ; get out of DHGR mode
sta CLR80VID ; /!\ order of operations matters for RGB card
lda PAGE1
lda TEXTMODE
rts
jmp UnwaitForVBL
;------------------------------------------------------------------------------
; BlankDHGR
@ -68,6 +74,7 @@ BlankDHGR
; we do that twice because the mode register is two bits wide
; we need mode 00 for colour
jsr WaitForVBL
sta SET80VID
sta DHIRESON
sta DHIRESOFF
@ -79,6 +86,7 @@ BlankDHGR
lda #1
sta OffscreenPage
sta gMachineInDHGRMode
jsr UnwaitForVBL
jmp HGRMode
;------------------------------------------------------------------------------