mirror of
https://github.com/a2-4am/4cade.git
synced 2024-11-27 08:50:01 +00:00
VBL between mode-switches, blank aux text
This commit is contained in:
parent
85a8005959
commit
a485733df2
@ -111,6 +111,8 @@ ResetVector ; 6 bytes, copied to $100
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!source "src/glue.decompress.a"
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!source "src/ui.common.a"
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!source "src/hw.vbl.a"
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; add new files above here so ui.wait stays last
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!source "src/ui.attract.dhgr.a" ; \-- execution falls through
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@ -186,4 +188,9 @@ EvenLasterMover
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!warn "LCRAM2 ends at ", LCRAM2_END - 1
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!warn "RELBASE = ", $10000 - (LastMover - FirstMover)
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}
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} else {
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!if (iWaitForVBL != WaitForVBL) or (iUnwaitForVBL != UnwaitForVBL) {
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!error "WaitForVBL at ", WaitForVBL
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!error "UnwaitForVBL at ", UnwaitForVBL
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}
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}
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@ -188,6 +188,10 @@
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dex
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bpl -
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+READ_ROM_WRITE_RAM2
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jsr BuildVBLFunction
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+READ_RAM2_WRITE_RAM2
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jsr DisableAccelerator ; cycle counting in Mockingboard detection requires 1MHz
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+READ_ROM_WRITE_RAM2
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@ -323,6 +327,7 @@ PrintAsDecimal
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}
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!source "src/hw.accel.a"
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!source "src/hw.vbl.init.a"
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!source "src/parse.games.a"
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OneTimeSetup
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@ -6,10 +6,10 @@
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; YE OLDE GRAND UNIFIED MEMORY MAP
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;
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; LC RAM BANK 1
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; D000..E8A7 - persistent data structures (per-game cheat categories,
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; D000..E8C9 - persistent data structures (per-game cheat categories,
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; gGlobalPrefsStore, gGamesListStore)
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; ...unused...
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; EB7F..FFF9 - main program code
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; EB2C..FFF9 - main program code
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; FFFA..FFFF - NMI, reset, IRQ vectors
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;
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; LC RAM BANK 2
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@ -134,3 +134,7 @@ IS_IIGS = %00100000 ; /!\ do not use this to gate SHR, use SUPP
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HAS_VIDHD = %00010000
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SUPPORTS_SHR = %00110000
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CHEATS_ENABLED = %00001000
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; VBL functions
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WaitForVBL = $FCB2
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UnwaitForVBL = $FCC7
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@ -11,6 +11,7 @@ col = $fe
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counter = $ff
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!source "src/fx/macros.a"
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!source "src/constants.a"
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lda #(40+12)
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sta counter
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@ -87,4 +88,3 @@ copymasks4
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -14,6 +14,7 @@ hgrlo = $8000
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hgr1hi = $80C0
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!source "src/fx/macros.a"
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!source "src/constants.a"
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+BUILD_HGR_LOOKUP_TABLES hgrlo, hgr1hi
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@ -194,4 +195,3 @@ copymasks4
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -5,6 +5,8 @@
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!to "build/FX/CASCADE",plain
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*=$6000
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!source "src/constants.a"
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ldx #191
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--- jsr WaitForVBL
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@ -99,5 +101,3 @@ vposn txa
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ora $e6
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sta $27
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rts
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!source "src/fx/hw.vbl.a"
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@ -17,6 +17,7 @@ col1 = $fe
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col2 = $ff
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!source "src/fx/macros.a"
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!source "src/constants.a"
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lda #44
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sta skipcounter
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@ -122,4 +123,3 @@ copymasks2
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -10,6 +10,7 @@ col = $fe
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counter = $ff
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!source "src/fx/macros.a"
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!source "src/constants.a"
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+SWITCH_TO_MASKS copymasks
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@ -59,4 +60,3 @@ copymasks
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -10,6 +10,7 @@ col = $fe
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counter = $ff
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!source "src/fx/macros.a"
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!source "src/constants.a"
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+SWITCH_TO_MASKS copymasks
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@ -60,4 +61,3 @@ copymasks
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -10,6 +10,7 @@ col = $fe
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counter = $ff
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!source "src/fx/macros.a"
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!source "src/constants.a"
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+SWITCH_TO_MASKS copymasks
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@ -61,4 +62,3 @@ copymasks
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -11,6 +11,7 @@ col = $fe
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counter = $ff
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!source "src/fx/macros.a"
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!source "src/constants.a"
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lda #32
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sta counter
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@ -145,4 +146,3 @@ copymasks4
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -11,6 +11,7 @@ row = $fe
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col = $ff
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!source "src/fx/macros.a"
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!source "src/constants.a"
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lda #5
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sta maskindex
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@ -218,4 +219,3 @@ copymask_odd6
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -9,6 +9,8 @@ maskindex = $fd
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row = $fe
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col = $ff
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!source "src/constants.a"
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@jump
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jmp @copy ; skip clear the first time
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@ -110,4 +112,3 @@ copymasks
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!byte $FF,$BF,$9F,$8F,$87,$83,$81
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -10,6 +10,8 @@ row = $fd
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col1 = $fe
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col2 = $ff
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!source "src/constants.a"
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lda #0
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sta col1
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lda #39
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@ -93,4 +95,3 @@ copymasks2
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -10,6 +10,7 @@ row = $fe
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col = $ff
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!source "src/fx/macros.a"
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!source "src/constants.a"
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lda #0
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sta col
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@ -106,4 +107,3 @@ copymask_odd
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -10,6 +10,7 @@ row = $fe
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col = $ff
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!source "src/fx/macros.a"
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!source "src/constants.a"
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lda #0
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sta col
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@ -106,4 +107,3 @@ copymask_odd
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -9,6 +9,8 @@ maskindex = $fd
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row = $fe
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col = $ff
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!source "src/constants.a"
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lda #$00
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sta col
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@colloop
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@ -61,4 +63,3 @@ copymasks
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -11,6 +11,7 @@ col = $fe
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counter = $ff
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!source "src/fx/macros.a"
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!source "src/constants.a"
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lda #(40+24+7-1) ; columns + rows + blocks per row - 1
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sta counter
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@ -200,4 +201,3 @@ copymasks6
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -11,6 +11,7 @@ col = $fe
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counter = $ff
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!source "src/fx/macros.a"
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!source "src/constants.a"
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lda #(40+7-1) ; columns + blocks per row - 1
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sta counter
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@ -195,4 +196,3 @@ copymasks6
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -11,6 +11,7 @@ col = $fe
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counter = $ff
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!source "src/fx/macros.a"
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!source "src/constants.a"
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lda #(40+7-1) ; columns + blocks per row - 1
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sta counter
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@ -207,4 +208,3 @@ copymasks6
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -9,6 +9,7 @@ maskindex = $fc
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row = $fd
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!source "src/fx/macros.a"
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!source "src/constants.a"
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lda #$FA
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sta row
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@ -148,4 +149,3 @@ masks
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -9,6 +9,7 @@ maskindex = $fc
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row = $fd
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!source "src/fx/macros.a"
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!source "src/constants.a"
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lda #$FA
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sta row
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@ -156,4 +157,3 @@ masks
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -9,6 +9,7 @@ maskindex = $fc
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row = $fd
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!source "src/fx/macros.a"
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!source "src/constants.a"
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lda #$FA
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sta row
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@ -159,4 +160,3 @@ masks
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -5,6 +5,8 @@
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!to "build/FX/SPIRAL",plain
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*=$6000
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!source "src/constants.a"
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lda #$27
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sta $FB
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lda #$17
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@ -6,6 +6,7 @@
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*=$6000
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!source "src/fx/macros.a"
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!source "src/constants.a"
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col1 = $FE
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col2 = $FF
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@ -123,4 +124,3 @@ row2 = $FF
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!source "src/wait.a"
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!source "src/fx/fx.hgr.common.a"
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!source "src/fx/hw.vbl.a"
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@ -1,84 +0,0 @@
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;license:MIT
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;(c) 2019 by 4am
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;
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; Public functions:
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; - WaitForVBL
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;
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!source "src/fx/macros.a"
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!source "src/constants.a"
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WaitForVBL
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bit $FDFD ; SMC
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pha
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tya
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pha
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+READ_ROM_NO_WRITE
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lda $FBB3
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cmp #$06
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bne @nop
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lda $FBC0
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beq @iic
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sec
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jsr $FE1F ; check for IIgs
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bcs @NotGS
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lda #$30
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sta patch_VBL_iigs1
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lda #$10
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sta patch_VBL_iigs2
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@NotGS
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+LDADDR WaitForVBL_iie
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bne +
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@iic
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lda #$EA
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sta UnwaitForVBL
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+LDADDR WaitForVBL_iic
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bne +
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@nop
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+LDADDR WaitForVBL_nop
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+
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+STAY WaitForVBL+1
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lda #$4C ; JMP opcode
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sta WaitForVBL
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+READ_RAM1_WRITE_RAM1
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pla
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tay
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pla
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jmp WaitForVBL
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WaitForVBL_nop ; II/II+ have no easy VBL
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rts
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WaitForVBL_iie ; IIe/IIgs have a relatively sane VBL
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; but it's reversed between the two
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; so we default to IIe, and patch in
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; the reverse case if it's a IIGS.
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- bit $c019
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patch_VBL_iigs1
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bpl -
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- bit $c019
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patch_VBL_iigs2
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bmi -
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rts
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WaitForVBL_iic ; IIc is special
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sei
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sta $C07F ; enable access to VBL register
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sta $C05B ; enable VBL polling
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sta $C07E ; disable access to VBL register
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- bit $C019
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bpl -
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lda $C070 ; $c019 bit 7 is sticky, reset it
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rts
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UnwaitForVBL
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rts ; SMC on IIc
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- bit $C019
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bpl -
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lda $C070 ; $c019 bit 7 is sticky, reset it
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sta $C07F ; enable access to VBL register
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sta $C05A ; disable VBL polling
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sta $C07E ; disable access to VBL register
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rts
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35
src/hw.vbl.a
Normal file
35
src/hw.vbl.a
Normal file
@ -0,0 +1,35 @@
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;license:MIT
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;(c) 2020 by qkumba
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;
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; Functions to enable and disable VBL polling on various
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; Apple II models
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iWaitForVBL
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sei ; IIc is special
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sta $C07F ; enable access to VBL register
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sta $C05B ; enable VBL polling
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sta $C07E ; disable access to VBL register
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WaitForVBL_iie ; IIe/IIgs have a relatively sane VBL
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; but it's reversed between the two
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; so we default to IIe, and patch in
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; the reverse case if it's a IIGS.
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- bit $C019
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patch_VBL_iigs1
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bpl -
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patch_VBL_iic
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- lda $C019 ; $c019 bit 7 is sticky, reset it (SMC->#$70 for IIc)
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patch_VBL_iigs2
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bmi -
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WaitForVBL_nop ; II/II+ have no easy VBL
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rts
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iUnwaitForVBL
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rts ; SMC on IIc
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- bit $C019
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bpl -
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lda $C070 ; $c019 bit 7 is sticky, reset it
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sta $C07F ; enable access to VBL register
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sta $C05A ; disable VBL polling
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sta $C07E ; disable access to VBL register
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cli
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rts
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43
src/hw.vbl.init.a
Normal file
43
src/hw.vbl.init.a
Normal file
@ -0,0 +1,43 @@
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;license:MIT
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;(c) 2020 by qkumba
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;
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; Identify platform and construct appropriate VBL routine
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romid = $FBB3
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; $38=][, $EA=][+, $06=//e compatible
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ROMID_IIECOMPAT = 6
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romid_ec = $FBC0
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; $EA=//e original, $E0=//e enhanced, $E1=//e EDM, $00=//c
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; IIGS
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idroutine = $FE1F ; SEC, JSR $FE1F, BCS notgs
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BuildVBLFunction
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lda #$60
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ldx romid
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cpx #ROMID_IIECOMPAT
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bne @build_none ; not a //e
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lda romid_ec
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beq @build_iic ; //c family
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sec
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||||
jsr idroutine ; check for IIgs
|
||||
bcs @NotGS
|
||||
lda #$30
|
||||
sta patch_VBL_iigs1
|
||||
lda #$10
|
||||
sta patch_VBL_iigs2
|
||||
@NotGS
|
||||
lda #<WaitForVBL_iie
|
||||
sta WaitForVBL+1
|
||||
lda #>WaitForVBL_iie
|
||||
sta WaitForVBL+2
|
||||
lda #$4C
|
||||
@build_none
|
||||
sta WaitForVBL
|
||||
rts
|
||||
@build_iic
|
||||
lda #$70
|
||||
sta patch_VBL_iic+1
|
||||
lda #$EA
|
||||
sta UnwaitForVBL
|
||||
rts
|
@ -40,12 +40,18 @@ Home
|
||||
stx PageTo+2
|
||||
lda #$A0 ; clear text screen page 1
|
||||
jsr ClearGR
|
||||
sta WRITEAUXMEM
|
||||
ldx #$04
|
||||
stx PageTo+2
|
||||
jsr ClearGR
|
||||
sta WRITEMAINMEM
|
||||
|
||||
jsr WaitForVBL
|
||||
sta DHIRESOFF ; get out of DHGR mode
|
||||
sta CLR80VID ; /!\ order of operations matters for RGB card
|
||||
lda PAGE1
|
||||
lda TEXTMODE
|
||||
rts
|
||||
jmp UnwaitForVBL
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; BlankDHGR
|
||||
@ -68,6 +74,7 @@ BlankDHGR
|
||||
; we do that twice because the mode register is two bits wide
|
||||
; we need mode 00 for colour
|
||||
|
||||
jsr WaitForVBL
|
||||
sta SET80VID
|
||||
sta DHIRESON
|
||||
sta DHIRESOFF
|
||||
@ -79,6 +86,7 @@ BlankDHGR
|
||||
lda #1
|
||||
sta OffscreenPage
|
||||
sta gMachineInDHGRMode
|
||||
jsr UnwaitForVBL
|
||||
jmp HGRMode
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
|
Loading…
Reference in New Issue
Block a user