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shave some cycles (split aux branch, use 80STORE mode for 1-STA bank switching) [thanks John B.]

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4am 2020-11-22 21:46:22 -05:00
parent a3dc564852
commit d97e22805f
1 changed files with 40 additions and 14 deletions
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54
src/fx/fx.dhgr.fizzle.a
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@ -17,33 +17,39 @@ addrs=$C0 ; [$40 bytes]
bpl - bpl -
ldx #(end-start) ; copy LFSR code to zero page ldx #(end-start) ; copy LFSR code to zero page
- lda start-1, x - lda start-1, x
sta $0, x sta $FF, x
dex dex
bne - bne -
txa jmp copyaux
tay
pha
pha
rts
start start
!pseudopc 1 { !pseudopc 0 {
copyaux sta $C003 ; copy $4000/aux to $A000/main
ldx #$20
ldy #$00
a lda $4000, y
b sta $A000, y
iny
bne a
inc a+2
inc b+2
dex
bne a
sta $C002
sta $C001 ; 80STORE mode
; X,Y=0 on entry to LFSR
; in: X,Y=0 ; in: X,Y=0
loop txa loop txa
loop1 eor #$35 ; LFSR form 0x3500 with period 16383 loop1 eor #$35 ; LFSR form 0x3500 with period 16383
tax tax
loop2 lda addrs, x loop2 lda addrs, x
bpl + bmi aux
and #$7F sta $C054 ; switch $2000 access to main memory
sta $C003 sta <dst+2
sta $C005
+ sta <dst+2
eor #$60 eor #$60
sta <src+2 sta <src+2
src lda $FD00, y src lda $FD00, y
dst sta $FD00, y dst sta $FD00, y
sta $C002
sta $C004
txa txa
lsr lsr
tax tax
@ -58,6 +64,26 @@ dst sta $FD00, y
bne loop1 bne loop1
exit lda $4000 ; last lousy byte (because LFSR never hits 0) exit lda $4000 ; last lousy byte (because LFSR never hits 0)
sta $2000 sta $2000
sta $C000 ; 80STORE mode off
rts rts
aux sta $C055 ; switch $2000 access to aux memory (read/write!)
sta <auxsrc+2
eor #$80
sta <auxdst+2
auxsrc lda $FD00, y
auxdst sta $FD00, y
txa
lsr
tax
tya
ror
tay
bcc loop2
bne loop
lda $C000
bmi exit
txa
bne loop1
beq exit
} }
end end