diff --git a/AppleWin/source/CPU.cpp b/AppleWin/source/CPU.cpp
index ccdb71d9..89472485 100644
--- a/AppleWin/source/CPU.cpp
+++ b/AppleWin/source/CPU.cpp
@@ -4,7 +4,7 @@ AppleWin : An Apple //e emulator for Windows
 Copyright (C) 1994-1996, Michael O'Brien
 Copyright (C) 1999-2001, Oliver Schmidt
 Copyright (C) 2002-2005, Tom Charlesworth
-Copyright (C) 2006-2007, Tom Charlesworth, Michael Pohoreski
+Copyright (C) 2006-2010, Tom Charlesworth, Michael Pohoreski
 
 AppleWin is free software; you can redistribute it and/or modify
 it under the terms of the GNU General Public License as published by
@@ -139,607 +139,9 @@ static volatile UINT32 g_bmIRQ = 0;
 static volatile UINT32 g_bmNMI = 0;
 static volatile BOOL g_bNmiFlank = FALSE; // Positive going flank on NMI line
 
-/****************************************************************************
-*
-*  GENERAL PURPOSE MACROS
-*
-***/
+#include "cpu/cpu_general.inl"
 
-#define AF_TO_EF  flagc = (regs.ps & AF_CARRY);				    \
-		  flagn = (regs.ps & AF_SIGN);				    \
-		  flagv = (regs.ps & AF_OVERFLOW);			    \
-		  flagz = (regs.ps & AF_ZERO);
-#define EF_TO_AF  regs.ps = (regs.ps & ~(AF_CARRY | AF_SIGN |		    \
-					 AF_OVERFLOW | AF_ZERO))	    \
-			      | flagc 					    \
-			      | flagn					    \
-			      | (flagv ? AF_OVERFLOW : 0)		    \
-			      | (flagz ? AF_ZERO     : 0)		    \
-			      | AF_RESERVED | AF_BREAK;
-// CYC(a): This can be optimised, as only certain opcodes will affect uExtraCycles
-#define CYC(a)	 uExecutedCycles += (a)+uExtraCycles; g_nIrqCheckTimeout -= (a)+uExtraCycles;
-#define POP	 (*(mem+((regs.sp >= 0x1FF) ? (regs.sp = 0x100) : ++regs.sp)))
-#define PUSH(a)	 *(mem+regs.sp--) = (a);				    \
-		 if (regs.sp < 0x100)					    \
-		   regs.sp = 0x1FF;
-#define READ	 (							    \
-		    ((addr & 0xF000) == 0xC000)				    \
-		    ? IORead[(addr>>4) & 0xFF](regs.pc,addr,0,0,uExecutedCycles) \
-			: *(mem+addr)					    \
-		 )
-#define SETNZ(a) {							    \
-		   flagn = ((a) & 0x80);				    \
-		   flagz = !((a) & 0xFF);					    \
-		 }
-#define SETZ(a)	 flagz = !((a) & 0xFF);
-#define WRITE(a) {							    \
-		   memdirty[addr >> 8] = 0xFF;				    \
-		   LPBYTE page = memwrite[addr >> 8];		    \
-		   if (page)						    \
-		     *(page+(addr & 0xFF)) = (BYTE)(a);			    \
-		   else if ((addr & 0xF000) == 0xC000)			    \
-		     IOWrite[(addr>>4) & 0xFF](regs.pc,addr,1,(BYTE)(a),uExecutedCycles); \
-		 }
-
-//
-
-// ExtraCycles:
-// +1 if branch taken
-// +1 if page boundary crossed
-#define BRANCH_TAKEN {					\
-			 base = regs.pc;		\
-			 regs.pc += addr;		\
-			 if ((base ^ regs.pc) & 0xFF00) \
-			     uExtraCycles=2;		\
-			 else				\
-			     uExtraCycles=1;		\
-		     }
-
-//
-
-#define CHECK_PAGE_CHANGE  if (bSlowerOnPagecross) {		      \
-			       if ((base ^ addr) & 0xFF00)    \
-				   uExtraCycles=1;	      \
-			   }
-
-/****************************************************************************
-*
-*  ADDRESSING MODE MACROS
-*
-***/
-
-#define ABS	 addr = *(LPWORD)(mem+regs.pc);	 regs.pc += 2;
-#define IABSX    addr = *(LPWORD)(mem+(*(LPWORD)(mem+regs.pc))+(WORD)regs.x); regs.pc += 2;
-#define ABSX	 base = *(LPWORD)(mem+regs.pc); addr = base+(WORD)regs.x; regs.pc += 2; CHECK_PAGE_CHANGE;
-#define ABSY	 base = *(LPWORD)(mem+regs.pc); addr = base+(WORD)regs.y; regs.pc += 2; CHECK_PAGE_CHANGE;
-#define IABSCMOS base = *(LPWORD)(mem+regs.pc);	                          \
-		 addr = *(LPWORD)(mem+base);		                  \
-		 if ((base & 0xFF) == 0xFF) uExtraCycles=1;		  \
-		 regs.pc += 2;
-#define IABSNMOS base = *(LPWORD)(mem+regs.pc);	                          \
-		 if ((base & 0xFF) == 0xFF)				  \
-		       addr = *(mem+base)+((WORD)*(mem+(base&0xFF00))<<8);\
-		   else                                                   \
-		       addr = *(LPWORD)(mem+base);                        \
-		 regs.pc += 2;
-#define IMM	 addr = regs.pc++;
-#define INDX	 base = ((*(mem+regs.pc++))+regs.x) & 0xFF;          \
-		 if (base == 0xFF)                                   \
-		     addr = *(mem+0xFF)+(((WORD)*mem)<<8);           \
-		 else                                                \
-		     addr = *(LPWORD)(mem+base);
-#define INDY	 if (*(mem+regs.pc) == 0xFF)                         \
-		     base = *(mem+0xFF)+(((WORD)*mem)<<8);           \
-		 else                                                \
-		     base = *(LPWORD)(mem+*(mem+regs.pc));           \
-		 regs.pc++;                                          \
-		 addr = base+(WORD)regs.y;                           \
-		 CHECK_PAGE_CHANGE;
-#define IZPG	 base = *(mem+regs.pc++);                            \
-		 if (base == 0xFF)                                   \
-		     addr = *(mem+0xFF)+(((WORD)*mem)<<8);           \
-		 else                                                \
-		     addr = *(LPWORD)(mem+base);
-#define REL	 addr = (signed char)*(mem+regs.pc++);
-
-// Optimiation note:
-// . Opcodes that generate zero-page addresses can't be accessing $C000..$CFFF
-//   so they could be paired with special READZP/WRITEZP macros (instead of READ/WRITE)
-#define ZPG	 addr = *(mem+regs.pc++);
-#define ZPGX	 addr = ((*(mem+regs.pc++))+regs.x) & 0xFF;
-#define ZPGY	 addr = ((*(mem+regs.pc++))+regs.y) & 0xFF;
-
-/****************************************************************************
-*
-*  INSTRUCTION MACROS
-*
-***/
-
-#define ADC_NMOS bSlowerOnPagecross = 1;						    \
-		 temp = READ;						    \
-		 if (regs.ps & AF_DECIMAL) {				    \
-		   val	  = (regs.a & 0x0F) + (temp & 0x0F) + flagc;	    \
-		   if (val > 0x09)					    \
-		     val += 0x06;					    \
-		   if (val <= 0x0F)					    \
-		     val = (val & 0x0F) + (regs.a & 0xF0) + (temp & 0xF0);  \
-		   else							    \
-		     val = (val & 0x0F) + (regs.a & 0xF0) + (temp & 0xF0) + 0x10;\
-		   flagz = !((regs.a + temp + flagc) & 0xFF);		    \
-		   flagn = (val & 0x80);				    \
-		   flagv = ((regs.a ^ val) & 0x80) && !((regs.a ^ temp) & 0x80);\
-		   if ((val & 0x1F0) > 0x90)				    \
-		     val += 0x60;					    \
-		   flagc = ((val & 0xFF0) > 0xF0);			    \
-		   regs.a = val & 0xFF;                                     \
-		  }							    \
-		 else {							    \
-		   val	  = regs.a + temp + flagc;			    \
-		   flagc  = (val > 0xFF);				    \
-		   flagv  = (((regs.a & 0x80) == (temp & 0x80)) &&	    \
-			     ((regs.a & 0x80) != (val & 0x80)));	    \
-		   regs.a = val & 0xFF;					    \
-		   SETNZ(regs.a);					    \
-		 }
-#define ADC_CMOS bSlowerOnPagecross = 1;						    \
-                 temp = READ;						    \
-                 flagv = !((regs.a ^ temp) & 0x80);			    \
-		 if (regs.ps & AF_DECIMAL) {				    \
-		    uExtraCycles++;					    \
-		    val = (regs.a & 0x0f) + (temp & 0x0f) + flagc;          \
-		    if (val >= 0x0A)					    \
-		       val = 0x10 | ((val + 6) & 0x0f);			    \
-		    val += (regs.a & 0xf0) + (temp & 0xf0);		    \
-		    if (val >= 0xA0) {					    \
-		       flagc = 1;					    \
-		       if (val >= 0x180)				    \
-			  flagv = 0;					    \
-		       val += 0x60;					    \
-		    }							    \
-		    else {						    \
-		       flagc = 0;					    \
-		       if (val < 0x80)					    \
-		          flagv = 0;					    \
-		    }							    \
-		 }							    \
-		 else {							    \
-		    val = regs.a + temp + flagc;                            \
-		    if (val >= 0x100) {					    \
-		       flagc = 1;					    \
-		       if (val >= 0x180) flagv = 0;			    \
-		    }							    \
-		    else {						    \
-		       flagc = 0;					    \
-		       if (val < 0x80) flagv = 0;			    \
-		    }							    \
-		 }							    \
-		 regs.a = val & 0xFF;					    \
-		 SETNZ(regs.a)
-#define ALR	 regs.a &= READ;					    \
-		 flagc = (regs.a & 1);					    \
-		 flagn = 0;						    \
-		 regs.a >>= 1;						    \
-		 SETZ(regs.a)
-#define AND	 bSlowerOnPagecross = 1;						    \
-		 regs.a &= READ;					    \
-		 SETNZ(regs.a)
-#define ANC	 regs.a &= READ;					    \
-		 SETNZ(regs.a)						    \
-		 flagc = !!flagn;
-#define ARR	 temp = regs.a & READ; /* Yes, this is sick */		    \
-		 if (regs.ps & AF_DECIMAL) {				    \
-		   val = temp;						    \
-		   val |= (flagc ? 0x100 : 0);				    \
-		   val >>= 1;						    \
-		   flagn = (flagc ? 0x80 : 0);					    \
-		   SETZ(val)						    \
-		   flagv = ((val ^ temp) & 0x40);			    \
-		   if (((val & 0x0F) + (val & 0x01)) > 0x05)                \
-		     val = (val & 0xF0) | ((val + 0x06) & 0x0F);	    \
-		   if (((val & 0xF0) + (val & 0x10)) > 0x50) {		    \
-		     val = (val & 0x0F) | ((val + 0x60) & 0xF0);	    \
-		     flagc = 1;						    \
-		   }							    \
-		   else							    \
-		     flagc = 0;						    \
-		   regs.a = (val & 0xFF);				    \
-		 }							    \
-		 else {							    \
-		   val = temp | (flagc ? 0x100 : 0);			    \
-		   val >>= 1;						    \
-		   SETNZ(val)						    \
-		   flagc = !!(val & 0x40);				    \
-		   flagv = ((val & 0x40) ^ ((val & 0x20) << 1));	    \
-		   regs.a = (val & 0xFF);				    \
-		 }
-#define ASL_NMOS bSlowerOnPagecross = 0;						    \
-		 val   = READ << 1;					    \
-		 flagc = (val > 0xFF);					    \
-		 SETNZ(val)						    \
-		 WRITE(val)
-#define ASL_CMOS bSlowerOnPagecross = 1;						    \
-		 val   = READ << 1;					    \
-		 flagc = (val > 0xFF);					    \
-		 SETNZ(val)						    \
-		 WRITE(val)
-#define ASLA	 val   = regs.a << 1;					    \
-		 flagc = (val > 0xFF);					    \
-		 SETNZ(val)						    \
-		 regs.a = (BYTE)val;
-#define ASO	 bSlowerOnPagecross = 0;						    \
-		 val   = READ << 1;					    \
-		 flagc = (val > 0xFF);					    \
-		 WRITE(val)						    \
-		 regs.a |= val;						    \
-		 SETNZ(regs.a)
-#define AXA	 bSlowerOnPagecross = 0;/*FIXME: $93 case is still unclear*/	    \
-		 val = regs.a & regs.x & (((base >> 8) + 1) & 0xFF);	    \
-		 WRITE(val)
-#define AXS	 bSlowerOnPagecross = 0;						    \
-		 WRITE(regs.a & regs.x)
-#define BCC	 if (!flagc) BRANCH_TAKEN;
-#define BCS	 if ( flagc) BRANCH_TAKEN;
-#define BEQ	 if ( flagz) BRANCH_TAKEN;
-#define BIT	 bSlowerOnPagecross = 1;						    \
-		 val   = READ;						    \
-		 flagz = !(regs.a & val);				    \
-		 flagn = val & 0x80;					    \
-		 flagv = val & 0x40;
-#define BITI	 flagz = !(regs.a & READ);
-#define BMI	 if ( flagn) BRANCH_TAKEN;
-#define BNE	 if (!flagz) BRANCH_TAKEN;
-#define BPL	 if (!flagn) BRANCH_TAKEN;
-#define BRA	 BRANCH_TAKEN;
-#define BRK	 regs.pc++;						    \
-		 PUSH(regs.pc >> 8)					    \
-		 PUSH(regs.pc & 0xFF)					    \
-		 EF_TO_AF						    \
-		 PUSH(regs.ps);						    \
-		 regs.ps |= AF_INTERRUPT;				    \
-		 regs.pc = *(LPWORD)(mem+0xFFFE);
-#define BVC	 if (!flagv) BRANCH_TAKEN;
-#define BVS	 if ( flagv) BRANCH_TAKEN;
-#define CLC	 flagc = 0;
-#define CLD	 regs.ps &= ~AF_DECIMAL;
-#define CLI	 regs.ps &= ~AF_INTERRUPT;
-#define CLV	 flagv = 0;
-#define CMP	 bSlowerOnPagecross = 1;						    \
-		 val   = READ;						    \
-		 flagc = (regs.a >= val);				    \
-		 val   = regs.a-val;					    \
-		 SETNZ(val)
-#define CPX	 val   = READ;						    \
-		 flagc = (regs.x >= val);				    \
-		 val   = regs.x-val;					    \
-		 SETNZ(val)
-#define CPY	 val   = READ;						    \
-		 flagc = (regs.y >= val);				    \
-		 val   = regs.y-val;					    \
-		 SETNZ(val)
-#define DCM	 bSlowerOnPagecross = 0;						    \
-		 val = READ-1;						    \
-		 WRITE(val)						    \
-		 flagc = (regs.a >= val);				    \
-		 val   = regs.a-val;					    \
-		 SETNZ(val)
-#define DEA	 --regs.a;						    \
-		 SETNZ(regs.a)
-#define DEC_NMOS bSlowerOnPagecross = 0;						    \
-		 val = READ-1;						    \
-		 SETNZ(val)						    \
-		 WRITE(val)
-#define DEC_CMOS bSlowerOnPagecross = 1;						    \
-		 val = READ-1;						    \
-		 SETNZ(val)						    \
-		 WRITE(val)
-#define DEX	 --regs.x;						    \
-		 SETNZ(regs.x)
-#define DEY	 --regs.y;						    \
-		 SETNZ(regs.y)
-#define EOR	 bSlowerOnPagecross = 1;						    \
-		 regs.a ^= READ;					    \
-		 SETNZ(regs.a)
-#define HLT	 regs.bJammed = 1;					    \
-		 --regs.pc;
-#define INA	 ++regs.a;						    \
-		 SETNZ(regs.a)
-#define INC_NMOS bSlowerOnPagecross = 0;						    \
-		 val = READ+1;						    \
-		 SETNZ(val)						    \
-		 WRITE(val)
-#define INC_CMOS bSlowerOnPagecross = 1;						    \
-		 val = READ+1;						    \
-		 SETNZ(val)						    \
-		 WRITE(val)
-#define INS	 bSlowerOnPagecross = 0;						    \
-		 val = READ+1;						    \
-		 WRITE(val)						    \
-		 temp = val;                                                \
-		 temp2 = regs.a - temp - !flagc;			    \
-		 if (regs.ps & AF_DECIMAL) {				    \
-		   val  = (regs.a & 0x0F) - (temp & 0x0F) - !flagc;	    \
-		   if (val & 0x10)					    \
-		     val = ((val - 0x06) & 0x0F) | ((regs.a & 0xF0) - (temp & 0xF0) - 0x10);\
-		   else							    \
-		     val = (val & 0x0F) | ((regs.a & 0xF0) - (temp & 0xF0));\
-		   if (val & 0x100)					    \
-		     val -= 0x60;					    \
-		   flagc  = (temp2 < 0x100);				    \
-		   SETNZ(temp2 & 0xFF);					    \
-		   flagv = ((regs.a ^ temp2) & 0x80) && ((regs.a ^ temp) & 0x80);\
-		   regs.a = val & 0xFF;					    \
-		 }							    \
-		 else {							    \
-		   val	  = temp2;					    \
-		   flagc  = (val < 0x100);				    \
-		   flagv  = (((regs.a & 0x80) != (temp & 0x80)) &&	    \
-			     ((regs.a & 0x80) != (val & 0x80)));	    \
-		   regs.a = val & 0xFF;					    \
-		   SETNZ(regs.a);					    \
-		 }		
-#define INX	 ++regs.x;						    \
-		 SETNZ(regs.x)
-#define INY	 ++regs.y;						    \
-		 SETNZ(regs.y)
-#define JMP	 regs.pc = addr;
-#define JSR	 --regs.pc;						    \
-		 PUSH(regs.pc >> 8)					    \
-		 PUSH(regs.pc & 0xFF)					    \
-		 regs.pc = addr;
-#define LAS	 bSlowerOnPagecross = 1;						    \
-		 val = (BYTE)(READ & regs.sp);				    \
-		 regs.a = regs.x = (BYTE) val;				    \
-		 regs.sp = val | 0x100;					    \
-		 SETNZ(val)
-#define LAX	 bSlowerOnPagecross = 1;						    \
-		 regs.a = regs.x = READ;				    \
-		 SETNZ(regs.a)
-#define LDA	 bSlowerOnPagecross = 1;						    \
-		 regs.a = READ;						    \
-		 SETNZ(regs.a)
-#define LDX	 bSlowerOnPagecross = 1;						    \
-		 regs.x = READ;						    \
-		 SETNZ(regs.x)
-#define LDY	 bSlowerOnPagecross = 1;						    \
-		 regs.y = READ;						    \
-		 SETNZ(regs.y)
-#define LSE	 bSlowerOnPagecross = 0;						    \
-		 val   = READ;						    \
-		 flagc = (val & 1);					    \
-		 val >>= 1;						    \
-		 WRITE(val)						    \
-		 regs.a ^= val;						    \
-		 SETNZ(regs.a)
-#define LSR_NMOS bSlowerOnPagecross = 0;						    \
-		 val   = READ;						    \
-		 flagc = (val & 1);					    \
-		 flagn = 0;						    \
-		 val >>= 1;						    \
-		 SETZ(val)						    \
-		 WRITE(val)
-#define LSR_CMOS bSlowerOnPagecross = 1;						    \
-		 val   = READ;						    \
-		 flagc = (val & 1);					    \
-		 flagn = 0;						    \
-		 val >>= 1;						    \
-		 SETZ(val)						    \
-		 WRITE(val)
-#define LSRA	 flagc = (regs.a & 1);					    \
-		 flagn = 0;						    \
-		 regs.a >>= 1;						    \
-		 SETZ(regs.a)
-#define NOP	 bSlowerOnPagecross = 1;
-#define OAL	 regs.a |= 0xEE;					    \
-		 regs.a &= READ;					    \
-		 regs.x = regs.a;					    \
-		 SETNZ(regs.a)
-#define ORA	 bSlowerOnPagecross = 1;						    \
-		 regs.a |= READ;					    \
-		 SETNZ(regs.a)
-#define PHA	 PUSH(regs.a)
-#define PHP	 EF_TO_AF						    \
-		 PUSH(regs.ps)
-#define PHX	 PUSH(regs.x)
-#define PHY	 PUSH(regs.y)
-#define PLA	 regs.a = POP;						    \
-		 SETNZ(regs.a)
-#define PLP	 regs.ps = POP | AF_RESERVED | AF_BREAK;		    \
-		 AF_TO_EF
-#define PLX	 regs.x = POP;						    \
-		 SETNZ(regs.x)
-#define PLY	 regs.y = POP;						    \
-		 SETNZ(regs.y)
-#define RLA	 bSlowerOnPagecross = 0;						    \
-		 val   = (READ << 1) | flagc;				    \
-		 flagc = (val > 0xFF);					    \
-		 WRITE(val)						    \
-		 regs.a &= val;						    \
-		 SETNZ(regs.a)
-#define ROL_NMOS bSlowerOnPagecross = 0;						    \
-		 val   = (READ << 1) | flagc;				    \
-		 flagc = (val > 0xFF);					    \
-		 SETNZ(val)						    \
-		 WRITE(val)
-#define ROL_CMOS bSlowerOnPagecross = 1;						    \
-		 val   = (READ << 1) | flagc;				    \
-		 flagc = (val > 0xFF);					    \
-		 SETNZ(val)						    \
-		 WRITE(val)
-#define ROLA	 val	= (((WORD)regs.a) << 1) | flagc;		    \
-		 flagc	= (val > 0xFF);					    \
-		 regs.a = val & 0xFF;					    \
-		 SETNZ(regs.a);
-#define ROR_NMOS bSlowerOnPagecross = 0;						    \
-		 temp  = READ;						    \
-		 val   = (temp >> 1) | (flagc ? 0x80 : 0);		    \
-		 flagc = (temp & 1);					    \
-		 SETNZ(val)						    \
-		 WRITE(val)
-#define ROR_CMOS bSlowerOnPagecross = 1;						    \
-		 temp  = READ;						    \
-		 val   = (temp >> 1) | (flagc ? 0x80 : 0);		    \
-		 flagc = (temp & 1);					    \
-		 SETNZ(val)						    \
-		 WRITE(val)
-#define RORA	 val	= (((WORD)regs.a) >> 1) | (flagc ? 0x80 : 0);	    \
-		 flagc	= (regs.a & 1);					    \
-		 regs.a = val & 0xFF;					    \
-		 SETNZ(regs.a)
-#define RRA	 bSlowerOnPagecross = 0;						    \
-		 temp  = READ;						    \
-		 val   = (temp >> 1) | (flagc ? 0x80 : 0);		    \
-		 flagc = (temp & 1);					    \
-		 WRITE(val)						    \
-		 temp = val;						    \
-		 if (regs.ps & AF_DECIMAL) {				    \
-		   val	  = (regs.a & 0x0F) + (temp & 0x0F) + flagc;	    \
-		   if (val > 0x09)					    \
-		     val += 0x06;					    \
-		   if (val <= 0x0F)					    \
-		     val = (val & 0x0F) + (regs.a & 0xF0) + (temp & 0xF0);  \
-		   else							    \
-		     val = (val & 0x0F) + (regs.a & 0xF0) + (temp & 0xF0) + 0x10;\
-		   flagz = !((regs.a + temp + flagc) & 0xFF);		    \
-		   flagn = (val & 0x80);				    \
-		   flagv = ((regs.a ^ val) & 0x80) && !((regs.a ^ temp) & 0x80);\
-		   if ((val & 0x1F0) > 0x90)				    \
-		     val += 0x60;					    \
-		   flagc = ((val & 0xFF0) > 0xF0);			    \
-		   regs.a = val & 0xFF;                                     \
-		 }							    \
-		 else {							    \
-		   val	  = regs.a + temp + flagc;			    \
-		   flagc  = (val > 0xFF);				    \
-		   flagv  = (((regs.a & 0x80) == (temp & 0x80)) &&	    \
-			     ((regs.a & 0x80) != (val & 0x80)));	    \
-		   regs.a = val & 0xFF;					    \
-		   SETNZ(regs.a);					    \
-		 }
-#define RTI	 regs.ps = POP | AF_RESERVED | AF_BREAK;		    \
-		 AF_TO_EF						    \
-		 regs.pc = POP;						    \
-		 regs.pc |= (((WORD)POP) << 8);
-#define RTS	 regs.pc = POP;						    \
-		 regs.pc |= (((WORD)POP) << 8);				    \
-		 ++regs.pc;
-#define SAX	 temp	= regs.a & regs.x;				    \
-		 val	= READ;						    \
-		 flagc	= (temp >= val);				    \
-		 regs.x = temp-val;					    \
-		 SETNZ(regs.x)
-#define SAY	 bSlowerOnPagecross = 0;						    \
-		 val = regs.y & (((base >> 8) + 1) & 0xFF);		    \
-		 WRITE(val)
-#define SBC_NMOS bSlowerOnPagecross = 1;						    \
-		 temp = READ;						    \
-		 temp2 = regs.a - temp - !flagc;			    \
-		 if (regs.ps & AF_DECIMAL) {				    \
-		   val  = (regs.a & 0x0F) - (temp & 0x0F) - !flagc;	    \
-		   if (val & 0x10)					    \
-		     val = ((val - 0x06) & 0x0F) | ((regs.a & 0xF0) - (temp & 0xF0) - 0x10);\
-		   else							    \
-		     val = (val & 0x0F) | ((regs.a & 0xF0) - (temp & 0xF0));\
-		   if (val & 0x100)					    \
-		     val -= 0x60;					    \
-		   flagc  = (temp2 < 0x100);				    \
-		   SETNZ(temp2 & 0xFF);					    \
-		   flagv = ((regs.a ^ temp2) & 0x80) && ((regs.a ^ temp) & 0x80);\
-		   regs.a = val & 0xFF;					    \
-		 }							    \
-		 else {							    \
-		   val	  = temp2;					    \
-		   flagc  = (val < 0x100);				    \
-		   flagv  = (((regs.a & 0x80) != (temp & 0x80)) &&	    \
-			     ((regs.a & 0x80) != (val & 0x80)));	    \
-		   regs.a = val & 0xFF;					    \
-		   SETNZ(regs.a);					    \
-		 }
-#define SBC_CMOS bSlowerOnPagecross = 1;						    \
-	         temp = READ;						    \
-		 flagv = ((regs.a ^ temp) & 0x80);			    \
-		 if (regs.ps & AF_DECIMAL) {				    \
-		    uExtraCycles++;					    \
-                    temp2 = 0x0F + (regs.a & 0x0F) - (temp & 0x0F) + flagc; \
-		    if (temp2 < 0x10) {					    \
-		       val = 0;						    \
-		       temp2 -= 0x06;					    \
-		    }							    \
-		    else {						    \
-		       val = 0x10;					    \
-		       temp2 -= 0x10;					    \
-		    }							    \
-		    val += 0xF0 + (regs.a & 0xF0) - (temp & 0xF0);	    \
-		    if (val < 0x100) {					    \
-		       flagc = 0;					    \
-		       if (val < 0x80)					    \
-			  flagv = 0;					    \
-		       val -= 0x60;					    \
-		    }							    \
-		    else {						    \
-		       flagc = 1;					    \
-		       if (val >= 0x180)				    \
-			  flagv = 0;					    \
-		    }							    \
-		    val += temp2;					    \
-		 }							    \
-		 else {							    \
-		    val = 0xff + regs.a - temp + flagc;                     \
-		    if (val < 0x100) {					    \
-		       flagc = 0;					    \
-		       if (val < 0x80)					    \
-			  flagv = 0;					    \
-		    }							    \
-		    else {						    \
-		       flagc = 1;					    \
-		       if (val >= 0x180)				    \
-		          flagv = 0;					    \
-		    }							    \
-		 }							    \
-		 regs.a = val & 0xFF;					    \
-                 SETNZ(regs.a)
-#define SEC	 flagc = 1;
-#define SED	 regs.ps |= AF_DECIMAL;
-#define SEI	 regs.ps |= AF_INTERRUPT;
-#define STA	 bSlowerOnPagecross = 0;						    \
-		 WRITE(regs.a)
-#define STX	 bSlowerOnPagecross = 0;						    \
-		 WRITE(regs.x)
-#define STY	 bSlowerOnPagecross = 0;						    \
-		 WRITE(regs.y)
-#define STZ	 bSlowerOnPagecross = 0;						    \
-		 WRITE(0)
-#define TAS	 bSlowerOnPagecross = 0;						    \
-		 val = regs.a & regs.x;					    \
-		 regs.sp = 0x100 | val;					    \
-		 val &= (((base >> 8) + 1) & 0xFF);			    \
-		 WRITE(val)
-#define TAX	 regs.x = regs.a;					    \
-		 SETNZ(regs.x)
-#define TAY	 regs.y = regs.a;					    \
-		 SETNZ(regs.y)
-#define TRB	 bSlowerOnPagecross = 0;						    \
-		 val   = READ;						    \
-		 flagz = !(regs.a & val);				    \
-		 val  &= ~regs.a;					    \
-		 WRITE(val)
-#define TSB	 bSlowerOnPagecross = 0;						    \
-		 val   = READ;						    \
-		 flagz = !(regs.a & val);				    \
-		 val   |= regs.a;					    \
-		 WRITE(val)
-#define TSX	 regs.x = regs.sp & 0xFF;				    \
-		 SETNZ(regs.x)
-#define TXA	 regs.a = regs.x;					    \
-		 SETNZ(regs.a)
-#define TXS	 regs.sp = 0x100 | regs.x;
-#define TYA	 regs.a = regs.y;					    \
-		 SETNZ(regs.a)
-#define XAA	 regs.a = regs.x;					    \
-		 regs.a &= READ;					    \
-		 SETNZ(regs.a)
-#define XAS	 bSlowerOnPagecross = 0;						    \
-		 val = regs.x & (((base >> 8) + 1) & 0xFF);		    \
-		 WRITE(val)
+#include "cpu/cpu_instructions.inl"
 
 void RequestDebugger()
 {
@@ -1590,6 +992,8 @@ static DWORD Cpu6502 (DWORD uTotalCycles)
 	return uExecutedCycles;
 }
 
+//#include "cpu/cpu65d02.cpp"
+
 //===========================================================================
 
 static DWORD InternalCpuExecute (DWORD uTotalCycles)