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Fixed undocumented AXA opcodes when page-crossing (#282)

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This commit is contained in:
tomcw 2015-05-02 21:44:03 +01:00
parent 151a7f3b33
commit 2597dd9045
3 changed files with 15 additions and 3 deletions
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4
source/CPU/cpu6502.h
View File

@ -202,7 +202,7 @@ static DWORD Cpu6502 (DWORD uTotalCycles)
case 0x90: REL BCC CYC(2) break;
case 0x91: INDY_FAST STA CYC(6) break;
case 0x92: $ HLT CYC(2) break;
case 0x93: $ INDY_FAST AXA CYC(6) break; // invalid
case 0x93: $ INDY_INV AXA CYC(6) break; // invalid
case 0x94: zpx STY CYC(4) break;
case 0x95: zpx STA CYC(4) break;
case 0x96: zpy STX CYC(4) break;
@ -214,7 +214,7 @@ static DWORD Cpu6502 (DWORD uTotalCycles)
case 0x9C: $ ABSX_FAST SAY CYC(5) break; // invalid
case 0x9D: ABSX_FAST STA CYC(5) break;
case 0x9E: $ ABSY_FAST XAS CYC(5) break;
case 0x9F: $ ABSY_FAST AXA CYC(5) break;
case 0x9F: $ ABSY_INV AXA CYC(5) break;
case 0xA0: IMM LDY CYC(2) break;
case 0xA1: idx LDA CYC(6) break;
case 0xA2: IMM LDX CYC(2) break;

11
source/CPU/cpu_general.inl
View File

@ -93,6 +93,9 @@ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
#define CHECK_PAGE_CHANGE if ((base ^ addr) & 0xFF00) \
uExtraCycles=1;
#define CHECK_PAGE_CHANGE_INV if ((base ^ addr) & 0xFF00) \
uExtraCycles=1; /* Reuse as flag to opcode to replace hi-addr! */
/****************************************************************************
*
* ADDRESSING MODE MACROS
@ -107,6 +110,7 @@ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
#define ABSY_SLOW base = *(LPWORD)(mem+regs.pc); addr = base+(WORD)regs.y; regs.pc += 2; CHECK_PAGE_CHANGE;
#define ABSY_FAST base = *(LPWORD)(mem+regs.pc); addr = base+(WORD)regs.y; regs.pc += 2;
#define ABSY_INV base = *(LPWORD)(mem+regs.pc); addr = base+(WORD)regs.y; regs.pc += 2; CHECK_PAGE_CHANGE_INV;
// NMOS read-modify-write opcodes (asl/dec/inc abs,x) don't take an extra cycle if page-crossing (GH#271)
#define ABSX_NMOS_RMW base = *(LPWORD)(mem+regs.pc); addr = base+(WORD)regs.x; regs.pc += 2;
@ -142,6 +146,13 @@ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
base = *(LPWORD)(mem+*(mem+regs.pc)); \
regs.pc++; \
addr = base+(WORD)regs.y;
#define INDY_INV if (*(mem+regs.pc) == 0xFF) /*FAST: no extra cycle for page-crossing*/ \
base = *(mem+0xFF)+(((WORD)*mem)<<8); \
else \
base = *(LPWORD)(mem+*(mem+regs.pc)); \
regs.pc++; \
addr = base+(WORD)regs.y; \
CHECK_PAGE_CHANGE_INV;
#define IZPG base = *(mem+regs.pc++); \
if (base == 0xFF) \

3
source/CPU/cpu_instructions.inl
View File

@ -294,8 +294,9 @@ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
WRITE(val) \
regs.a |= val; \
SETNZ(regs.a)
#define AXA /*bSlowerOnPagecross = 0;*//*FIXME: $93 case is still unclear*/ \
#define AXA /*bSlowerOnPagecross = 0;*/ \
val = regs.a & regs.x & (((base >> 8) + 1) & 0xFF); \
if (uExtraCycles) {addr = (val<<8) | (addr&0xff); uExtraCycles = 0;} /* NB. Use 'uExtraCycles' to flag page-cross only */ \
WRITE(val)
#define AXS /*bSlowerOnPagecross = 0;*/ \
WRITE(regs.a & regs.x)