From 2b1e0c76a4d17b2ad710f179743b56c3b33ba5b6 Mon Sep 17 00:00:00 2001 From: mpohoreski Date: Mon, 12 Jun 2006 22:06:50 +0000 Subject: [PATCH] Fixed BRKOP, BRK # to enter debugger Pressing F7 after triggered break stops on next break Fixed global "mode" to comply with coding convention: g_nAppMode --- source/Applewin.cpp | 70 +- source/Applewin.h | 9 +- source/CPU.cpp | 1305 +++++++++++++++++----------------- source/Common.h | 19 +- source/Debug.cpp | 47 +- source/Debug.h | 5 +- source/Debugger_Display.cpp | 2 +- source/Debugger_Types.h | 6 +- source/Frame.cpp | 78 +- source/Frame.h | 6 + source/PropertySheetPage.cpp | 2 +- source/SoundCore.cpp | 8 +- source/Speaker.cpp | 4 +- source/Video.cpp | 26 +- 14 files changed, 831 insertions(+), 756 deletions(-) diff --git a/source/Applewin.cpp b/source/Applewin.cpp index b782b13a..0bfd484a 100644 --- a/source/Applewin.cpp +++ b/source/Applewin.cpp @@ -31,8 +31,9 @@ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA char VERSIONSTRING[] = "xx.yy.zz.ww"; -BOOL apple2e = 1; -BOOL apple2plus = 1; +bool apple2e = true; +bool apple2plus = true; + BOOL behind = 0; // Redundant DWORD cumulativecycles = 0; // Wraps after ~1hr 9mins DWORD cyclenum = 0; // Used by SpkrToggle() for non-wave sound @@ -42,7 +43,9 @@ bool g_bFullSpeed = false; HINSTANCE instance = (HINSTANCE)0; static DWORD lastfastpaging = 0; static DWORD lasttrimimages = 0; -int mode = MODE_LOGO; + +AppMode_e g_nAppMode = MODE_LOGO; + static int lastmode = MODE_LOGO; DWORD needsprecision = 0; // Redundant TCHAR progdir[MAX_PATH] = TEXT(""); @@ -188,7 +191,7 @@ void ContinueExecution() { g_dwCyclesThisFrame -= dwClksPerFrame; - if(mode != MODE_LOGO) + if(g_nAppMode != MODE_LOGO) { VideoUpdateFlash(); @@ -310,27 +313,38 @@ LRESULT CALLBACK DlgProc (HWND window, } //=========================================================================== -void EnterMessageLoop () { - MSG message; - while (GetMessage(&message,0,0,0)) { - TranslateMessage(&message); - DispatchMessage(&message); - while ((mode == MODE_RUNNING) || (mode == MODE_STEPPING)) - if (PeekMessage(&message,0,0,0,PM_REMOVE)) { - if (message.message == WM_QUIT) - return; - TranslateMessage(&message); - DispatchMessage(&message); - } - else if (mode == MODE_STEPPING) - DebugContinueStepping(); - else { - ContinueExecution(); - if (g_bFullSpeed) - ContinueExecution(); - } - } - while (PeekMessage(&message,0,0,0,PM_REMOVE)) ; +void EnterMessageLoop () +{ + MSG message; + + while (GetMessage(&message,0,0,0)) + { + TranslateMessage(&message); + DispatchMessage(&message); + + while ((g_nAppMode == MODE_RUNNING) || (g_nAppMode == MODE_STEPPING)) + { + if (PeekMessage(&message,0,0,0,PM_REMOVE)) + { + if (message.message == WM_QUIT) + return; + TranslateMessage(&message); + DispatchMessage(&message); + } + else if (g_nAppMode == MODE_STEPPING) + DebugContinueStepping(); + else + { + ContinueExecution(); + if (g_nAppMode != MODE_DEBUG) + if (g_bFullSpeed) + ContinueExecution(); + } + } + } + + while (PeekMessage(&message,0,0,0,PM_REMOVE)) + ; // intentional null statement } //=========================================================================== @@ -542,7 +556,7 @@ int APIENTRY WinMain (HINSTANCE passinstance, HINSTANCE, LPSTR lpCmdLine, int) } else if((strcmp(lpCmdLine, "-l") == 0) && (g_fh == NULL)) { - g_fh = fopen("AppleWin.log", "a+t"); // Open log file (append & text mode) + g_fh = fopen("AppleWin.log", "a+t"); // Open log file (append & text g_nAppMode) CHAR aDateStr[80], aTimeStr[80]; GetDateFormat(LOCALE_SYSTEM_DEFAULT, 0, NULL, NULL, (LPTSTR)aDateStr, sizeof(aDateStr)); GetTimeFormat(LOCALE_SYSTEM_DEFAULT, 0, NULL, NULL, (LPTSTR)aTimeStr, sizeof(aTimeStr)); @@ -633,7 +647,7 @@ int APIENTRY WinMain (HINSTANCE passinstance, HINSTANCE, LPSTR lpCmdLine, int) FrameRegisterClass(); ImageInitialize(); DiskInitialize(); - CreateColorMixMap(); // For tv emulation mode + CreateColorMixMap(); // For tv emulation g_nAppMode // @@ -654,7 +668,7 @@ int APIENTRY WinMain (HINSTANCE passinstance, HINSTANCE, LPSTR lpCmdLine, int) { // DO INITIALIZATION THAT MUST BE REPEATED FOR A RESTART restart = 0; - mode = MODE_LOGO; + g_nAppMode = MODE_LOGO; LoadConfiguration(); DebugInitialize(); JoyInitialize(); diff --git a/source/Applewin.h b/source/Applewin.h index 1059c15b..30948ff4 100644 --- a/source/Applewin.h +++ b/source/Applewin.h @@ -2,15 +2,18 @@ extern char VERSIONSTRING[]; // Contructed in WinMain() -extern BOOL apple2e; -extern BOOL apple2plus; +extern bool apple2e; +extern bool apple2plus; + extern BOOL behind; extern DWORD cumulativecycles; extern DWORD cyclenum; extern DWORD emulmsec; extern bool g_bFullSpeed; extern HINSTANCE instance; -extern int mode; + +extern AppMode_e g_nAppMode; + extern DWORD needsprecision; extern TCHAR progdir[MAX_PATH]; extern BOOL resettiming; diff --git a/source/CPU.cpp b/source/CPU.cpp index 71e9e6f8..318aaccc 100644 --- a/source/CPU.cpp +++ b/source/CPU.cpp @@ -37,7 +37,7 @@ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // . The exception is, what he calls "SKB" and "SKW" I call "NOP", // . for consistency's sake. Several other naming conventions exist. // . Of course, only the 6502 has illegal opcodes, the 65C02 doesn't. -// . Thus they're not emulated in Enhanced //e mode. Games relying on them +// . Thus they're not emulated in Enhanced //e g_nAppMode. Games relying on them // . don't run on a real Enhanced //e either. The old mixture of 65C02 // . emulation and skipping the right number of bytes for illegal 6502 // . opcodes, while working surprisingly well in practice, was IMHO @@ -71,7 +71,7 @@ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // // NB2. bSlowerOnPagecross can't be used for r/w detection, as these // . opcodes don't init this flag: -// . $EC CPX ABS (since there's no addressing mode of CPY which has variable cycle number) +// . $EC CPX ABS (since there's no addressing g_nAppMode of CPY which has variable cycle number) // . $CC CPY ABS (same) // // 65C02 info: @@ -744,14 +744,32 @@ static volatile BOOL g_bNmiFlank = FALSE; // Positive going flank on NMI line void RequestDebugger() { - PostMessage( g_hFrameWindow, WM_KEYDOWN, DEBUG_TOGGLE_KEY, 0 ); - PostMessage( g_hFrameWindow, WM_KEYUP , DEBUG_TOGGLE_KEY, 0 ); + // BUG: This causes DebugBegin to constantly be called. + // It's as if the WM_KEYUP are auto-repeating? + // FrameWndProc() + // ProcessButtonClick() + // DebugBegin() + // PostMessage( g_hFrameWindow, WM_KEYDOWN, DEBUG_TOGGLE_KEY, 0 ); + // PostMessage( g_hFrameWindow, WM_KEYUP , DEBUG_TOGGLE_KEY, 0 ); + + // Not a valid solution, since hitting F7 (to exit) debugger gets the debugger out of sync + // due to EnterMessageLoop() calling ContinueExecution() after the mode has changed to DEBUG. + // DebugBegin(); + + FrameWndProc( g_hFrameWindow, WM_KEYDOWN, DEBUG_TOGGLE_KEY, 0 ); + FrameWndProc( g_hFrameWindow, WM_KEYUP , DEBUG_TOGGLE_KEY, 0 ); } bool CheckDebugBreak( int iOpcode ) { - // Rnning at full speed? (debugger not running) - if ((mode != MODE_DEBUG) && (mode != MODE_STEPPING)) + if (g_bDebugDelayBreakCheck) + { + g_bDebugDelayBreakCheck = false; + return false; + } + + // Running at full speed? (debugger not running) + if ((g_nAppMode != MODE_DEBUG) && (g_nAppMode != MODE_STEPPING)) { if (((iOpcode == 0) && IsDebugBreakOnInvalid(0)) || ((g_iDebugOnOpcode) && (g_iDebugOnOpcode == iOpcode))) // User wants to enter debugger on opcode? @@ -816,644 +834,655 @@ static inline void DoIrqProfiling(DWORD cycles) //=========================================================================== static DWORD InternalCpuExecute (DWORD totalcycles) { - WORD addr; - BOOL flagc; // must always be 0 or 1, no other values allowed - BOOL flagn; // must always be 0 or 0x80. - BOOL flagv; // any value allowed - BOOL flagz; // any value allowed - WORD temp; - WORD temp2; - WORD val; - AF_TO_EF - DWORD cycles = 0; - BOOL bSlowerOnPagecross; // Set if opcode writes to memory (eg. ASL, STA) - WORD base; - bool bBreakOnInvalid = false; + WORD addr; + BOOL flagc; // must always be 0 or 1, no other values allowed + BOOL flagn; // must always be 0 or 0x80. + BOOL flagv; // any value allowed + BOOL flagz; // any value allowed + WORD temp; + WORD temp2; + WORD val; + AF_TO_EF + DWORD cycles = 0; + BOOL bSlowerOnPagecross; // Set if opcode writes to memory (eg. ASL, STA) + WORD base; + bool bBreakOnInvalid = false; - if (apple2e) - { - do - { + if (apple2e) + { + do + { + nInternalCyclesLeft = (totalcycles<<8) - (cycles<<8); + USHORT uExtraCycles = 0; - nInternalCyclesLeft = (totalcycles<<8) - (cycles<<8); - USHORT uExtraCycles = 0; + if (regs.bRESET) + { + regs.bRESET = 0; + EF_TO_AF + regs.ps = (regs.ps | AF_INTERRUPT) & ~AF_DECIMAL; + regs.pc = * (WORD*) (mem+0xFFFC); + regs.sp = 0x0100 | ((regs.sp - 3) & 0xFF); + CYC(7); + continue; + } - if (regs.bRESET) - { - regs.bRESET = 0; - EF_TO_AF - regs.ps = (regs.ps | AF_INTERRUPT) & ~AF_DECIMAL; - regs.pc = * (WORD*) (mem+0xFFFC); - regs.sp = 0x0100 | ((regs.sp - 3) & 0xFF); - CYC(7); - continue; - } - - BYTE iOpcode = *(mem+regs.pc); - if (CheckDebugBreak( iOpcode )) - break; - regs.pc++; - switch (iOpcode) { - case 0x00: BRK CYC(7) break; - case 0x01: INDX ORA CYC(6) break; - case 0x02: INV IMM NOP CYC(2) break; - case 0x03: INV NOP CYC(2) break; - case 0x04: ZPG TSB CYC(5) break; - case 0x05: ZPG ORA CYC(3) break; - case 0x06: ZPG ASL_CMOS CYC(5) break; - case 0x07: INV NOP CYC(2) break; - case 0x08: PHP CYC(3) break; - case 0x09: IMM ORA CYC(2) break; - case 0x0A: ASLA CYC(2) break; - case 0x0B: INV NOP CYC(2) break; - case 0x0C: ABS TSB CYC(6) break; - case 0x0D: ABS ORA CYC(4) break; - case 0x0E: ABS ASL_CMOS CYC(6) break; - case 0x0F: INV NOP CYC(2) break; - case 0x10: REL BPL CYC(2) break; - case 0x11: INDY ORA CYC(5) break; - case 0x12: IZPG ORA CYC(5) break; - case 0x13: INV NOP CYC(2) break; - case 0x14: ZPG TRB CYC(5) break; - case 0x15: ZPGX ORA CYC(4) break; - case 0x16: ZPGX ASL_CMOS CYC(6) break; - case 0x17: INV NOP CYC(2) break; - case 0x18: CLC CYC(2) break; - case 0x19: ABSY ORA CYC(4) break; - case 0x1A: INA CYC(2) break; - case 0x1B: INV NOP CYC(2) break; - case 0x1C: ABS TRB CYC(6) break; - case 0x1D: ABSX ORA CYC(4) break; - case 0x1E: ABSX ASL_CMOS CYC(6) break; - case 0x1F: INV NOP CYC(2) break; - case 0x20: ABS JSR CYC(6) break; - case 0x21: INDX AND CYC(6) break; - case 0x22: INV IMM NOP CYC(2) break; - case 0x23: INV NOP CYC(2) break; - case 0x24: ZPG BIT CYC(3) break; - case 0x25: ZPG AND CYC(3) break; - case 0x26: ZPG ROL_CMOS CYC(5) break; - case 0x27: INV NOP CYC(2) break; - case 0x28: PLP CYC(4) break; - case 0x29: IMM AND CYC(2) break; - case 0x2A: ROLA CYC(2) break; - case 0x2B: INV NOP CYC(2) break; - case 0x2C: ABS BIT CYC(4) break; - case 0x2D: ABS AND CYC(2) break; - case 0x2E: ABS ROL_CMOS CYC(6) break; - case 0x2F: INV NOP CYC(2) break; - case 0x30: REL BMI CYC(2) break; - case 0x31: INDY AND CYC(5) break; - case 0x32: IZPG AND CYC(5) break; - case 0x33: INV NOP CYC(2) break; - case 0x34: ZPGX BIT CYC(4) break; - case 0x35: ZPGX AND CYC(4) break; - case 0x36: ZPGX ROL_CMOS CYC(6) break; - case 0x37: INV NOP CYC(2) break; - case 0x38: SEC CYC(2) break; - case 0x39: ABSY AND CYC(4) break; - case 0x3A: DEA CYC(2) break; - case 0x3B: INV NOP CYC(2) break; - case 0x3C: ABSX BIT CYC(4) break; - case 0x3D: ABSX AND CYC(4) break; - case 0x3E: ABSX ROL_CMOS CYC(6) break; - case 0x3F: INV NOP CYC(2) break; - case 0x40: RTI CYC(6) DoIrqProfiling(cycles); break; - case 0x41: INDX EOR CYC(6) break; - case 0x42: INV IMM NOP CYC(2) break; - case 0x43: INV NOP CYC(2) break; - case 0x44: INV ZPG NOP CYC(3) break; - case 0x45: ZPG EOR CYC(3) break; - case 0x46: ZPG LSR_CMOS CYC(5) break; - case 0x47: INV NOP CYC(2) break; - case 0x48: PHA CYC(3) break; - case 0x49: IMM EOR CYC(2) break; - case 0x4A: LSRA CYC(2) break; - case 0x4B: INV NOP CYC(2) break; - case 0x4C: ABS JMP CYC(3) break; - case 0x4D: ABS EOR CYC(4) break; - case 0x4E: ABS LSR_CMOS CYC(6) break; - case 0x4F: INV NOP CYC(2) break; - case 0x50: REL BVC CYC(2) break; - case 0x51: INDY EOR CYC(5) break; - case 0x52: IZPG EOR CYC(5) break; - case 0x53: INV NOP CYC(2) break; - case 0x54: INV ZPGX NOP CYC(4) break; - case 0x55: ZPGX EOR CYC(4) break; - case 0x56: ZPGX LSR_CMOS CYC(6) break; - case 0x57: INV NOP CYC(2) break; - case 0x58: CLI CYC(2) break; - case 0x59: ABSY EOR CYC(4) break; - case 0x5A: PHY CYC(3) break; - case 0x5B: INV NOP CYC(2) break; - case 0x5C: INV ABSX NOP CYC(8) break; - case 0x5D: ABSX EOR CYC(4) break; - case 0x5E: ABSX LSR_CMOS CYC(6) break; - case 0x5F: INV NOP CYC(2) break; - case 0x60: RTS CYC(6) break; - case 0x61: INDX ADC_CMOS CYC(6) break; - case 0x62: INV IMM NOP CYC(2) break; - case 0x63: INV NOP CYC(2) break; - case 0x64: ZPG STZ CYC(3) break; - case 0x65: ZPG ADC_CMOS CYC(3) break; - case 0x66: ZPG ROR_CMOS CYC(5) break; - case 0x67: INV NOP CYC(2) break; - case 0x68: PLA CYC(4) break; - case 0x69: IMM ADC_CMOS CYC(2) break; - case 0x6A: RORA CYC(2) break; - case 0x6B: INV NOP CYC(2) break; - case 0x6C: IABSCMOS JMP CYC(6) break; - case 0x6D: ABS ADC_CMOS CYC(4) break; - case 0x6E: ABS ROR_CMOS CYC(6) break; - case 0x6F: INV NOP CYC(2) break; - case 0x70: REL BVS CYC(2) break; - case 0x71: INDY ADC_CMOS CYC(5) break; - case 0x72: IZPG ADC_CMOS CYC(5) break; - case 0x73: INV NOP CYC(2) break; - case 0x74: ZPGX STZ CYC(4) break; - case 0x75: ZPGX ADC_CMOS CYC(4) break; - case 0x76: ZPGX ROR_CMOS CYC(6) break; - case 0x77: INV NOP CYC(2) break; - case 0x78: SEI CYC(2) break; - case 0x79: ABSY ADC_CMOS CYC(4) break; - case 0x7A: PLY CYC(4) break; - case 0x7B: INV NOP CYC(2) break; - case 0x7C: IABSX JMP CYC(6) break; - case 0x7D: ABSX ADC_CMOS CYC(4) break; - case 0x7E: ABSX ROR_CMOS CYC(6) break; - case 0x7F: INV NOP CYC(2) break; - case 0x80: REL BRA CYC(2) break; - case 0x81: INDX STA CYC(6) break; - case 0x82: INV IMM NOP CYC(2) break; - case 0x83: INV NOP CYC(2) break; - case 0x84: ZPG STY CYC(3) break; - case 0x85: ZPG STA CYC(3) break; - case 0x86: ZPG STX CYC(3) break; - case 0x87: INV NOP CYC(2) break; - case 0x88: DEY CYC(2) break; - case 0x89: IMM BITI CYC(2) break; - case 0x8A: TXA CYC(2) break; - case 0x8B: INV NOP CYC(2) break; - case 0x8C: ABS STY CYC(4) break; - case 0x8D: ABS STA CYC(4) break; - case 0x8E: ABS STX CYC(4) break; - case 0x8F: INV NOP CYC(2) break; - case 0x90: REL BCC CYC(2) break; - case 0x91: INDY STA CYC(6) break; - case 0x92: IZPG STA CYC(5) break; - case 0x93: INV NOP CYC(2) break; - case 0x94: ZPGX STY CYC(4) break; - case 0x95: ZPGX STA CYC(4) break; - case 0x96: ZPGY STX CYC(4) break; - case 0x97: INV NOP CYC(2) break; - case 0x98: TYA CYC(2) break; - case 0x99: ABSY STA CYC(5) break; - case 0x9A: TXS CYC(2) break; - case 0x9B: INV NOP CYC(2) break; - case 0x9C: ABS STZ CYC(4) break; - case 0x9D: ABSX STA CYC(5) break; - case 0x9E: ABSX STZ CYC(5) break; - case 0x9F: INV NOP CYC(2) break; - case 0xA0: IMM LDY CYC(2) break; - case 0xA1: INDX LDA CYC(6) break; - case 0xA2: IMM LDX CYC(2) break; - case 0xA3: INV NOP CYC(2) break; - case 0xA4: ZPG LDY CYC(3) break; - case 0xA5: ZPG LDA CYC(3) break; - case 0xA6: ZPG LDX CYC(3) break; - case 0xA7: INV NOP CYC(2) break; - case 0xA8: TAY CYC(2) break; - case 0xA9: IMM LDA CYC(2) break; - case 0xAA: TAX CYC(2) break; - case 0xAB: INV NOP CYC(2) break; - case 0xAC: ABS LDY CYC(4) break; - case 0xAD: ABS LDA CYC(4) break; - case 0xAE: ABS LDX CYC(4) break; - case 0xAF: INV NOP CYC(2) break; - case 0xB0: REL BCS CYC(2) break; - case 0xB1: INDY LDA CYC(5) break; - case 0xB2: IZPG LDA CYC(5) break; - case 0xB3: INV NOP CYC(2) break; - case 0xB4: ZPGX LDY CYC(4) break; - case 0xB5: ZPGX LDA CYC(4) break; - case 0xB6: ZPGY LDX CYC(4) break; - case 0xB7: INV NOP CYC(2) break; - case 0xB8: CLV CYC(2) break; - case 0xB9: ABSY LDA CYC(4) break; - case 0xBA: TSX CYC(2) break; - case 0xBB: INV NOP CYC(2) break; - case 0xBC: ABSX LDY CYC(4) break; - case 0xBD: ABSX LDA CYC(4) break; - case 0xBE: ABSY LDX CYC(4) break; - case 0xBF: INV NOP CYC(2) break; - case 0xC0: IMM CPY CYC(2) break; - case 0xC1: INDX CMP CYC(6) break; - case 0xC2: INV IMM NOP CYC(2) break; - case 0xC3: INV NOP CYC(2) break; - case 0xC4: ZPG CPY CYC(3) break; - case 0xC5: ZPG CMP CYC(3) break; - case 0xC6: ZPG DEC_CMOS CYC(5) break; - case 0xC7: INV NOP CYC(2) break; - case 0xC8: INY CYC(2) break; - case 0xC9: IMM CMP CYC(2) break; - case 0xCA: DEX CYC(2) break; - case 0xCB: INV NOP CYC(2) break; - case 0xCC: ABS CPY CYC(4) break; - case 0xCD: ABS CMP CYC(4) break; - case 0xCE: ABS DEC_CMOS CYC(5) break; - case 0xCF: INV NOP CYC(2) break; - case 0xD0: REL BNE CYC(2) break; - case 0xD1: INDY CMP CYC(5) break; - case 0xD2: IZPG CMP CYC(5) break; - case 0xD3: INV NOP CYC(2) break; - case 0xD4: INV ZPGX NOP CYC(4) break; - case 0xD5: ZPGX CMP CYC(4) break; - case 0xD6: ZPGX DEC_CMOS CYC(6) break; - case 0xD7: INV NOP CYC(2) break; - case 0xD8: CLD CYC(2) break; - case 0xD9: ABSY CMP CYC(4) break; - case 0xDA: PHX CYC(3) break; - case 0xDB: INV NOP CYC(2) break; - case 0xDC: INV ABSX NOP CYC(4) break; - case 0xDD: ABSX CMP CYC(4) break; - case 0xDE: ABSX DEC_CMOS CYC(6) break; - case 0xDF: INV NOP CYC(2) break; - case 0xE0: IMM CPX CYC(2) break; - case 0xE1: INDX SBC_CMOS CYC(6) break; - case 0xE2: INV IMM NOP CYC(2) break; - case 0xE3: INV NOP CYC(2) break; - case 0xE4: ZPG CPX CYC(3) break; - case 0xE5: ZPG SBC_CMOS CYC(3) break; - case 0xE6: ZPG INC_CMOS CYC(5) break; - case 0xE7: INV NOP CYC(2) break; - case 0xE8: INX CYC(2) break; - case 0xE9: IMM SBC_CMOS CYC(2) break; - case 0xEA: NOP CYC(2) break; - case 0xEB: INV NOP CYC(2) break; - case 0xEC: ABS CPX CYC(4) break; - case 0xED: ABS SBC_CMOS CYC(4) break; - case 0xEE: ABS INC_CMOS CYC(6) break; - case 0xEF: INV NOP CYC(2) break; - case 0xF0: REL BEQ CYC(2) break; - case 0xF1: INDY SBC_CMOS CYC(5) break; - case 0xF2: IZPG SBC_CMOS CYC(5) break; - case 0xF3: INV NOP CYC(2) break; - case 0xF4: INV ZPGX NOP CYC(4) break; - case 0xF5: ZPGX SBC_CMOS CYC(4) break; - case 0xF6: ZPGX INC_CMOS CYC(6) break; - case 0xF7: INV NOP CYC(2) break; - case 0xF8: SED CYC(2) break; - case 0xF9: ABSY SBC_CMOS CYC(4) break; - case 0xFA: PLX CYC(4) break; - case 0xFB: INV NOP CYC(2) break; - case 0xFC: INV ABSX NOP CYC(4) break; - case 0xFD: ABSX SBC_CMOS CYC(4) break; - case 0xFE: ABSX INC_CMOS CYC(6) break; - case 0xFF: INV NOP CYC(2) break; - } - if(g_bNmiFlank) - { - // NMI signals are only serviced once - g_bNmiFlank = FALSE; - g_nCycleIrqStart = g_nCumulativeCycles + cycles; - PUSH(regs.pc >> 8) - PUSH(regs.pc & 0xFF) - EF_TO_AF - PUSH(regs.ps & ~AF_BREAK) - regs.ps = regs.ps | AF_INTERRUPT & ~AF_DECIMAL; - regs.pc = * (WORD*) (mem+0xFFFA); - CYC(7) - } - if(g_bmIRQ && !(regs.ps & AF_INTERRUPT)) - { - // IRQ signals are deasserted when a specific r/w operation is done on device - g_nCycleIrqStart = g_nCumulativeCycles + cycles; - PUSH(regs.pc >> 8) - PUSH(regs.pc & 0xFF) - EF_TO_AF - PUSH(regs.ps & ~AF_BREAK) - regs.ps = regs.ps | AF_INTERRUPT & ~AF_DECIMAL; - regs.pc = * (WORD*) (mem+0xFFFE); - CYC(7) - } - if (bBreakOnInvalid) - break; - } while (cycles < totalcycles); - EF_TO_AF - return cycles; - } - else - { - do - { - nInternalCyclesLeft = (totalcycles<<8) - (cycles<<8); - USHORT uExtraCycles = 0; + BYTE iOpcode = *(mem+regs.pc); + if (CheckDebugBreak( iOpcode )) + break; - if (regs.bRESET) - { - regs.bRESET = 0; - EF_TO_AF - regs.ps = regs.ps | AF_INTERRUPT; - regs.pc = * (WORD*) (mem+0xFFFC); - regs.sp = 0x0100 | ((regs.sp - 3) & 0xFF); - CYC(7); - continue; - } + regs.pc++; - BYTE iOpcode = *(mem+regs.pc); - if (CheckDebugBreak( iOpcode )) - break; - regs.pc++; - switch (iOpcode) + switch (iOpcode) + { + case 0x00: BRK CYC(7) break; + case 0x01: INDX ORA CYC(6) break; + case 0x02: INV IMM NOP CYC(2) break; + case 0x03: INV NOP CYC(2) break; + case 0x04: ZPG TSB CYC(5) break; + case 0x05: ZPG ORA CYC(3) break; + case 0x06: ZPG ASL_CMOS CYC(5) break; + case 0x07: INV NOP CYC(2) break; + case 0x08: PHP CYC(3) break; + case 0x09: IMM ORA CYC(2) break; + case 0x0A: ASLA CYC(2) break; + case 0x0B: INV NOP CYC(2) break; + case 0x0C: ABS TSB CYC(6) break; + case 0x0D: ABS ORA CYC(4) break; + case 0x0E: ABS ASL_CMOS CYC(6) break; + case 0x0F: INV NOP CYC(2) break; + case 0x10: REL BPL CYC(2) break; + case 0x11: INDY ORA CYC(5) break; + case 0x12: IZPG ORA CYC(5) break; + case 0x13: INV NOP CYC(2) break; + case 0x14: ZPG TRB CYC(5) break; + case 0x15: ZPGX ORA CYC(4) break; + case 0x16: ZPGX ASL_CMOS CYC(6) break; + case 0x17: INV NOP CYC(2) break; + case 0x18: CLC CYC(2) break; + case 0x19: ABSY ORA CYC(4) break; + case 0x1A: INA CYC(2) break; + case 0x1B: INV NOP CYC(2) break; + case 0x1C: ABS TRB CYC(6) break; + case 0x1D: ABSX ORA CYC(4) break; + case 0x1E: ABSX ASL_CMOS CYC(6) break; + case 0x1F: INV NOP CYC(2) break; + case 0x20: ABS JSR CYC(6) break; + case 0x21: INDX AND CYC(6) break; + case 0x22: INV IMM NOP CYC(2) break; + case 0x23: INV NOP CYC(2) break; + case 0x24: ZPG BIT CYC(3) break; + case 0x25: ZPG AND CYC(3) break; + case 0x26: ZPG ROL_CMOS CYC(5) break; + case 0x27: INV NOP CYC(2) break; + case 0x28: PLP CYC(4) break; + case 0x29: IMM AND CYC(2) break; + case 0x2A: ROLA CYC(2) break; + case 0x2B: INV NOP CYC(2) break; + case 0x2C: ABS BIT CYC(4) break; + case 0x2D: ABS AND CYC(2) break; + case 0x2E: ABS ROL_CMOS CYC(6) break; + case 0x2F: INV NOP CYC(2) break; + case 0x30: REL BMI CYC(2) break; + case 0x31: INDY AND CYC(5) break; + case 0x32: IZPG AND CYC(5) break; + case 0x33: INV NOP CYC(2) break; + case 0x34: ZPGX BIT CYC(4) break; + case 0x35: ZPGX AND CYC(4) break; + case 0x36: ZPGX ROL_CMOS CYC(6) break; + case 0x37: INV NOP CYC(2) break; + case 0x38: SEC CYC(2) break; + case 0x39: ABSY AND CYC(4) break; + case 0x3A: DEA CYC(2) break; + case 0x3B: INV NOP CYC(2) break; + case 0x3C: ABSX BIT CYC(4) break; + case 0x3D: ABSX AND CYC(4) break; + case 0x3E: ABSX ROL_CMOS CYC(6) break; + case 0x3F: INV NOP CYC(2) break; + case 0x40: RTI CYC(6) DoIrqProfiling(cycles); break; + case 0x41: INDX EOR CYC(6) break; + case 0x42: INV IMM NOP CYC(2) break; + case 0x43: INV NOP CYC(2) break; + case 0x44: INV ZPG NOP CYC(3) break; + case 0x45: ZPG EOR CYC(3) break; + case 0x46: ZPG LSR_CMOS CYC(5) break; + case 0x47: INV NOP CYC(2) break; + case 0x48: PHA CYC(3) break; + case 0x49: IMM EOR CYC(2) break; + case 0x4A: LSRA CYC(2) break; + case 0x4B: INV NOP CYC(2) break; + case 0x4C: ABS JMP CYC(3) break; + case 0x4D: ABS EOR CYC(4) break; + case 0x4E: ABS LSR_CMOS CYC(6) break; + case 0x4F: INV NOP CYC(2) break; + case 0x50: REL BVC CYC(2) break; + case 0x51: INDY EOR CYC(5) break; + case 0x52: IZPG EOR CYC(5) break; + case 0x53: INV NOP CYC(2) break; + case 0x54: INV ZPGX NOP CYC(4) break; + case 0x55: ZPGX EOR CYC(4) break; + case 0x56: ZPGX LSR_CMOS CYC(6) break; + case 0x57: INV NOP CYC(2) break; + case 0x58: CLI CYC(2) break; + case 0x59: ABSY EOR CYC(4) break; + case 0x5A: PHY CYC(3) break; + case 0x5B: INV NOP CYC(2) break; + case 0x5C: INV ABSX NOP CYC(8) break; + case 0x5D: ABSX EOR CYC(4) break; + case 0x5E: ABSX LSR_CMOS CYC(6) break; + case 0x5F: INV NOP CYC(2) break; + case 0x60: RTS CYC(6) break; + case 0x61: INDX ADC_CMOS CYC(6) break; + case 0x62: INV IMM NOP CYC(2) break; + case 0x63: INV NOP CYC(2) break; + case 0x64: ZPG STZ CYC(3) break; + case 0x65: ZPG ADC_CMOS CYC(3) break; + case 0x66: ZPG ROR_CMOS CYC(5) break; + case 0x67: INV NOP CYC(2) break; + case 0x68: PLA CYC(4) break; + case 0x69: IMM ADC_CMOS CYC(2) break; + case 0x6A: RORA CYC(2) break; + case 0x6B: INV NOP CYC(2) break; + case 0x6C: IABSCMOS JMP CYC(6) break; + case 0x6D: ABS ADC_CMOS CYC(4) break; + case 0x6E: ABS ROR_CMOS CYC(6) break; + case 0x6F: INV NOP CYC(2) break; + case 0x70: REL BVS CYC(2) break; + case 0x71: INDY ADC_CMOS CYC(5) break; + case 0x72: IZPG ADC_CMOS CYC(5) break; + case 0x73: INV NOP CYC(2) break; + case 0x74: ZPGX STZ CYC(4) break; + case 0x75: ZPGX ADC_CMOS CYC(4) break; + case 0x76: ZPGX ROR_CMOS CYC(6) break; + case 0x77: INV NOP CYC(2) break; + case 0x78: SEI CYC(2) break; + case 0x79: ABSY ADC_CMOS CYC(4) break; + case 0x7A: PLY CYC(4) break; + case 0x7B: INV NOP CYC(2) break; + case 0x7C: IABSX JMP CYC(6) break; + case 0x7D: ABSX ADC_CMOS CYC(4) break; + case 0x7E: ABSX ROR_CMOS CYC(6) break; + case 0x7F: INV NOP CYC(2) break; + case 0x80: REL BRA CYC(2) break; + case 0x81: INDX STA CYC(6) break; + case 0x82: INV IMM NOP CYC(2) break; + case 0x83: INV NOP CYC(2) break; + case 0x84: ZPG STY CYC(3) break; + case 0x85: ZPG STA CYC(3) break; + case 0x86: ZPG STX CYC(3) break; + case 0x87: INV NOP CYC(2) break; + case 0x88: DEY CYC(2) break; + case 0x89: IMM BITI CYC(2) break; + case 0x8A: TXA CYC(2) break; + case 0x8B: INV NOP CYC(2) break; + case 0x8C: ABS STY CYC(4) break; + case 0x8D: ABS STA CYC(4) break; + case 0x8E: ABS STX CYC(4) break; + case 0x8F: INV NOP CYC(2) break; + case 0x90: REL BCC CYC(2) break; + case 0x91: INDY STA CYC(6) break; + case 0x92: IZPG STA CYC(5) break; + case 0x93: INV NOP CYC(2) break; + case 0x94: ZPGX STY CYC(4) break; + case 0x95: ZPGX STA CYC(4) break; + case 0x96: ZPGY STX CYC(4) break; + case 0x97: INV NOP CYC(2) break; + case 0x98: TYA CYC(2) break; + case 0x99: ABSY STA CYC(5) break; + case 0x9A: TXS CYC(2) break; + case 0x9B: INV NOP CYC(2) break; + case 0x9C: ABS STZ CYC(4) break; + case 0x9D: ABSX STA CYC(5) break; + case 0x9E: ABSX STZ CYC(5) break; + case 0x9F: INV NOP CYC(2) break; + case 0xA0: IMM LDY CYC(2) break; + case 0xA1: INDX LDA CYC(6) break; + case 0xA2: IMM LDX CYC(2) break; + case 0xA3: INV NOP CYC(2) break; + case 0xA4: ZPG LDY CYC(3) break; + case 0xA5: ZPG LDA CYC(3) break; + case 0xA6: ZPG LDX CYC(3) break; + case 0xA7: INV NOP CYC(2) break; + case 0xA8: TAY CYC(2) break; + case 0xA9: IMM LDA CYC(2) break; + case 0xAA: TAX CYC(2) break; + case 0xAB: INV NOP CYC(2) break; + case 0xAC: ABS LDY CYC(4) break; + case 0xAD: ABS LDA CYC(4) break; + case 0xAE: ABS LDX CYC(4) break; + case 0xAF: INV NOP CYC(2) break; + case 0xB0: REL BCS CYC(2) break; + case 0xB1: INDY LDA CYC(5) break; + case 0xB2: IZPG LDA CYC(5) break; + case 0xB3: INV NOP CYC(2) break; + case 0xB4: ZPGX LDY CYC(4) break; + case 0xB5: ZPGX LDA CYC(4) break; + case 0xB6: ZPGY LDX CYC(4) break; + case 0xB7: INV NOP CYC(2) break; + case 0xB8: CLV CYC(2) break; + case 0xB9: ABSY LDA CYC(4) break; + case 0xBA: TSX CYC(2) break; + case 0xBB: INV NOP CYC(2) break; + case 0xBC: ABSX LDY CYC(4) break; + case 0xBD: ABSX LDA CYC(4) break; + case 0xBE: ABSY LDX CYC(4) break; + case 0xBF: INV NOP CYC(2) break; + case 0xC0: IMM CPY CYC(2) break; + case 0xC1: INDX CMP CYC(6) break; + case 0xC2: INV IMM NOP CYC(2) break; + case 0xC3: INV NOP CYC(2) break; + case 0xC4: ZPG CPY CYC(3) break; + case 0xC5: ZPG CMP CYC(3) break; + case 0xC6: ZPG DEC_CMOS CYC(5) break; + case 0xC7: INV NOP CYC(2) break; + case 0xC8: INY CYC(2) break; + case 0xC9: IMM CMP CYC(2) break; + case 0xCA: DEX CYC(2) break; + case 0xCB: INV NOP CYC(2) break; + case 0xCC: ABS CPY CYC(4) break; + case 0xCD: ABS CMP CYC(4) break; + case 0xCE: ABS DEC_CMOS CYC(5) break; + case 0xCF: INV NOP CYC(2) break; + case 0xD0: REL BNE CYC(2) break; + case 0xD1: INDY CMP CYC(5) break; + case 0xD2: IZPG CMP CYC(5) break; + case 0xD3: INV NOP CYC(2) break; + case 0xD4: INV ZPGX NOP CYC(4) break; + case 0xD5: ZPGX CMP CYC(4) break; + case 0xD6: ZPGX DEC_CMOS CYC(6) break; + case 0xD7: INV NOP CYC(2) break; + case 0xD8: CLD CYC(2) break; + case 0xD9: ABSY CMP CYC(4) break; + case 0xDA: PHX CYC(3) break; + case 0xDB: INV NOP CYC(2) break; + case 0xDC: INV ABSX NOP CYC(4) break; + case 0xDD: ABSX CMP CYC(4) break; + case 0xDE: ABSX DEC_CMOS CYC(6) break; + case 0xDF: INV NOP CYC(2) break; + case 0xE0: IMM CPX CYC(2) break; + case 0xE1: INDX SBC_CMOS CYC(6) break; + case 0xE2: INV IMM NOP CYC(2) break; + case 0xE3: INV NOP CYC(2) break; + case 0xE4: ZPG CPX CYC(3) break; + case 0xE5: ZPG SBC_CMOS CYC(3) break; + case 0xE6: ZPG INC_CMOS CYC(5) break; + case 0xE7: INV NOP CYC(2) break; + case 0xE8: INX CYC(2) break; + case 0xE9: IMM SBC_CMOS CYC(2) break; + case 0xEA: NOP CYC(2) break; + case 0xEB: INV NOP CYC(2) break; + case 0xEC: ABS CPX CYC(4) break; + case 0xED: ABS SBC_CMOS CYC(4) break; + case 0xEE: ABS INC_CMOS CYC(6) break; + case 0xEF: INV NOP CYC(2) break; + case 0xF0: REL BEQ CYC(2) break; + case 0xF1: INDY SBC_CMOS CYC(5) break; + case 0xF2: IZPG SBC_CMOS CYC(5) break; + case 0xF3: INV NOP CYC(2) break; + case 0xF4: INV ZPGX NOP CYC(4) break; + case 0xF5: ZPGX SBC_CMOS CYC(4) break; + case 0xF6: ZPGX INC_CMOS CYC(6) break; + case 0xF7: INV NOP CYC(2) break; + case 0xF8: SED CYC(2) break; + case 0xF9: ABSY SBC_CMOS CYC(4) break; + case 0xFA: PLX CYC(4) break; + case 0xFB: INV NOP CYC(2) break; + case 0xFC: INV ABSX NOP CYC(4) break; + case 0xFD: ABSX SBC_CMOS CYC(4) break; + case 0xFE: ABSX INC_CMOS CYC(6) break; + case 0xFF: INV NOP CYC(2) break; + } + + if(g_bNmiFlank) + { + // NMI signals are only serviced once + g_bNmiFlank = FALSE; + g_nCycleIrqStart = g_nCumulativeCycles + cycles; + PUSH(regs.pc >> 8) + PUSH(regs.pc & 0xFF) + EF_TO_AF + PUSH(regs.ps & ~AF_BREAK) + regs.ps = regs.ps | AF_INTERRUPT & ~AF_DECIMAL; + regs.pc = * (WORD*) (mem+0xFFFA); + CYC(7) + } + + if(g_bmIRQ && !(regs.ps & AF_INTERRUPT)) + { + // IRQ signals are deasserted when a specific r/w operation is done on device + g_nCycleIrqStart = g_nCumulativeCycles + cycles; + PUSH(regs.pc >> 8) + PUSH(regs.pc & 0xFF) + EF_TO_AF + PUSH(regs.ps & ~AF_BREAK) + regs.ps = regs.ps | AF_INTERRUPT & ~AF_DECIMAL; + regs.pc = * (WORD*) (mem+0xFFFE); + CYC(7) + } + + if (bBreakOnInvalid) + break; + } while (cycles < totalcycles); + EF_TO_AF + return cycles; + } + else // Apple ][ + { + do + { + nInternalCyclesLeft = (totalcycles<<8) - (cycles<<8); + USHORT uExtraCycles = 0; + + if (regs.bRESET) + { + regs.bRESET = 0; + EF_TO_AF + regs.ps = regs.ps | AF_INTERRUPT; + regs.pc = * (WORD*) (mem+0xFFFC); + regs.sp = 0x0100 | ((regs.sp - 3) & 0xFF); + CYC(7); + continue; + } + + BYTE iOpcode = *(mem+regs.pc); + if (CheckDebugBreak( iOpcode )) + break; + + regs.pc++; + + switch (iOpcode) { - case 0x00: BRK CYC(7) break; - case 0x01: INDX ORA CYC(6) break; - case 0x02: INV HLT CYC(2) break; - case 0x03: INV INDX ASO CYC(8) break; - case 0x04: INV ZPG NOP CYC(3) break; - case 0x05: ZPG ORA CYC(3) break; - case 0x06: ZPG ASL_NMOS CYC(5) break; - case 0x07: INV ZPG ASO CYC(5) break; - case 0x08: PHP CYC(3) break; - case 0x09: IMM ORA CYC(2) break; - case 0x0A: ASLA CYC(2) break; - case 0x0B: INV IMM ANC CYC(2) break; - case 0x0C: INV ABSX NOP CYC(4) break; - case 0x0D: ABS ORA CYC(4) break; - case 0x0E: ABS ASL_NMOS CYC(6) break; - case 0x0F: INV ABS ASO CYC(6) break; - case 0x10: REL BPL CYC(2) break; - case 0x11: INDY ORA CYC(5) break; - case 0x12: INV HLT CYC(2) break; - case 0x13: INV INDY ASO CYC(8) break; - case 0x14: INV ZPGX NOP CYC(4) break; - case 0x15: ZPGX ORA CYC(4) break; - case 0x16: ZPGX ASL_NMOS CYC(6) break; - case 0x17: INV ZPGX ASO CYC(6) break; - case 0x18: CLC CYC(2) break; - case 0x19: ABSY ORA CYC(4) break; - case 0x1A: INV NOP CYC(2) break; - case 0x1B: INV ABSY ASO CYC(7) break; - case 0x1C: INV ABSX NOP CYC(4) break; - case 0x1D: ABSX ORA CYC(4) break; - case 0x1E: ABSX ASL_NMOS CYC(6) break; - case 0x1F: INV ABSX ASO CYC(7) break; - case 0x20: ABS JSR CYC(6) break; - case 0x21: INDX AND CYC(6) break; - case 0x22: INV HLT CYC(2) break; - case 0x23: INV INDX RLA CYC(8) break; - case 0x24: ZPG BIT CYC(3) break; - case 0x25: ZPG AND CYC(3) break; - case 0x26: ZPG ROL_NMOS CYC(5) break; - case 0x27: INV ZPG RLA CYC(5) break; - case 0x28: PLP CYC(4) break; - case 0x29: IMM AND CYC(2) break; - case 0x2A: ROLA CYC(2) break; - case 0x2B: INV IMM ANC CYC(2) break; - case 0x2C: ABS BIT CYC(4) break; - case 0x2D: ABS AND CYC(2) break; - case 0x2E: ABS ROL_NMOS CYC(6) break; - case 0x2F: INV ABS RLA CYC(6) break; - case 0x30: REL BMI CYC(2) break; - case 0x31: INDY AND CYC(5) break; - case 0x32: INV HLT CYC(2) break; - case 0x33: INV INDY RLA CYC(8) break; - case 0x34: INV ZPGX NOP CYC(4) break; - case 0x35: ZPGX AND CYC(4) break; - case 0x36: ZPGX ROL_NMOS CYC(6) break; - case 0x37: INV ZPGX RLA CYC(6) break; - case 0x38: SEC CYC(2) break; - case 0x39: ABSY AND CYC(4) break; - case 0x3A: INV NOP CYC(2) break; - case 0x3B: INV ABSY RLA CYC(7) break; - case 0x3C: INV ABSX NOP CYC(4) break; - case 0x3D: ABSX AND CYC(4) break; - case 0x3E: ABSX ROL_NMOS CYC(6) break; - case 0x3F: INV ABSX RLA CYC(7) break; - case 0x40: RTI CYC(6) DoIrqProfiling(cycles); break; - case 0x41: INDX EOR CYC(6) break; - case 0x42: INV HLT CYC(2) break; - case 0x43: INV INDX LSE CYC(8) break; - case 0x44: INV ZPG NOP CYC(3) break; - case 0x45: ZPG EOR CYC(3) break; - case 0x46: ZPG LSR_NMOS CYC(5) break; - case 0x47: INV ZPG LSE CYC(5) break; - case 0x48: PHA CYC(3) break; - case 0x49: IMM EOR CYC(2) break; - case 0x4A: LSRA CYC(2) break; - case 0x4B: INV IMM ALR CYC(2) break; - case 0x4C: ABS JMP CYC(3) break; - case 0x4D: ABS EOR CYC(4) break; - case 0x4E: ABS LSR_NMOS CYC(6) break; - case 0x4F: INV ABS LSE CYC(6) break; - case 0x50: REL BVC CYC(2) break; - case 0x51: INDY EOR CYC(5) break; - case 0x52: INV HLT CYC(2) break; - case 0x53: INV INDY LSE CYC(8) break; - case 0x54: INV ZPGX NOP CYC(4) break; - case 0x55: ZPGX EOR CYC(4) break; - case 0x56: ZPGX LSR_NMOS CYC(6) break; - case 0x57: INV ZPGX LSE CYC(6) break; - case 0x58: CLI CYC(2) break; - case 0x59: ABSY EOR CYC(4) break; - case 0x5A: INV NOP CYC(2) break; - case 0x5B: INV ABSY LSE CYC(7) break; - case 0x5C: INV ABSX NOP CYC(4) break; - case 0x5D: ABSX EOR CYC(4) break; - case 0x5E: ABSX LSR_NMOS CYC(6) break; - case 0x5F: INV ABSX LSE CYC(7) break; - case 0x60: RTS CYC(6) break; - case 0x61: INDX ADC_NMOS CYC(6) break; - case 0x62: INV HLT CYC(2) break; - case 0x63: INV INDX RRA CYC(8) break; - case 0x64: INV ZPG NOP CYC(3) break; - case 0x65: ZPG ADC_NMOS CYC(3) break; - case 0x66: ZPG ROR_NMOS CYC(5) break; - case 0x67: INV ZPG RRA CYC(5) break; - case 0x68: PLA CYC(4) break; - case 0x69: IMM ADC_NMOS CYC(2) break; - case 0x6A: RORA CYC(2) break; - case 0x6B: INV IMM ARR CYC(2) break; - case 0x6C: IABSNMOS JMP CYC(6) break; - case 0x6D: ABS ADC_NMOS CYC(4) break; - case 0x6E: ABS ROR_NMOS CYC(6) break; - case 0x6F: INV ABS RRA CYC(6) break; - case 0x70: REL BVS CYC(2) break; - case 0x71: INDY ADC_NMOS CYC(5) break; - case 0x72: INV HLT CYC(2) break; - case 0x73: INV INDY RRA CYC(8) break; - case 0x74: INV ZPGX NOP CYC(4) break; - case 0x75: ZPGX ADC_NMOS CYC(4) break; - case 0x76: ZPGX ROR_NMOS CYC(6) break; - case 0x77: INV ZPGX RRA CYC(6) break; - case 0x78: SEI CYC(2) break; - case 0x79: ABSY ADC_NMOS CYC(4) break; - case 0x7A: INV NOP CYC(2) break; - case 0x7B: INV ABSY RRA CYC(7) break; - case 0x7C: INV ABSX NOP CYC(4) break; - case 0x7D: ABSX ADC_NMOS CYC(4) break; - case 0x7E: ABSX ROR_NMOS CYC(6) break; - case 0x7F: INV ABSX RRA CYC(7) break; - case 0x80: INV IMM NOP CYC(2) break; - case 0x81: INDX STA CYC(6) break; - case 0x82: INV IMM NOP CYC(2) break; - case 0x83: INV INDX AXS CYC(6) break; - case 0x84: ZPG STY CYC(3) break; - case 0x85: ZPG STA CYC(3) break; - case 0x86: ZPG STX CYC(3) break; - case 0x87: INV ZPG AXS CYC(3) break; - case 0x88: DEY CYC(2) break; - case 0x89: INV IMM NOP CYC(2) break; - case 0x8A: TXA CYC(2) break; - case 0x8B: INV IMM XAA CYC(2) break; - case 0x8C: ABS STY CYC(4) break; - case 0x8D: ABS STA CYC(4) break; - case 0x8E: ABS STX CYC(4) break; - case 0x8F: INV ABS AXS CYC(4) break; - case 0x90: REL BCC CYC(2) break; - case 0x91: INDY STA CYC(6) break; - case 0x92: INV HLT CYC(2) break; - case 0x93: INV INDY AXA CYC(6) break; - case 0x94: ZPGX STY CYC(4) break; - case 0x95: ZPGX STA CYC(4) break; - case 0x96: ZPGY STX CYC(4) break; - case 0x97: INV ZPGY AXS CYC(4) break; - case 0x98: TYA CYC(2) break; - case 0x99: ABSY STA CYC(5) break; - case 0x9A: TXS CYC(2) break; - case 0x9B: INV ABSY TAS CYC(5) break; - case 0x9C: INV ABSX SAY CYC(5) break; - case 0x9D: ABSX STA CYC(5) break; - case 0x9E: INV ABSY XAS CYC(5) break; - case 0x9F: INV ABSY AXA CYC(5) break; - case 0xA0: IMM LDY CYC(2) break; - case 0xA1: INDX LDA CYC(6) break; - case 0xA2: IMM LDX CYC(2) break; - case 0xA3: INV INDX LAX CYC(6) break; - case 0xA4: ZPG LDY CYC(3) break; - case 0xA5: ZPG LDA CYC(3) break; - case 0xA6: ZPG LDX CYC(3) break; - case 0xA7: INV ZPG LAX CYC(3) break; - case 0xA8: TAY CYC(2) break; - case 0xA9: IMM LDA CYC(2) break; - case 0xAA: TAX CYC(2) break; - case 0xAB: INV IMM OAL CYC(2) break; - case 0xAC: ABS LDY CYC(4) break; - case 0xAD: ABS LDA CYC(4) break; - case 0xAE: ABS LDX CYC(4) break; - case 0xAF: INV ABS LAX CYC(4) break; - case 0xB0: REL BCS CYC(2) break; - case 0xB1: INDY LDA CYC(5) break; - case 0xB2: INV HLT CYC(2) break; - case 0xB3: INV INDY LAX CYC(5) break; - case 0xB4: ZPGX LDY CYC(4) break; - case 0xB5: ZPGX LDA CYC(4) break; - case 0xB6: ZPGY LDX CYC(4) break; - case 0xB7: INV ZPGY LAX CYC(4) break; - case 0xB8: CLV CYC(2) break; - case 0xB9: ABSY LDA CYC(4) break; - case 0xBA: TSX CYC(2) break; - case 0xBB: INV ABSY LAS CYC(4) break; - case 0xBC: ABSX LDY CYC(4) break; - case 0xBD: ABSX LDA CYC(4) break; - case 0xBE: ABSY LDX CYC(4) break; - case 0xBF: INV ABSY LAX CYC(4) break; - case 0xC0: IMM CPY CYC(2) break; - case 0xC1: INDX CMP CYC(6) break; - case 0xC2: INV IMM NOP CYC(2) break; - case 0xC3: INV INDX DCM CYC(8) break; - case 0xC4: ZPG CPY CYC(3) break; - case 0xC5: ZPG CMP CYC(3) break; - case 0xC6: ZPG DEC_NMOS CYC(5) break; - case 0xC7: INV ZPG DCM CYC(5) break; - case 0xC8: INY CYC(2) break; - case 0xC9: IMM CMP CYC(2) break; - case 0xCA: DEX CYC(2) break; - case 0xCB: INV IMM SAX CYC(2) break; - case 0xCC: ABS CPY CYC(4) break; - case 0xCD: ABS CMP CYC(4) break; - case 0xCE: ABS DEC_NMOS CYC(5) break; - case 0xCF: INV ABS DCM CYC(6) break; - case 0xD0: REL BNE CYC(2) break; - case 0xD1: INDY CMP CYC(5) break; - case 0xD2: INV HLT CYC(2) break; - case 0xD3: INV INDY DCM CYC(8) break; - case 0xD4: INV ZPGX NOP CYC(4) break; - case 0xD5: ZPGX CMP CYC(4) break; - case 0xD6: ZPGX DEC_NMOS CYC(6) break; - case 0xD7: INV ZPGX DCM CYC(6) break; - case 0xD8: CLD CYC(2) break; - case 0xD9: ABSY CMP CYC(4) break; - case 0xDA: INV NOP CYC(2) break; - case 0xDB: INV ABSY DCM CYC(7) break; - case 0xDC: INV ABSX NOP CYC(4) break; - case 0xDD: ABSX CMP CYC(4) break; - case 0xDE: ABSX DEC_NMOS CYC(6) break; - case 0xDF: INV ABSX DCM CYC(7) break; - case 0xE0: IMM CPX CYC(2) break; - case 0xE1: INDX SBC_NMOS CYC(6) break; - case 0xE2: INV IMM NOP CYC(2) break; - case 0xE3: INV INDX INS CYC(8) break; - case 0xE4: ZPG CPX CYC(3) break; - case 0xE5: ZPG SBC_NMOS CYC(3) break; - case 0xE6: ZPG INC_NMOS CYC(5) break; - case 0xE7: INV ZPG INS CYC(5) break; - case 0xE8: INX CYC(2) break; - case 0xE9: IMM SBC_NMOS CYC(2) break; - case 0xEA: NOP CYC(2) break; - case 0xEB: INV IMM SBC_NMOS CYC(2) break; - case 0xEC: ABS CPX CYC(4) break; - case 0xED: ABS SBC_NMOS CYC(4) break; - case 0xEE: ABS INC_NMOS CYC(6) break; - case 0xEF: INV ABS INS CYC(6) break; - case 0xF0: REL BEQ CYC(2) break; - case 0xF1: INDY SBC_NMOS CYC(5) break; - case 0xF2: INV HLT CYC(2) break; - case 0xF3: INV INDY INS CYC(8) break; - case 0xF4: INV ZPGX NOP CYC(4) break; - case 0xF5: ZPGX SBC_NMOS CYC(4) break; - case 0xF6: ZPGX INC_NMOS CYC(6) break; - case 0xF7: INV ZPGX INS CYC(6) break; - case 0xF8: SED CYC(2) break; - case 0xF9: ABSY SBC_NMOS CYC(4) break; - case 0xFA: INV NOP CYC(2) break; - case 0xFB: INV ABSY INS CYC(7) break; - case 0xFC: INV ABSX NOP CYC(4) break; - case 0xFD: ABSX SBC_NMOS CYC(4) break; - case 0xFE: ABSX INC_NMOS CYC(6) break; - case 0xFF: INV ABSX INS CYC(7) break; - } - if(g_bNmiFlank && !regs.bJammed) - { - // NMI signals are only serviced once - g_bNmiFlank = FALSE; - g_nCycleIrqStart = g_nCumulativeCycles + cycles; - PUSH(regs.pc >> 8) - PUSH(regs.pc & 0xFF) - EF_TO_AF - PUSH(regs.ps & ~AF_BREAK) - regs.ps = regs.ps | AF_INTERRUPT; - regs.pc = * (WORD*) (mem+0xFFFA); - CYC(7) - } - if(g_bmIRQ && !(regs.ps & AF_INTERRUPT) && !regs.bJammed) - { - // IRQ signals are deasserted when a specific r/w operation is done on device - g_nCycleIrqStart = g_nCumulativeCycles + cycles; - PUSH(regs.pc >> 8) - PUSH(regs.pc & 0xFF) - EF_TO_AF - PUSH(regs.ps & ~AF_BREAK) - regs.ps = regs.ps | AF_INTERRUPT; - regs.pc = * (WORD*) (mem+0xFFFE); - CYC(7) - } - if (bBreakOnInvalid) - break; - } while (cycles < totalcycles); - EF_TO_AF - return cycles; - } + case 0x00: BRK CYC(7) break; + case 0x01: INDX ORA CYC(6) break; + case 0x02: INV HLT CYC(2) break; + case 0x03: INV INDX ASO CYC(8) break; + case 0x04: INV ZPG NOP CYC(3) break; + case 0x05: ZPG ORA CYC(3) break; + case 0x06: ZPG ASL_NMOS CYC(5) break; + case 0x07: INV ZPG ASO CYC(5) break; + case 0x08: PHP CYC(3) break; + case 0x09: IMM ORA CYC(2) break; + case 0x0A: ASLA CYC(2) break; + case 0x0B: INV IMM ANC CYC(2) break; + case 0x0C: INV ABSX NOP CYC(4) break; + case 0x0D: ABS ORA CYC(4) break; + case 0x0E: ABS ASL_NMOS CYC(6) break; + case 0x0F: INV ABS ASO CYC(6) break; + case 0x10: REL BPL CYC(2) break; + case 0x11: INDY ORA CYC(5) break; + case 0x12: INV HLT CYC(2) break; + case 0x13: INV INDY ASO CYC(8) break; + case 0x14: INV ZPGX NOP CYC(4) break; + case 0x15: ZPGX ORA CYC(4) break; + case 0x16: ZPGX ASL_NMOS CYC(6) break; + case 0x17: INV ZPGX ASO CYC(6) break; + case 0x18: CLC CYC(2) break; + case 0x19: ABSY ORA CYC(4) break; + case 0x1A: INV NOP CYC(2) break; + case 0x1B: INV ABSY ASO CYC(7) break; + case 0x1C: INV ABSX NOP CYC(4) break; + case 0x1D: ABSX ORA CYC(4) break; + case 0x1E: ABSX ASL_NMOS CYC(6) break; + case 0x1F: INV ABSX ASO CYC(7) break; + case 0x20: ABS JSR CYC(6) break; + case 0x21: INDX AND CYC(6) break; + case 0x22: INV HLT CYC(2) break; + case 0x23: INV INDX RLA CYC(8) break; + case 0x24: ZPG BIT CYC(3) break; + case 0x25: ZPG AND CYC(3) break; + case 0x26: ZPG ROL_NMOS CYC(5) break; + case 0x27: INV ZPG RLA CYC(5) break; + case 0x28: PLP CYC(4) break; + case 0x29: IMM AND CYC(2) break; + case 0x2A: ROLA CYC(2) break; + case 0x2B: INV IMM ANC CYC(2) break; + case 0x2C: ABS BIT CYC(4) break; + case 0x2D: ABS AND CYC(2) break; + case 0x2E: ABS ROL_NMOS CYC(6) break; + case 0x2F: INV ABS RLA CYC(6) break; + case 0x30: REL BMI CYC(2) break; + case 0x31: INDY AND CYC(5) break; + case 0x32: INV HLT CYC(2) break; + case 0x33: INV INDY RLA CYC(8) break; + case 0x34: INV ZPGX NOP CYC(4) break; + case 0x35: ZPGX AND CYC(4) break; + case 0x36: ZPGX ROL_NMOS CYC(6) break; + case 0x37: INV ZPGX RLA CYC(6) break; + case 0x38: SEC CYC(2) break; + case 0x39: ABSY AND CYC(4) break; + case 0x3A: INV NOP CYC(2) break; + case 0x3B: INV ABSY RLA CYC(7) break; + case 0x3C: INV ABSX NOP CYC(4) break; + case 0x3D: ABSX AND CYC(4) break; + case 0x3E: ABSX ROL_NMOS CYC(6) break; + case 0x3F: INV ABSX RLA CYC(7) break; + case 0x40: RTI CYC(6) DoIrqProfiling(cycles); break; + case 0x41: INDX EOR CYC(6) break; + case 0x42: INV HLT CYC(2) break; + case 0x43: INV INDX LSE CYC(8) break; + case 0x44: INV ZPG NOP CYC(3) break; + case 0x45: ZPG EOR CYC(3) break; + case 0x46: ZPG LSR_NMOS CYC(5) break; + case 0x47: INV ZPG LSE CYC(5) break; + case 0x48: PHA CYC(3) break; + case 0x49: IMM EOR CYC(2) break; + case 0x4A: LSRA CYC(2) break; + case 0x4B: INV IMM ALR CYC(2) break; + case 0x4C: ABS JMP CYC(3) break; + case 0x4D: ABS EOR CYC(4) break; + case 0x4E: ABS LSR_NMOS CYC(6) break; + case 0x4F: INV ABS LSE CYC(6) break; + case 0x50: REL BVC CYC(2) break; + case 0x51: INDY EOR CYC(5) break; + case 0x52: INV HLT CYC(2) break; + case 0x53: INV INDY LSE CYC(8) break; + case 0x54: INV ZPGX NOP CYC(4) break; + case 0x55: ZPGX EOR CYC(4) break; + case 0x56: ZPGX LSR_NMOS CYC(6) break; + case 0x57: INV ZPGX LSE CYC(6) break; + case 0x58: CLI CYC(2) break; + case 0x59: ABSY EOR CYC(4) break; + case 0x5A: INV NOP CYC(2) break; + case 0x5B: INV ABSY LSE CYC(7) break; + case 0x5C: INV ABSX NOP CYC(4) break; + case 0x5D: ABSX EOR CYC(4) break; + case 0x5E: ABSX LSR_NMOS CYC(6) break; + case 0x5F: INV ABSX LSE CYC(7) break; + case 0x60: RTS CYC(6) break; + case 0x61: INDX ADC_NMOS CYC(6) break; + case 0x62: INV HLT CYC(2) break; + case 0x63: INV INDX RRA CYC(8) break; + case 0x64: INV ZPG NOP CYC(3) break; + case 0x65: ZPG ADC_NMOS CYC(3) break; + case 0x66: ZPG ROR_NMOS CYC(5) break; + case 0x67: INV ZPG RRA CYC(5) break; + case 0x68: PLA CYC(4) break; + case 0x69: IMM ADC_NMOS CYC(2) break; + case 0x6A: RORA CYC(2) break; + case 0x6B: INV IMM ARR CYC(2) break; + case 0x6C: IABSNMOS JMP CYC(6) break; + case 0x6D: ABS ADC_NMOS CYC(4) break; + case 0x6E: ABS ROR_NMOS CYC(6) break; + case 0x6F: INV ABS RRA CYC(6) break; + case 0x70: REL BVS CYC(2) break; + case 0x71: INDY ADC_NMOS CYC(5) break; + case 0x72: INV HLT CYC(2) break; + case 0x73: INV INDY RRA CYC(8) break; + case 0x74: INV ZPGX NOP CYC(4) break; + case 0x75: ZPGX ADC_NMOS CYC(4) break; + case 0x76: ZPGX ROR_NMOS CYC(6) break; + case 0x77: INV ZPGX RRA CYC(6) break; + case 0x78: SEI CYC(2) break; + case 0x79: ABSY ADC_NMOS CYC(4) break; + case 0x7A: INV NOP CYC(2) break; + case 0x7B: INV ABSY RRA CYC(7) break; + case 0x7C: INV ABSX NOP CYC(4) break; + case 0x7D: ABSX ADC_NMOS CYC(4) break; + case 0x7E: ABSX ROR_NMOS CYC(6) break; + case 0x7F: INV ABSX RRA CYC(7) break; + case 0x80: INV IMM NOP CYC(2) break; + case 0x81: INDX STA CYC(6) break; + case 0x82: INV IMM NOP CYC(2) break; + case 0x83: INV INDX AXS CYC(6) break; + case 0x84: ZPG STY CYC(3) break; + case 0x85: ZPG STA CYC(3) break; + case 0x86: ZPG STX CYC(3) break; + case 0x87: INV ZPG AXS CYC(3) break; + case 0x88: DEY CYC(2) break; + case 0x89: INV IMM NOP CYC(2) break; + case 0x8A: TXA CYC(2) break; + case 0x8B: INV IMM XAA CYC(2) break; + case 0x8C: ABS STY CYC(4) break; + case 0x8D: ABS STA CYC(4) break; + case 0x8E: ABS STX CYC(4) break; + case 0x8F: INV ABS AXS CYC(4) break; + case 0x90: REL BCC CYC(2) break; + case 0x91: INDY STA CYC(6) break; + case 0x92: INV HLT CYC(2) break; + case 0x93: INV INDY AXA CYC(6) break; + case 0x94: ZPGX STY CYC(4) break; + case 0x95: ZPGX STA CYC(4) break; + case 0x96: ZPGY STX CYC(4) break; + case 0x97: INV ZPGY AXS CYC(4) break; + case 0x98: TYA CYC(2) break; + case 0x99: ABSY STA CYC(5) break; + case 0x9A: TXS CYC(2) break; + case 0x9B: INV ABSY TAS CYC(5) break; + case 0x9C: INV ABSX SAY CYC(5) break; + case 0x9D: ABSX STA CYC(5) break; + case 0x9E: INV ABSY XAS CYC(5) break; + case 0x9F: INV ABSY AXA CYC(5) break; + case 0xA0: IMM LDY CYC(2) break; + case 0xA1: INDX LDA CYC(6) break; + case 0xA2: IMM LDX CYC(2) break; + case 0xA3: INV INDX LAX CYC(6) break; + case 0xA4: ZPG LDY CYC(3) break; + case 0xA5: ZPG LDA CYC(3) break; + case 0xA6: ZPG LDX CYC(3) break; + case 0xA7: INV ZPG LAX CYC(3) break; + case 0xA8: TAY CYC(2) break; + case 0xA9: IMM LDA CYC(2) break; + case 0xAA: TAX CYC(2) break; + case 0xAB: INV IMM OAL CYC(2) break; + case 0xAC: ABS LDY CYC(4) break; + case 0xAD: ABS LDA CYC(4) break; + case 0xAE: ABS LDX CYC(4) break; + case 0xAF: INV ABS LAX CYC(4) break; + case 0xB0: REL BCS CYC(2) break; + case 0xB1: INDY LDA CYC(5) break; + case 0xB2: INV HLT CYC(2) break; + case 0xB3: INV INDY LAX CYC(5) break; + case 0xB4: ZPGX LDY CYC(4) break; + case 0xB5: ZPGX LDA CYC(4) break; + case 0xB6: ZPGY LDX CYC(4) break; + case 0xB7: INV ZPGY LAX CYC(4) break; + case 0xB8: CLV CYC(2) break; + case 0xB9: ABSY LDA CYC(4) break; + case 0xBA: TSX CYC(2) break; + case 0xBB: INV ABSY LAS CYC(4) break; + case 0xBC: ABSX LDY CYC(4) break; + case 0xBD: ABSX LDA CYC(4) break; + case 0xBE: ABSY LDX CYC(4) break; + case 0xBF: INV ABSY LAX CYC(4) break; + case 0xC0: IMM CPY CYC(2) break; + case 0xC1: INDX CMP CYC(6) break; + case 0xC2: INV IMM NOP CYC(2) break; + case 0xC3: INV INDX DCM CYC(8) break; + case 0xC4: ZPG CPY CYC(3) break; + case 0xC5: ZPG CMP CYC(3) break; + case 0xC6: ZPG DEC_NMOS CYC(5) break; + case 0xC7: INV ZPG DCM CYC(5) break; + case 0xC8: INY CYC(2) break; + case 0xC9: IMM CMP CYC(2) break; + case 0xCA: DEX CYC(2) break; + case 0xCB: INV IMM SAX CYC(2) break; + case 0xCC: ABS CPY CYC(4) break; + case 0xCD: ABS CMP CYC(4) break; + case 0xCE: ABS DEC_NMOS CYC(5) break; + case 0xCF: INV ABS DCM CYC(6) break; + case 0xD0: REL BNE CYC(2) break; + case 0xD1: INDY CMP CYC(5) break; + case 0xD2: INV HLT CYC(2) break; + case 0xD3: INV INDY DCM CYC(8) break; + case 0xD4: INV ZPGX NOP CYC(4) break; + case 0xD5: ZPGX CMP CYC(4) break; + case 0xD6: ZPGX DEC_NMOS CYC(6) break; + case 0xD7: INV ZPGX DCM CYC(6) break; + case 0xD8: CLD CYC(2) break; + case 0xD9: ABSY CMP CYC(4) break; + case 0xDA: INV NOP CYC(2) break; + case 0xDB: INV ABSY DCM CYC(7) break; + case 0xDC: INV ABSX NOP CYC(4) break; + case 0xDD: ABSX CMP CYC(4) break; + case 0xDE: ABSX DEC_NMOS CYC(6) break; + case 0xDF: INV ABSX DCM CYC(7) break; + case 0xE0: IMM CPX CYC(2) break; + case 0xE1: INDX SBC_NMOS CYC(6) break; + case 0xE2: INV IMM NOP CYC(2) break; + case 0xE3: INV INDX INS CYC(8) break; + case 0xE4: ZPG CPX CYC(3) break; + case 0xE5: ZPG SBC_NMOS CYC(3) break; + case 0xE6: ZPG INC_NMOS CYC(5) break; + case 0xE7: INV ZPG INS CYC(5) break; + case 0xE8: INX CYC(2) break; + case 0xE9: IMM SBC_NMOS CYC(2) break; + case 0xEA: NOP CYC(2) break; + case 0xEB: INV IMM SBC_NMOS CYC(2) break; + case 0xEC: ABS CPX CYC(4) break; + case 0xED: ABS SBC_NMOS CYC(4) break; + case 0xEE: ABS INC_NMOS CYC(6) break; + case 0xEF: INV ABS INS CYC(6) break; + case 0xF0: REL BEQ CYC(2) break; + case 0xF1: INDY SBC_NMOS CYC(5) break; + case 0xF2: INV HLT CYC(2) break; + case 0xF3: INV INDY INS CYC(8) break; + case 0xF4: INV ZPGX NOP CYC(4) break; + case 0xF5: ZPGX SBC_NMOS CYC(4) break; + case 0xF6: ZPGX INC_NMOS CYC(6) break; + case 0xF7: INV ZPGX INS CYC(6) break; + case 0xF8: SED CYC(2) break; + case 0xF9: ABSY SBC_NMOS CYC(4) break; + case 0xFA: INV NOP CYC(2) break; + case 0xFB: INV ABSY INS CYC(7) break; + case 0xFC: INV ABSX NOP CYC(4) break; + case 0xFD: ABSX SBC_NMOS CYC(4) break; + case 0xFE: ABSX INC_NMOS CYC(6) break; + case 0xFF: INV ABSX INS CYC(7) break; + } + + if(g_bNmiFlank && !regs.bJammed) + { + // NMI signals are only serviced once + g_bNmiFlank = FALSE; + g_nCycleIrqStart = g_nCumulativeCycles + cycles; + PUSH(regs.pc >> 8) + PUSH(regs.pc & 0xFF) + EF_TO_AF + PUSH(regs.ps & ~AF_BREAK) + regs.ps = regs.ps | AF_INTERRUPT; + regs.pc = * (WORD*) (mem+0xFFFA); + CYC(7) + } + + if(g_bmIRQ && !(regs.ps & AF_INTERRUPT) && !regs.bJammed) + { + // IRQ signals are deasserted when a specific r/w operation is done on device + g_nCycleIrqStart = g_nCumulativeCycles + cycles; + PUSH(regs.pc >> 8) + PUSH(regs.pc & 0xFF) + EF_TO_AF + PUSH(regs.ps & ~AF_BREAK) + regs.ps = regs.ps | AF_INTERRUPT; + regs.pc = * (WORD*) (mem+0xFFFE); + CYC(7) + } + + if (bBreakOnInvalid) + break; + } while (cycles < totalcycles); + + EF_TO_AF + return cycles; + } } // diff --git a/source/Common.h b/source/Common.h index bd091e00..d2592c92 100644 --- a/source/Common.h +++ b/source/Common.h @@ -18,11 +18,20 @@ const DWORD dwClksPerFrame = uCyclesPerLine * uLinesPerFrame; // 17030 // Assume base freqs are 44.1KHz & 48KHz const DWORD SPKR_SAMPLE_RATE = 44100; -#define MODE_LOGO 0 -#define MODE_PAUSED 1 -#define MODE_RUNNING 2 -#define MODE_DEBUG 3 -#define MODE_STEPPING 4 +enum AppMode_e +{ + MODE_LOGO = 0 + , MODE_PAUSED + , MODE_RUNNING + , MODE_DEBUG + , MODE_STEPPING +}; + +//#define MODE_LOGO 0 +//#define MODE_PAUSED 1 +//#define MODE_RUNNING 2 +//#define MODE_DEBUG 3 +//#define MODE_STEPPING 4 #define SPEED_MIN 0 #define SPEED_NORMAL 10 diff --git a/source/Debug.cpp b/source/Debug.cpp index 13283142..e803be0d 100644 --- a/source/Debug.cpp +++ b/source/Debug.cpp @@ -52,8 +52,9 @@ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // Breakpoints ________________________________________________________________ // Full-Speed debugging - int g_nDebugOnBreakInvalid = 0; - int g_iDebugOnOpcode = 0; + int g_nDebugOnBreakInvalid = 0; + int g_iDebugOnOpcode = 0; + bool g_bDebugDelayBreakCheck = false; int g_nBreakpoints = 0; Breakpoint_t g_aBreakpoints[ NUM_BREAKPOINTS ]; @@ -969,14 +970,14 @@ Update_t CmdBreakOpcode (int nArgs) // Breakpoint IFF Full-speed! if (g_iDebugOnOpcode == 0) // Show what the current break opcode is - wsprintf( sText, TEXT("%s break on opcode: None") + wsprintf( sText, TEXT("%s full speed Break on Opcode: None") , sAction , g_iDebugOnOpcode , g_aOpcodes65C02[ g_iDebugOnOpcode ].sMnemonic ); else // Show what the current break opcode is - wsprintf( sText, TEXT("%s break on opcode: %02X %s") + wsprintf( sText, TEXT("%s full speed Break on Opcode: %02X %s") , sAction , g_iDebugOnOpcode , g_aOpcodes65C02[ g_iDebugOnOpcode ].sMnemonic @@ -1442,7 +1443,7 @@ Update_t CmdBenchmarkStop (int nArgs) { g_bBenchmarking = false; DebugEnd(); - mode = MODE_RUNNING; + g_nAppMode = MODE_RUNNING; FrameRefreshStatus(DRAW_TITLE); VideoRedrawScreen(); DWORD currtime = GetTickCount(); @@ -5084,7 +5085,7 @@ Update_t CmdGo (int nArgs) // if (!g_nDebugStepUntil) // g_nDebugStepUntil = GetAddress(g_aArgs[1].sArg); - mode = MODE_STEPPING; + g_nAppMode = MODE_STEPPING; FrameRefreshStatus(DRAW_TITLE); return UPDATE_CONSOLE_DISPLAY; // TODO: Verify // 0; @@ -5141,7 +5142,7 @@ Update_t CmdTrace (int nArgs) g_nDebugStepCycles = 0; g_nDebugStepStart = regs.pc; g_nDebugStepUntil = -1; - mode = MODE_STEPPING; + g_nAppMode = MODE_STEPPING; FrameRefreshStatus(DRAW_TITLE); DebugContinueStepping(); @@ -5169,7 +5170,7 @@ Update_t CmdTraceLine (int nArgs) g_nDebugStepStart = regs.pc; g_nDebugStepUntil = -1; - mode = MODE_STEPPING; + g_nAppMode = MODE_STEPPING; FrameRefreshStatus(DRAW_TITLE); DebugContinueStepping(); @@ -6146,7 +6147,7 @@ Update_t ExecuteCommand (int nArgs) ArgsGetValue( pArg, & nAddress ); regs.pc = nAddress; - mode = MODE_RUNNING; // exit the debugger + g_nAppMode = MODE_RUNNING; // exit the debugger nFound = 1; g_iCommand = CMD_CONFIG_ECHO; // hack: don't cook args @@ -6759,7 +6760,7 @@ void DebugBegin () MemSetFastPaging(0); } - mode = MODE_DEBUG; + g_nAppMode = MODE_DEBUG; FrameRefreshStatus(DRAW_TITLE); if (apple2e) @@ -6787,15 +6788,15 @@ void DebugContinueStepping () { if ((regs.pc >= g_nDebugSkipStart) && (regs.pc < (g_nDebugSkipStart + g_nDebugSkipLen))) { - // Enter turbo debugger mode -- UI not updated, etc. + // Enter turbo debugger g_nAppMode -- UI not updated, etc. g_nDebugSteps = -1; - mode = MODE_STEPPING; + g_nAppMode = MODE_STEPPING; } else { - // Enter normal debugger mode -- UI updated every instruction, etc. + // Enter normal debugger g_nAppMode -- UI updated every instruction, etc. g_nDebugSteps = 1; - mode = MODE_STEPPING; + g_nAppMode = MODE_STEPPING; } } @@ -6830,7 +6831,7 @@ void DebugContinueStepping () } else { - mode = MODE_DEBUG; + g_nAppMode = MODE_DEBUG; FrameRefreshStatus(DRAW_TITLE); // BUG: PageUp, Trace - doesn't center cursor @@ -7123,10 +7124,12 @@ void DebugInitialize () void DebuggerInputConsoleChar( TCHAR ch ) //void DebugProcessChar (TCHAR ch) { - if ((mode == MODE_STEPPING) && (ch == DEBUG_EXIT_KEY)) + if ((g_nAppMode == MODE_STEPPING) && (ch == DEBUG_EXIT_KEY)) + { g_nDebugSteps = 0; // Exit Debugger + } - if (mode != MODE_DEBUG) + if (g_nAppMode != MODE_DEBUG) return; if (g_bConsoleBufferPaused) @@ -7295,14 +7298,14 @@ Update_t DebuggerProcessCommand( const bool bEchoConsoleInput ) void DebuggerProcessKey( int keycode ) //void DebugProcessCommand (int keycode) { - if (mode != MODE_DEBUG) + if (g_nAppMode != MODE_DEBUG) return; if (g_bDebuggerViewingAppleOutput) { - // Normally any key press takes us out of "Viewing Apple Output" mode - // VK_F# are already processed, so we can't use them to cycle next video mode -// if ((mode != MODE_LOGO) && (mode != MODE_DEBUG)) + // Normally any key press takes us out of "Viewing Apple Output" g_nAppMode + // VK_F# are already processed, so we can't use them to cycle next video g_nAppMode +// if ((g_nAppMode != MODE_LOGO) && (g_nAppMode != MODE_DEBUG)) g_bDebuggerViewingAppleOutput = false; UpdateDisplay( UPDATE_ALL ); // 1 return; @@ -7331,7 +7334,7 @@ void DebuggerProcessKey( int keycode ) } else // If have console input, don't invoke cursor movement - // TODO: Probably should disable all "movement" keys to map them to line editing mode + // TODO: Probably should disable all "movement" keys to map them to line editing g_nAppMode if ((keycode == VK_SPACE) && g_nConsoleInputChars) return; else if (keycode == VK_ESCAPE) diff --git a/source/Debug.h b/source/Debug.h index 8b30a955..49333fe2 100644 --- a/source/Debug.h +++ b/source/Debug.h @@ -26,8 +26,9 @@ using namespace std; extern const TCHAR *g_aBreakpointSymbols[ NUM_BREAKPOINT_OPERATORS ]; // Full-Speed debugging - extern int g_nDebugOnBreakInvalid; - extern int g_iDebugOnOpcode ; + extern int g_nDebugOnBreakInvalid; + extern int g_iDebugOnOpcode ; + extern bool g_bDebugDelayBreakCheck; // Commands extern const int NUM_COMMANDS_WITH_ALIASES; // = sizeof(g_aCommands) / sizeof (Command_t); // Determined at compile-time ;-) diff --git a/source/Debugger_Display.cpp b/source/Debugger_Display.cpp index 07b65e7b..d5d18cca 100644 --- a/source/Debugger_Display.cpp +++ b/source/Debugger_Display.cpp @@ -126,7 +126,7 @@ bool CanDrawDebugger() if (g_bDebuggerViewingAppleOutput) return false; - if ((mode == MODE_DEBUG) || (mode == MODE_STEPPING)) + if ((g_nAppMode == MODE_DEBUG) || (g_nAppMode == MODE_STEPPING)) return true; return false; diff --git a/source/Debugger_Types.h b/source/Debugger_Types.h index 99cd2bca..e1829591 100644 --- a/source/Debugger_Types.h +++ b/source/Debugger_Types.h @@ -23,7 +23,7 @@ /* +---------------------+--------------------------+ - | mode | assembler format | + | g_nAppMode | assembler format | +=====================+==========================+ | Immediate | #aa | | Absolute | aaaa | @@ -43,7 +43,7 @@ Opcode: opc aaa od opc...od = Mnemonic / Opcode - ...aaa.. = Addressing mode + ...aaa.. = Addressing g_nAppMode od = 00 000 #Immediate 001 Zero page @@ -291,7 +291,7 @@ , FG_DISASM_PC_X // White (not cursor) , FG_DISASM_ADDRESS // White addr - , FG_DISASM_OPERATOR // Gray192 : $ (also around instruction addressing mode) + , FG_DISASM_OPERATOR // Gray192 : $ (also around instruction addressing g_nAppMode) , FG_DISASM_OPCODE // Yellow xx xx xx , FG_DISASM_MNEMONIC // White LDA , FG_DISASM_TARGET // Orange FAC8 diff --git a/source/Frame.cpp b/source/Frame.cpp index 1003d9b5..486215d0 100644 --- a/source/Frame.cpp +++ b/source/Frame.cpp @@ -319,9 +319,9 @@ void DrawFrameWindow () { ReleaseDC(g_hFrameWindow,dc); // DRAW THE CONTENTS OF THE EMULATED SCREEN - if (mode == MODE_LOGO) + if (g_nAppMode == MODE_LOGO) VideoDisplayLogo(); - else if (mode == MODE_DEBUG) + else if (g_nAppMode == MODE_DEBUG) DebugDisplay(1); else VideoRedrawScreen(); @@ -354,10 +354,10 @@ void DrawStatusArea (HDC passdc, int drawflags) { TextOut(dc,x+BUTTONCX,y+2,TEXT("Caps"),4); } SetTextAlign(dc,TA_CENTER | TA_TOP); - SetTextColor(dc,(mode == MODE_PAUSED || - mode == MODE_STEPPING ? RGB(255,255,255) : + SetTextColor(dc,(g_nAppMode == MODE_PAUSED || + g_nAppMode == MODE_STEPPING ? RGB(255,255,255) : RGB( 0, 0, 0))); - TextOut(dc,x+BUTTONCX/2,y+13,(mode == MODE_PAUSED ? TEXT(" Paused ") : + TextOut(dc,x+BUTTONCX/2,y+13,(g_nAppMode == MODE_PAUSED ? TEXT(" Paused ") : TEXT("Stepping")),8); } else { @@ -386,7 +386,7 @@ void DrawStatusArea (HDC passdc, int drawflags) { TCHAR title[40]; _tcscpy(title,apple2e ? TITLE : (apple2plus ? TEXT("Apple ][+ Emulator") : TEXT("Apple ][ Emulator"))); - switch (mode) { + switch (g_nAppMode) { case MODE_PAUSED: _tcscat(title,TEXT(" [Paused]")); break; case MODE_STEPPING: _tcscat(title,TEXT(" [Stepping]")); break; } @@ -445,10 +445,10 @@ LRESULT CALLBACK FrameWndProc (HWND window, break; case WM_CHAR: - if ((mode == MODE_RUNNING) || (mode == MODE_LOGO) || - ((mode == MODE_STEPPING) && (wparam != TEXT('\x1B')))) + if ((g_nAppMode == MODE_RUNNING) || (g_nAppMode == MODE_LOGO) || + ((g_nAppMode == MODE_STEPPING) && (wparam != TEXT('\x1B')))) KeybQueueKeypress((int)wparam,ASCII); - else if ((mode == MODE_DEBUG) || (mode == MODE_STEPPING)) + else if ((g_nAppMode == MODE_DEBUG) || (g_nAppMode == MODE_STEPPING)) // DebugProcessChar((TCHAR)wparam); DebuggerInputConsoleChar((TCHAR)wparam); @@ -554,7 +554,7 @@ LRESULT CALLBACK FrameWndProc (HWND window, if (videotype >= VT_NUM_MODES) videotype = 0; VideoReinitialize(); - if ((mode != MODE_LOGO) || ((mode == MODE_DEBUG) && (g_bDebuggerViewingAppleOutput))) // +PATCH + if ((g_nAppMode != MODE_LOGO) || ((g_nAppMode == MODE_DEBUG) && (g_bDebuggerViewingAppleOutput))) // +PATCH { VideoRedrawScreen(); g_bDebuggerViewingAppleOutput = true; // +PATCH @@ -583,14 +583,14 @@ LRESULT CALLBACK FrameWndProc (HWND window, KeybToggleCapsLock(); else if (wparam == VK_PAUSE) { SetUsingCursor(0); - switch (mode) + switch (g_nAppMode) { case MODE_RUNNING: - mode = MODE_PAUSED; + g_nAppMode = MODE_PAUSED; SoundCore_SetFade(FADE_OUT); break; case MODE_PAUSED: - mode = MODE_RUNNING; + g_nAppMode = MODE_RUNNING; SoundCore_SetFade(FADE_IN); break; case MODE_STEPPING: @@ -598,21 +598,21 @@ LRESULT CALLBACK FrameWndProc (HWND window, break; } DrawStatusArea((HDC)0,DRAW_TITLE); - if ((mode != MODE_LOGO) && (mode != MODE_DEBUG)) + if ((g_nAppMode != MODE_LOGO) && (g_nAppMode != MODE_DEBUG)) VideoRedrawScreen(); resettiming = 1; } - else if ((mode == MODE_RUNNING) || (mode == MODE_LOGO) || (mode == MODE_STEPPING)) + else if ((g_nAppMode == MODE_RUNNING) || (g_nAppMode == MODE_LOGO) || (g_nAppMode == MODE_STEPPING)) { // Note about Alt Gr (Right-Alt): // . WM_KEYDOWN[Left-Control], then: // . WM_KEYDOWN[Right-Alt] BOOL autorep = ((lparam & 0x40000000) != 0); BOOL extended = ((lparam & 0x01000000) != 0); - if ((!JoyProcessKey((int)wparam,extended,1,autorep)) && (mode != MODE_LOGO)) + if ((!JoyProcessKey((int)wparam,extended,1,autorep)) && (g_nAppMode != MODE_LOGO)) KeybQueueKeypress((int)wparam,NOT_ASCII); } - else if (mode == MODE_DEBUG) + else if (g_nAppMode == MODE_DEBUG) // DebugProcessCommand(wparam); DebuggerProcessKey(wparam); @@ -652,7 +652,7 @@ LRESULT CALLBACK FrameWndProc (HWND window, else JoySetButton(0,1); else if ((x < buttonx) && JoyUsingMouse() && - ((mode == MODE_RUNNING) || (mode == MODE_STEPPING))) + ((g_nAppMode == MODE_RUNNING) || (g_nAppMode == MODE_STEPPING))) SetUsingCursor(1); } RelayEvent(WM_LBUTTONDOWN,wparam,lparam); @@ -813,7 +813,7 @@ LRESULT CALLBACK FrameWndProc (HWND window, break; case WM_USER_BENCHMARK: { - if (mode != MODE_LOGO) + if (g_nAppMode != MODE_LOGO) if (MessageBox(g_hFrameWindow, TEXT("Running the benchmarks will reset the state of ") TEXT("the emulated machine, causing you to lose any ") @@ -824,7 +824,7 @@ LRESULT CALLBACK FrameWndProc (HWND window, break; UpdateWindow(window); ResetMachineState(); - mode = MODE_LOGO; + g_nAppMode = MODE_LOGO; DrawStatusArea((HDC)0,DRAW_TITLE); HCURSOR oldcursor = SetCursor(LoadCursor(0,IDC_WAIT)); VideoBenchmark(); @@ -836,7 +836,7 @@ LRESULT CALLBACK FrameWndProc (HWND window, case WM_USER_RESTART: // . Changed Apple computer type (][+ or //e) // . Changed disk speed (normal or enhanced) - if (mode != MODE_LOGO) + if (g_nAppMode != MODE_LOGO) if (MessageBox(g_hFrameWindow, TEXT("Restarting the emulator will reset the state ") TEXT("of the emulated machine, causing you to lose any ") @@ -880,13 +880,13 @@ void ProcessButtonClick (int button) { break; case BTN_RUN: - if (mode == MODE_LOGO) + if (g_nAppMode == MODE_LOGO) DiskBoot(); - else if (mode == MODE_RUNNING) + else if (g_nAppMode == MODE_RUNNING) ResetMachineState(); - if ((mode == MODE_DEBUG) || (mode == MODE_STEPPING)) + if ((g_nAppMode == MODE_DEBUG) || (g_nAppMode == MODE_STEPPING)) DebugEnd(); - mode = MODE_RUNNING; + g_nAppMode = MODE_RUNNING; DrawStatusArea((HDC)0,DRAW_TITLE); VideoRedrawScreen(); resettiming = 1; @@ -911,15 +911,25 @@ void ProcessButtonClick (int button) { break; case BTN_DEBUG: - if (mode == MODE_LOGO) - ResetMachineState(); - if (mode == MODE_STEPPING) + if (g_nAppMode == MODE_LOGO) + { + ResetMachineState(); + } + + if (g_nAppMode == MODE_STEPPING) + { DebuggerInputConsoleChar( DEBUG_EXIT_KEY ); - else if (mode == MODE_DEBUG) - ProcessButtonClick(BTN_RUN); - else { - DebugBegin(); - } + } + else + if (g_nAppMode == MODE_DEBUG) + { + g_bDebugDelayBreakCheck = true; + ProcessButtonClick(BTN_RUN); + } + else + { + DebugBegin(); + } break; case BTN_SETUP: @@ -930,7 +940,7 @@ void ProcessButtonClick (int button) { } - if((mode != MODE_DEBUG) && (mode != MODE_PAUSED)) + if((g_nAppMode != MODE_DEBUG) && (g_nAppMode != MODE_PAUSED)) { SoundCore_SetFade(FADE_IN); } diff --git a/source/Frame.h b/source/Frame.h index 276b126a..076fcf98 100644 --- a/source/Frame.h +++ b/source/Frame.h @@ -12,3 +12,9 @@ void FrameRefreshStatus (int); void FrameRegisterClass (); void FrameReleaseDC (); void FrameReleaseVideoDC (); + +LRESULT CALLBACK FrameWndProc ( + HWND window, + UINT message, + WPARAM wparam, + LPARAM lparam ); diff --git a/source/PropertySheetPage.cpp b/source/PropertySheetPage.cpp index 7c04943c..a5c87028 100644 --- a/source/PropertySheetPage.cpp +++ b/source/PropertySheetPage.cpp @@ -224,7 +224,7 @@ static void ConfigDlg_OK(HWND window, BOOL afterclose) { videotype = newvidtype; VideoReinitialize(); - if ((mode != MODE_LOGO) && (mode != MODE_DEBUG)) + if ((g_nAppMode != MODE_LOGO) && (g_nAppMode != MODE_DEBUG)) VideoRedrawScreen(); } CommSetSerialPort(window,newserialport); diff --git a/source/SoundCore.cpp b/source/SoundCore.cpp index 4d646399..eea3c3ad 100644 --- a/source/SoundCore.cpp +++ b/source/SoundCore.cpp @@ -411,7 +411,7 @@ void SoundCore_SetFade(eFADE FadeType) { static int nLastMode = -1; - if(mode == MODE_DEBUG) + if(g_nAppMode == MODE_DEBUG) return; // Fade in/out just for speaker, the others are demuted/muted @@ -419,9 +419,9 @@ void SoundCore_SetFade(eFADE FadeType) { for(UINT i=0; iSetVolume() doesn't work without this! - if((g_pVoices[i]->bIsSpeaker) && (mode != MODE_LOGO) && (nLastMode != MODE_LOGO)) + if((g_pVoices[i]->bIsSpeaker) && (g_nAppMode != MODE_LOGO) && (nLastMode != MODE_LOGO)) { g_pVoices[i]->lpDSBvoice->GetVolume(&g_pVoices[i]->nFadeVolume); g_FadeType = FadeType; @@ -449,7 +449,7 @@ void SoundCore_SetFade(eFADE FadeType) } } - nLastMode = mode; + nLastMode = g_nAppMode; } //----------------------------------------------------------------------------- diff --git a/source/Speaker.cpp b/source/Speaker.cpp index 8a025f4a..b6e30232 100644 --- a/source/Speaker.cpp +++ b/source/Speaker.cpp @@ -509,7 +509,7 @@ void SpkrUpdate (DWORD totalcycles) else if(g_nCumulativeCycles - g_nSpkrQuietCycleCount > (unsigned __int64)g_fCurrentCLK6502/5) { // After 0.2 sec of Apple time, deactivate spkr voice - // . This allows emulator to auto-switch to full-speed mode for fast disk access + // . This allows emulator to auto-switch to full-speed g_nAppMode for fast disk access Spkr_SetActive(false); } } @@ -616,7 +616,7 @@ static DWORD dwByteOffset = (DWORD)-1; static int nNumSamplesError = 0; static int nDbgSpkrCnt = 0; -// FullSpeed mode, 2 cases: +// FullSpeed g_nAppMode, 2 cases: // i) Short burst of full-speed, so PlayCursor doesn't complete sound from previous fixed-speed session. // ii) Long burst of full-speed, so PlayCursor completes sound from previous fixed-speed session. diff --git a/source/Video.cpp b/source/Video.cpp index 13fb4028..e7714141 100644 --- a/source/Video.cpp +++ b/source/Video.cpp @@ -93,7 +93,7 @@ enum Color_Palette_Index_e , PINK , AQUA -// CUSTOM HGR COLORS (don't change order) - For tv emulation mode +// CUSTOM HGR COLORS (don't change order) - For tv emulation g_nAppMode , HGR_BLACK , HGR_WHITE , HGR_BLUE @@ -149,7 +149,7 @@ enum Color_Palette_Index_e framebufferinfo->bmiColors[i].rgbGreen = g; \ framebufferinfo->bmiColors[i].rgbBlue = b; -#define HGR_MATRIX_YOFFSET 2 // For tv emulation mode +#define HGR_MATRIX_YOFFSET 2 // For tv emulation g_nAppMode // video scanner constants int const kHBurstClock = 53; // clock when Color Burst starts @@ -188,7 +188,7 @@ static LPBYTE sourceoffsettable[512]; static LPBYTE textauxptr; static LPBYTE textmainptr; -// For tv emulation mode +// For tv emulation g_nAppMode // 2 extra pixels on end? static BYTE hgrpixelmatrix[280][192 + 2 * HGR_MATRIX_YOFFSET]; static BYTE colormixbuffer[6]; @@ -286,7 +286,7 @@ void CreateIdentityPalette () { SETFRAMECOLOR(PINK, 0xFF,0x90,0x80); SETFRAMECOLOR(AQUA, 0x40,0xFF,0x90); - SETFRAMECOLOR(HGR_BLACK, 0x00,0x00,0x00); // For tv emulation mode + SETFRAMECOLOR(HGR_BLACK, 0x00,0x00,0x00); // For tv emulation g_nAppMode SETFRAMECOLOR(HGR_WHITE, 0xFF,0xFF,0xFE); SETFRAMECOLOR(HGR_BLUE, 0x00,0x80,0xFF); SETFRAMECOLOR(HGR_RED, 0xF0,0x50,0x00); @@ -516,7 +516,7 @@ void DrawDHiResSource () { { /*** activate for fringe reduction on white hgr text - drawback: loss of color mix patterns in hgr mode. + drawback: loss of color mix patterns in hgr g_nAppMode. select videotype by index ***/ @@ -623,7 +623,7 @@ void DrawHiResSourceHalfShiftDim () { /*** activate for fringe reduction on white hgr text - - drawback: loss of color mix patterns in hgr mode. + drawback: loss of color mix patterns in hgr g_nAppMode. select videotype by index exclusion ***/ @@ -792,7 +792,7 @@ void DrawHiResSource () { /*** activate for fringe reduction on white hgr text - - drawback: loss of color mix patterns in hgr mode. + drawback: loss of color mix patterns in hgr g_nAppMode. select videotype by index exclusion ***/ @@ -1037,7 +1037,7 @@ BOOL UpdateDHiResCell (int x, int y, int xpixel, int ypixel, int offset) { //=========================================================================== -BYTE MixColors(BYTE c1, BYTE c2) { // For tv emulation mode +BYTE MixColors(BYTE c1, BYTE c2) { // For tv emulation g_nAppMode #define COMBINATION(c1,c2,ref1,ref2) (((c1)==(ref1)&&(c2)==(ref2)) || ((c1)==(ref2)&&(c2)==(ref1))) if (c1 == c2) @@ -1062,7 +1062,7 @@ BYTE MixColors(BYTE c1, BYTE c2) { // For tv emulation mode //=========================================================================== -void CreateColorMixMap() { // For tv emulation mode +void CreateColorMixMap() { // For tv emulation g_nAppMode #define FROM_NEIGHBOUR 0x00 int t,m,b; @@ -1102,7 +1102,7 @@ void CreateColorMixMap() { // For tv emulation mode } //=========================================================================== -void __stdcall MixColorsVertical(int matx, int maty) { // For tv emulation mode +void __stdcall MixColorsVertical(int matx, int maty) { // For tv emulation g_nAppMode WORD twoHalfPixel; int bot1idx, bot2idx; @@ -1141,7 +1141,7 @@ void __stdcall MixColorsVertical(int matx, int maty) { // For tv emulation mode //=========================================================================== -void __stdcall CopyMixedSource (int x, int y, int sourcex, int sourcey) { // For tv emulation mode +void __stdcall CopyMixedSource (int x, int y, int sourcex, int sourcey) { // For tv emulation g_nAppMode LPBYTE currsourceptr = sourceoffsettable[sourcey]+sourcex; LPBYTE currdestptr = frameoffsettable[y<<1] + (x<<1); @@ -1576,7 +1576,7 @@ void VideoChooseColor () { if (ChooseColor(&cc)) { monochrome = cc.rgbResult; VideoReinitialize(); - if ((mode != MODE_LOGO) && (mode != MODE_DEBUG)) + if ((g_nAppMode != MODE_LOGO) && (g_nAppMode != MODE_DEBUG)) VideoRedrawScreen(); RegSaveValue(TEXT("Configuration"),TEXT("Monochrome Color"),1,monochrome); } @@ -2010,7 +2010,7 @@ void VideoUpdateFlash() nTextFlashCnt = 0; g_bTextFlashState = !g_bTextFlashState; - // Redraw any FLASHing chars if any text showing. NB. No FLASH mode for 80 cols + // Redraw any FLASHing chars if any text showing. NB. No FLASH g_nAppMode for 80 cols if((SW_TEXT || SW_MIXED) && !SW_80COL) g_bTextFlashFlag = true; }