From 58671545bb3d86729d3e4dcc146567925d2d182c Mon Sep 17 00:00:00 2001 From: tomcw Date: Sat, 22 Oct 2016 19:50:35 +0100 Subject: [PATCH] Fix #366 (IRQ erroreously deducting extra cycles) --- source/CPU.cpp | 6 ++++-- source/CPU/cpu6502.h | 4 ++-- source/CPU/cpu65C02.h | 4 ++-- source/CPU/cpu65d02.h | 4 ++-- test/TestCPU6502/TestCPU6502.cpp | 4 ++-- 5 files changed, 12 insertions(+), 10 deletions(-) diff --git a/source/CPU.cpp b/source/CPU.cpp index daacf9fc..52fe8794 100644 --- a/source/CPU.cpp +++ b/source/CPU.cpp @@ -398,7 +398,7 @@ static __forceinline int Fetch(BYTE& iOpcode, ULONG uExecutedCycles) } //#define ENABLE_NMI_SUPPORT // Not used - so don't enable -static __forceinline void NMI(ULONG& uExecutedCycles, UINT& uExtraCycles, BOOL& flagc, BOOL& flagn, BOOL& flagv, BOOL& flagz) +static __forceinline void NMI(ULONG& uExecutedCycles, BOOL& flagc, BOOL& flagn, BOOL& flagv, BOOL& flagz) { #ifdef ENABLE_NMI_SUPPORT if(g_bNmiFlank) @@ -414,12 +414,13 @@ static __forceinline void NMI(ULONG& uExecutedCycles, UINT& uExtraCycles, BOOL& PUSH(regs.ps & ~AF_BREAK) regs.ps = regs.ps | AF_INTERRUPT & ~AF_DECIMAL; regs.pc = * (WORD*) (mem+0xFFFA); + UINT uExtraCycles = 0; // Needed for CYC(a) macro CYC(7) } #endif } -static __forceinline void IRQ(ULONG& uExecutedCycles, UINT& uExtraCycles, BOOL& flagc, BOOL& flagn, BOOL& flagv, BOOL& flagz) +static __forceinline void IRQ(ULONG& uExecutedCycles, BOOL& flagc, BOOL& flagn, BOOL& flagv, BOOL& flagz) { if(g_bmIRQ && !(regs.ps & AF_INTERRUPT)) { @@ -433,6 +434,7 @@ static __forceinline void IRQ(ULONG& uExecutedCycles, UINT& uExtraCycles, BOOL& PUSH(regs.ps & ~AF_BREAK) regs.ps = regs.ps | AF_INTERRUPT & ~AF_DECIMAL; regs.pc = * (WORD*) (mem+0xFFFE); + UINT uExtraCycles = 0; // Needed for CYC(a) macro CYC(7) } } diff --git a/source/CPU/cpu6502.h b/source/CPU/cpu6502.h index 14fe7a24..8fc119a1 100644 --- a/source/CPU/cpu6502.h +++ b/source/CPU/cpu6502.h @@ -328,8 +328,8 @@ static DWORD Cpu6502 (DWORD uTotalCycles) // NTSC_END CheckInterruptSources(uExecutedCycles); - NMI(uExecutedCycles, uExtraCycles, flagc, flagn, flagv, flagz); - IRQ(uExecutedCycles, uExtraCycles, flagc, flagn, flagv, flagz); + NMI(uExecutedCycles, flagc, flagn, flagv, flagz); + IRQ(uExecutedCycles, flagc, flagn, flagv, flagz); if ( IsDebugBreakpointHit() ) break; diff --git a/source/CPU/cpu65C02.h b/source/CPU/cpu65C02.h index 0a1cec26..0c1c0af6 100644 --- a/source/CPU/cpu65C02.h +++ b/source/CPU/cpu65C02.h @@ -331,8 +331,8 @@ static DWORD Cpu65C02 (DWORD uTotalCycles) // NTSC_END CheckInterruptSources(uExecutedCycles); - NMI(uExecutedCycles, uExtraCycles, flagc, flagn, flagv, flagz); - IRQ(uExecutedCycles, uExtraCycles, flagc, flagn, flagv, flagz); + NMI(uExecutedCycles, flagc, flagn, flagv, flagz); + IRQ(uExecutedCycles, flagc, flagn, flagv, flagz); if( IsDebugBreakpointHit() ) break; diff --git a/source/CPU/cpu65d02.h b/source/CPU/cpu65d02.h index 8d72bbcd..a4eb22c7 100644 --- a/source/CPU/cpu65d02.h +++ b/source/CPU/cpu65d02.h @@ -416,8 +416,8 @@ static DWORD Cpu65D02 (DWORD uTotalCycles) // NTSC_END CheckInterruptSources(uExecutedCycles); - NMI(uExecutedCycles, uExtraCycles, flagc, flagn, flagv, flagz); - IRQ(uExecutedCycles, uExtraCycles, flagc, flagn, flagv, flagz); + NMI(uExecutedCycles, flagc, flagn, flagv, flagz); + IRQ(uExecutedCycles, flagc, flagn, flagv, flagz); if( IsDebugBreakpointHit() ) break; diff --git a/test/TestCPU6502/TestCPU6502.cpp b/test/TestCPU6502/TestCPU6502.cpp index 4a6f12b9..747a5511 100644 --- a/test/TestCPU6502/TestCPU6502.cpp +++ b/test/TestCPU6502/TestCPU6502.cpp @@ -72,11 +72,11 @@ static __forceinline void CheckInterruptSources(ULONG uExecutedCycles) { } -static __forceinline void NMI(ULONG& uExecutedCycles, UINT& uExtraCycles, BOOL& flagc, BOOL& flagn, BOOL& flagv, BOOL& flagz) +static __forceinline void NMI(ULONG& uExecutedCycles, BOOL& flagc, BOOL& flagn, BOOL& flagv, BOOL& flagz) { } -static __forceinline void IRQ(ULONG& uExecutedCycles, UINT& uExtraCycles, BOOL& flagc, BOOL& flagn, BOOL& flagv, BOOL& flagz) +static __forceinline void IRQ(ULONG& uExecutedCycles, BOOL& flagc, BOOL& flagn, BOOL& flagv, BOOL& flagz) { }