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- Finished Version 2 cleanup of opcode table

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This commit is contained in:
mpohoreski 2010-06-10 15:56:21 +00:00
parent 2102f9c985
commit 586d02e871
1 changed files with 208 additions and 209 deletions
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73
AppleWin/source/CPU/cpu65d02.h
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@ -452,14 +452,13 @@ static DWORD Cpu65D02 (DWORD uTotalCycles)
case 0x2D: ABS AND CYC(2) break; case 0x2D: ABS AND CYC(2) break;
case 0x2E: ABS ROLc CYC(6) break; case 0x2E: ABS ROLc CYC(6) break;
case 0x2F: $ NOP CYC(2) break; case 0x2F: $ NOP CYC(2) break;
case 0x30: REL BMI CYC(2) break; case 0x30: REL BMI CYC(2) break;
case 0x31: idy AND CYC(5) break; case 0x31: idy AND CYC(5) break;
case 0x32: izp AND CYC(5) break; case 0x32: izp AND CYC(5) break;
case 0x33: $ NOP CYC(2) break; case 0x33: $ NOP CYC(2) break;
case 0x34: zpx BIT CYC(4) break; case 0x34: zpx BIT CYC(4) break;
case 0x35: zpx AND CYC(4) break; case 0x35: zpx AND CYC(4) break;
case 0x36: zpx ROL_CMOS CYC(6) break; case 0x36: zpx ROLc CYC(6) break;
case 0x37: $ NOP CYC(2) break; case 0x37: $ NOP CYC(2) break;
case 0x38: SEC CYC(2) break; case 0x38: SEC CYC(2) break;
case 0x39: aby AND CYC(4) break; case 0x39: aby AND CYC(4) break;
@ -467,7 +466,7 @@ static DWORD Cpu65D02 (DWORD uTotalCycles)
case 0x3B: $ NOP CYC(2) break; case 0x3B: $ NOP CYC(2) break;
case 0x3C: abx BIT CYC(4) break; case 0x3C: abx BIT CYC(4) break;
case 0x3D: abx AND CYC(4) break; case 0x3D: abx AND CYC(4) break;
case 0x3E: abx ROL_CMOS CYC(6) break; case 0x3E: abx ROLc CYC(6) break;
case 0x3F: $ NOP CYC(2) break; case 0x3F: $ NOP CYC(2) break;
case 0x40: RTI CYC(6) DoIrqProfiling(uExecutedCycles); break; case 0x40: RTI CYC(6) DoIrqProfiling(uExecutedCycles); break;
case 0x41: idx EOR CYC(6) break; case 0x41: idx EOR CYC(6) break;
@ -475,7 +474,7 @@ static DWORD Cpu65D02 (DWORD uTotalCycles)
case 0x43: $ NOP CYC(2) break; case 0x43: $ NOP CYC(2) break;
case 0x44: $ ZPG NOP CYC(3) break; case 0x44: $ ZPG NOP CYC(3) break;
case 0x45: ZPG EOR CYC(3) break; case 0x45: ZPG EOR CYC(3) break;
case 0x46: ZPG LSR_CMOS CYC(5) break; case 0x46: ZPG LSRc CYC(5) break;
case 0x47: $ NOP CYC(2) break; case 0x47: $ NOP CYC(2) break;
case 0x48: PHA CYC(3) break; case 0x48: PHA CYC(3) break;
case 0x49: IMM EOR CYC(2) break; case 0x49: IMM EOR CYC(2) break;
@ -483,7 +482,7 @@ static DWORD Cpu65D02 (DWORD uTotalCycles)
case 0x4B: $ NOP CYC(2) break; case 0x4B: $ NOP CYC(2) break;
case 0x4C: ABS JMP CYC(3) break; case 0x4C: ABS JMP CYC(3) break;
case 0x4D: ABS EOR CYC(4) break; case 0x4D: ABS EOR CYC(4) break;
case 0x4E: ABS LSR_CMOS CYC(6) break; case 0x4E: ABS LSRc CYC(6) break;
case 0x4F: $ NOP CYC(2) break; case 0x4F: $ NOP CYC(2) break;
case 0x50: REL BVC CYC(2) break; case 0x50: REL BVC CYC(2) break;
case 0x51: idy EOR CYC(5) break; case 0x51: idy EOR CYC(5) break;
@ -491,7 +490,7 @@ static DWORD Cpu65D02 (DWORD uTotalCycles)
case 0x53: $ NOP CYC(2) break; case 0x53: $ NOP CYC(2) break;
case 0x54: $ zpx NOP CYC(4) break; case 0x54: $ zpx NOP CYC(4) break;
case 0x55: zpx EOR CYC(4) break; case 0x55: zpx EOR CYC(4) break;
case 0x56: zpx LSR_CMOS CYC(6) break; case 0x56: zpx LSRc CYC(6) break;
case 0x57: $ NOP CYC(2) break; case 0x57: $ NOP CYC(2) break;
case 0x58: CLI CYC(2) break; case 0x58: CLI CYC(2) break;
case 0x59: aby EOR CYC(4) break; case 0x59: aby EOR CYC(4) break;
@ -499,39 +498,39 @@ static DWORD Cpu65D02 (DWORD uTotalCycles)
case 0x5B: $ NOP CYC(2) break; case 0x5B: $ NOP CYC(2) break;
case 0x5C: $ abx NOP CYC(8) break; case 0x5C: $ abx NOP CYC(8) break;
case 0x5D: abx EOR CYC(4) break; case 0x5D: abx EOR CYC(4) break;
case 0x5E: abx LSR_CMOS CYC(6) break; case 0x5E: abx LSRc CYC(6) break;
case 0x5F: $ NOP CYC(2) break; case 0x5F: $ NOP CYC(2) break;
case 0x60: RTS CYC(6) break; case 0x60: RTS CYC(6) break;
case 0x61: idx ADC_CMOS CYC(6) break; case 0x61: idx ADCc CYC(6) break;
case 0x62: $ IMM NOP CYC(2) break; case 0x62: $ IMM NOP CYC(2) break;
case 0x63: $ NOP CYC(2) break; case 0x63: $ NOP CYC(2) break;
case 0x64: ZPG STZ CYC(3) break; case 0x64: ZPG STZ CYC(3) break;
case 0x65: ZPG ADC_CMOS CYC(3) break; case 0x65: ZPG ADCc CYC(3) break;
case 0x66: ZPG ROR_CMOS CYC(5) break; case 0x66: ZPG RORc CYC(5) break;
case 0x67: $ NOP CYC(2) break; case 0x67: $ NOP CYC(2) break;
case 0x68: PLA CYC(4) break; case 0x68: PLA CYC(4) break;
case 0x69: IMM ADC_CMOS CYC(2) break; case 0x69: IMM ADCc CYC(2) break;
case 0x6A: ror CYC(2) break; case 0x6A: ror CYC(2) break;
case 0x6B: $ NOP CYC(2) break; case 0x6B: $ NOP CYC(2) break;
case 0x6C: IABSCMOS JMP CYC(6) break; // 0x6C // 65c02 IABSCMOS JMP // 6502 IABSNMOS JMP case 0x6C: IABSCMOS JMP CYC(6) break; // 0x6C // 65c02 IABSCMOS JMP // 6502 IABSNMOS JMP
case 0x6D: ABS ADC_CMOS CYC(4) break; case 0x6D: ABS ADCc CYC(4) break;
case 0x6E: ABS ROR_CMOS CYC(6) break; case 0x6E: ABS RORc CYC(6) break;
case 0x6F: $ NOP CYC(2) break; case 0x6F: $ NOP CYC(2) break;
case 0x70: REL BVS CYC(2) break; case 0x70: REL BVS CYC(2) break;
case 0x71: idy ADC_CMOS CYC(5) break; case 0x71: idy ADCc CYC(5) break;
case 0x72: izp ADC_CMOS CYC(5) break; case 0x72: izp ADCc CYC(5) break;
case 0x73: $ NOP CYC(2) break; case 0x73: $ NOP CYC(2) break;
case 0x74: zpx STZ CYC(4) break; case 0x74: zpx STZ CYC(4) break;
case 0x75: zpx ADC_CMOS CYC(4) break; case 0x75: zpx ADCc CYC(4) break;
case 0x76: zpx ROR_CMOS CYC(6) break; case 0x76: zpx RORc CYC(6) break;
case 0x77: $ NOP CYC(2) break; case 0x77: $ NOP CYC(2) break;
case 0x78: SEI CYC(2) break; case 0x78: SEI CYC(2) break;
case 0x79: aby ADC_CMOS CYC(4) break; case 0x79: aby ADCc CYC(4) break;
case 0x7A: PLY CYC(4) break; case 0x7A: PLY CYC(4) break;
case 0x7B: $ NOP CYC(2) break; case 0x7B: $ NOP CYC(2) break;
case 0x7C: IABSX JMP CYC(6) break; // 0x7C // 65c02 IABSX JMP // 6502 ABSX NOP case 0x7C: IABSX JMP CYC(6) break; // 0x7C // 65c02 IABSX JMP // 6502 ABSX NOP
case 0x7D: abx ADC_CMOS CYC(4) break; case 0x7D: abx ADCc CYC(4) break;
case 0x7E: abx ROR_CMOS CYC(6) break; case 0x7E: abx RORc CYC(6) break;
case 0x7F: $ NOP CYC(2) break; case 0x7F: $ NOP CYC(2) break;
case 0x80: REL BRA CYC(2) break; case 0x80: REL BRA CYC(2) break;
case 0x81: idx STA CYC(6) break; case 0x81: idx STA CYC(6) break;
@ -603,7 +602,7 @@ static DWORD Cpu65D02 (DWORD uTotalCycles)
case 0xC3: $ NOP CYC(2) break; case 0xC3: $ NOP CYC(2) break;
case 0xC4: ZPG CPY CYC(3) break; case 0xC4: ZPG CPY CYC(3) break;
case 0xC5: ZPG CMP CYC(3) break; case 0xC5: ZPG CMP CYC(3) break;
case 0xC6: ZPG DEC_CMOS CYC(5) break; case 0xC6: ZPG DECc CYC(5) break;
case 0xC7: $ NOP CYC(2) break; case 0xC7: $ NOP CYC(2) break;
case 0xC8: INY CYC(2) break; case 0xC8: INY CYC(2) break;
case 0xC9: IMM CMP CYC(2) break; case 0xC9: IMM CMP CYC(2) break;
@ -611,7 +610,7 @@ static DWORD Cpu65D02 (DWORD uTotalCycles)
case 0xCB: $ NOP CYC(2) break; case 0xCB: $ NOP CYC(2) break;
case 0xCC: ABS CPY CYC(4) break; case 0xCC: ABS CPY CYC(4) break;
case 0xCD: ABS CMP CYC(4) break; case 0xCD: ABS CMP CYC(4) break;
case 0xCE: ABS DEC_CMOS CYC(5) break; case 0xCE: ABS DECc CYC(5) break;
case 0xCF: $ NOP CYC(2) break; case 0xCF: $ NOP CYC(2) break;
case 0xD0: REL BNE CYC(2) break; case 0xD0: REL BNE CYC(2) break;
case 0xD1: idy CMP CYC(5) break; case 0xD1: idy CMP CYC(5) break;
@ -619,7 +618,7 @@ static DWORD Cpu65D02 (DWORD uTotalCycles)
case 0xD3: $ NOP CYC(2) break; case 0xD3: $ NOP CYC(2) break;
case 0xD4: $ zpx NOP CYC(4) break; case 0xD4: $ zpx NOP CYC(4) break;
case 0xD5: zpx CMP CYC(4) break; case 0xD5: zpx CMP CYC(4) break;
case 0xD6: zpx DEC_CMOS CYC(6) break; case 0xD6: zpx DECc CYC(6) break;
case 0xD7: $ NOP CYC(2) break; case 0xD7: $ NOP CYC(2) break;
case 0xD8: CLD CYC(2) break; case 0xD8: CLD CYC(2) break;
case 0xD9: aby CMP CYC(4) break; case 0xD9: aby CMP CYC(4) break;
@ -627,39 +626,39 @@ static DWORD Cpu65D02 (DWORD uTotalCycles)
case 0xDB: $ NOP CYC(2) break; case 0xDB: $ NOP CYC(2) break;
case 0xDC: $ abx NOP CYC(4) break; case 0xDC: $ abx NOP CYC(4) break;
case 0xDD: abx CMP CYC(4) break; case 0xDD: abx CMP CYC(4) break;
case 0xDE: abx DEC_CMOS CYC(6) break; case 0xDE: abx DECc CYC(6) break;
case 0xDF: $ NOP CYC(2) break; case 0xDF: $ NOP CYC(2) break;
case 0xE0: IMM CPX CYC(2) break; case 0xE0: IMM CPX CYC(2) break;
case 0xE1: idx SBC_CMOS CYC(6) break; case 0xE1: idx SBCc CYC(6) break;
case 0xE2: $ IMM NOP CYC(2) break; case 0xE2: $ IMM NOP CYC(2) break;
case 0xE3: $ NOP CYC(2) break; case 0xE3: $ NOP CYC(2) break;
case 0xE4: ZPG CPX CYC(3) break; case 0xE4: ZPG CPX CYC(3) break;
case 0xE5: ZPG SBC_CMOS CYC(3) break; case 0xE5: ZPG SBCc CYC(3) break;
case 0xE6: ZPG INC_CMOS CYC(5) break; case 0xE6: ZPG INCc CYC(5) break;
case 0xE7: $ NOP CYC(2) break; case 0xE7: $ NOP CYC(2) break;
case 0xE8: INX CYC(2) break; case 0xE8: INX CYC(2) break;
case 0xE9: IMM SBC_CMOS CYC(2) break; case 0xE9: IMM SBCc CYC(2) break;
case 0xEA: NOP CYC(2) break; case 0xEA: NOP CYC(2) break;
case 0xEB: $ NOP CYC(2) break; case 0xEB: $ NOP CYC(2) break;
case 0xEC: ABS CPX CYC(4) break; case 0xEC: ABS CPX CYC(4) break;
case 0xED: ABS SBC_CMOS CYC(4) break; case 0xED: ABS SBCc CYC(4) break;
case 0xEE: ABS INC_CMOS CYC(6) break; case 0xEE: ABS INCc CYC(6) break;
case 0xEF: $ NOP CYC(2) break; case 0xEF: $ NOP CYC(2) break;
case 0xF0: REL BEQ CYC(2) break; case 0xF0: REL BEQ CYC(2) break;
case 0xF1: idy SBC_CMOS CYC(5) break; case 0xF1: idy SBCc CYC(5) break;
case 0xF2: izp SBC_CMOS CYC(5) break; case 0xF2: izp SBCc CYC(5) break;
case 0xF3: $ NOP CYC(2) break; case 0xF3: $ NOP CYC(2) break;
case 0xF4: $ zpx NOP CYC(4) break; case 0xF4: $ zpx NOP CYC(4) break;
case 0xF5: zpx SBC_CMOS CYC(4) break; case 0xF5: zpx SBCc CYC(4) break;
case 0xF6: zpx INC_CMOS CYC(6) break; case 0xF6: zpx INCc CYC(6) break;
case 0xF7: $ NOP CYC(2) break; case 0xF7: $ NOP CYC(2) break;
case 0xF8: SED CYC(2) break; case 0xF8: SED CYC(2) break;
case 0xF9: aby SBC_CMOS CYC(4) break; case 0xF9: aby SBCc CYC(4) break;
case 0xFA: PLX CYC(4) break; case 0xFA: PLX CYC(4) break;
case 0xFB: $ NOP CYC(2) break; case 0xFB: $ NOP CYC(2) break;
case 0xFC: $ abx NOP CYC(4) break; case 0xFC: $ abx NOP CYC(4) break;
case 0xFD: abx SBC_CMOS CYC(4) break; case 0xFD: abx SBCc CYC(4) break;
case 0xFE: abx INC_CMOS CYC(6) break; case 0xFE: abx INCc CYC(6) break;
case 0xFF: $ NOP CYC(2) break; case 0xFF: $ NOP CYC(2) break;
} }
#undef $ #undef $