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Corrected CLK_Z80 value

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tomch 2008-09-09 21:07:14 +00:00
parent 4a7f95d4b7
commit 694ea3b07b
1 changed files with 1 additions and 1 deletions
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AppleWin/source/Common.h
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@ -8,7 +8,7 @@ const double CLK_6502 = ((_M14 * 65.0) / 912.0); // 65 cycles per 912 14M clocks
// The effective Z-80 clock rate is 2.041MHz
// See: http://www.apple2info.net/hardware/softcard/SC-SWHW_a2in.pdf
const double CLK_Z80 = 2.041e6;
const double CLK_Z80 = (CLK_6502 * 2);
const UINT uCyclesPerLine = 65; // 25 cycles of HBL & 40 cycles of HBL'
const UINT uVisibleLinesPerFrame = 64*3; // 192