diff --git a/ApplewinExpress9.00.vcproj b/ApplewinExpress9.00.vcproj
index 1a231536..eec0812f 100644
--- a/ApplewinExpress9.00.vcproj
+++ b/ApplewinExpress9.00.vcproj
@@ -625,6 +625,14 @@
RelativePath=".\source\MouseInterface.h"
>
+
+
+
+
@@ -834,6 +842,10 @@
RelativePath=".\docs\Debugger_Changelog.txt"
>
+
+
diff --git a/Disks/NoSlotClockTest.dsk b/Disks/NoSlotClockTest.dsk
new file mode 100644
index 00000000..6d6adebe
Binary files /dev/null and b/Disks/NoSlotClockTest.dsk differ
diff --git a/docs/DallasSmartWatchUtilityDisassembly.txt b/docs/DallasSmartWatchUtilityDisassembly.txt
new file mode 100644
index 00000000..2488a9ab
--- /dev/null
+++ b/docs/DallasSmartWatchUtilityDisassembly.txt
@@ -0,0 +1,1051 @@
+Dallas SmartWatch DS1216 (No-Slot-Clock) SmartWatch Utility (Version 1.1).
+Copyright 1987 Matthew Lee Stier.
+Partial disassembly and comments by Nick Westgate (and CiderPress).
+
+2000- A2 FF LDX #$FF ;reset stack
+2002- 9A TXS
+2003- 20 58 22 JSR $2258
+2006- A9 00 LDA #$00 ;min kernel version
+2008- A0 01 LDY #$01 ;version of this interpreter (app?)
+200A- 20 41 22 JSR $2241 ;set versions and memory map
+200D- 20 11 22 JSR $2211 ;set up ram and video
+2010- A0 20 LDY #$20 ;"SmartWatch Utility (Version 1.1). Copyright 1987,Matthew Lee Stier"
+2012- A9 89 LDA #$89
+2014- 20 8A 22 JSR $228A ;print
+2017- 20 70 22 JSR $2270 ;check machine ID
+201A- 90 07 BCC $2023
+201C- A0 21 LDY #$21 ;"This computer is not an Apple //e or //c"
+201E- A9 98 LDA #$98
+2020- 4C 73 20 JMP $2073 ;exit
+
+2023- 20 9A 26 JSR $269A ;read time
+2026- 20 B4 26 JSR $26B4 ;check time data
+2029- D0 07 BNE $2032
+202B- A0 21 LDY #$21 ;"SmartWatch not detected"
+202D- A9 C1 LDA #$C1
+202F- 4C 73 20 JMP $2073 ;exit
+
+2032- A9 04 LDA #$04 ;detected
+2034- 85 22 STA $22
+2036- 20 58 FC JSR $FC58 F8ROM:HOME
+2039- A0 20 LDY #$20
+203B- A9 D6 LDA #$D6
+203D- 20 8A 22 JSR $228A ;print
+2040- A9 0C LDA #$0C
+2042- 20 A9 22 JSR $22A9
+2045- C9 9B CMP #$9B
+2047- F0 06 BEQ $204F
+2049- 20 A7 26 JSR $26A7
+204C- 4C 36 20 JMP $2036
+204F- 20 58 FC JSR $FC58 F8ROM:HOME
+2052- A0 21 LDY #$21
+2054- A9 FB LDA #$FB
+2056- 20 8A 22 JSR $228A ;print
+2059- 20 0C FD JSR $FD0C F8ROM:RDKEY
+205C- C9 D9 CMP #$D9
+205E- F0 20 BEQ $2080
+2060- C9 F9 CMP #$F9
+2062- F0 1C BEQ $2080
+2064- C9 8D CMP #$8D
+2066- F0 18 BEQ $2080
+2068- C9 CE CMP #$CE
+206A- F0 04 BEQ $2070
+206C- C9 EE CMP #$EE
+206E- D0 E9 BNE $2059
+2070- 4C 36 20 JMP $2036
+
+2073- 20 8A 22 JSR $228A ;print error and exit
+2076- A0 21 LDY #$21
+2078- A9 D9 LDA #$D9
+207A- 20 8A 22 JSR $228A ;print
+207D- 20 0C FD JSR $FD0C F8ROM:RDKEY
+2080- 20 11 22 JSR $2211
+2083- 20 67 22 JSR $2267 ;exit
+2086- 4C 86 20 JMP $2086
+2089- A0 A0 LDY #$A0
+208B- A0 D3 LDY #$D3
+208D- ED E1 F2 SBC $F2E1
+2090- F4 ???
+2091- D7 ???
+2092- E1 F4 SBC ($F4,X)
+2094- E3 ???
+2095- E8 INX
+2096- A0 D5 LDY #$D5
+2098- F4 ???
+2099- E9 EC SBC #$EC
+209B- E9 F4 SBC #$F4
+209D- F9 A0 A0 SBC $A0A0,Y
+20A0- A8 TAY
+20A1- D6 E5 DEC $E5,X
+20A3- F2 F3 SBC ($F3)
+20A5- E9 EF SBC #$EF
+20A7- EE A0 B1 INC $B1A0
+20AA- AE B1 A9 LDX $A9B1
+20AD- 8D A0 A0 STA $A0A0
+20B0- A0 C3 LDY #$C3
+20B2- EF ???
+20B3- F0 F9 BEQ $20AE
+20B5- F2 E9 SBC ($E9)
+20B7- E7 ???
+20B8- E8 INX
+20B9- F4 ???
+20BA- A0 B1 LDY #$B1
+20BC- B9 B8 B7 LDA $B7B8,Y
+20BF- AC A0 CD LDY $CDA0
+20C2- E1 F4 SBC ($F4,X)
+20C4- F4 ???
+20C5- E8 INX
+20C6- E5 F7 SBC $F7
+20C8- A0 CC LDY #$CC
+20CA- E5 E5 SBC $E5
+20CC- A0 D3 LDY #$D3
+20CE- F4 ???
+20CF- E9 E5 SBC #$E5
+20D1- F2 8D SBC ($8D)
+20D3- 8D 8D 00 STA $008D
+20D6- C3 ???
+20D7- F5 F2 SBC $F2,X
+20D9- F2 E5 SBC ($E5)
+20DB- EE F4 A0 INC $A0F4
+20DE- E3 ???
+20DF- EC EF E3 CPX $E3EF
+20E2- EB ???
+20E3- A0 E4 LDY #$E4
+20E5- E1 F4 SBC ($F4,X)
+20E7- E5 A0 SBC $A0
+20E9- E1 EE SBC ($EE,X)
+20EB- E4 A0 CPX $A0
+20ED- F4 ???
+20EE- E9 ED SBC #$ED
+20F0- E5 A0 SBC $A0
+20F2- E9 F3 SBC #$F3
+20F4- BA TSX
+20F5- 8D 8D D3 STA $D38D
+20F8- CD C1 D2 CMP $D2C1
+20FB- D4 ???
+20FC- D7 ???
+20FD- C1 D4 CMP ($D4,X)
+20FF- C3 ???
+2100- C8 INY
+2101- A0 E4 LDY #$E4
+2103- E1 F4 SBC ($F4,X)
+2105- E1 A0 SBC ($A0,X)
+2107- EE EF F4 INC $F4EF
+210A- A0 F6 LDY #$F6
+210C- E1 EC SBC ($EC,X)
+210E- E9 E4 SBC #$E4
+2110- 8D 8D 8D STA $8D8D
+2113- 8D C5 EE STA $EEC5
+2116- F4 ???
+2117- E5 F2 SBC $F2
+2119- A0 EE LDY #$EE
+211B- E5 F7 SBC $F7
+211D- A0 E4 LDY #$E4
+211F- E1 F4 SBC ($F4,X)
+2121- E5 A0 SBC $A0
+2123- E1 EE SBC ($EE,X)
+2125- E4 A0 CPX $A0
+2127- F4 ???
+2128- E9 ED SBC #$ED
+212A- E5 A0 SBC $A0
+212C- A8 TAY
+212D- B2 B4 LDA ($B4)
+212F- A0 C8 LDY #$C8
+2131- F2 A0 SBC ($A0)
+2133- E6 EF INC $EF
+2135- F2 ED SBC ($ED)
+2137- E1 F4 SBC ($F4,X)
+2139- A9 8D LDA #$8D
+213B- 8D C4 C1 STA $C1C4
+213E- D9 A0 C4 CMP $C4A0,Y
+2141- C4 AD CPY $AD
+2143- CD CD CD CMP $CDCD
+2146- AD D9 D9 LDA $D9D9
+2149- A0 C8 LDY #$C8
+214B- C8 INY
+214C- BA TSX
+214D- CD CD BA CMP $BACD
+2150- D3 ???
+2151- D3 ???
+2152- 8D 8D 8D STA $8D8D
+2155- 8D 8D F0 STA $F08D
+2158- F2 E5 SBC ($E5)
+215A- F3 ???
+215B- F3 ???
+215C- A0 DB LDY #$DB
+215E- F2 E5 SBC ($E5)
+2160- F4 ???
+2161- F5 F2 SBC $F2,X
+2163- EE DD A0 INC $A0DD
+2166- F4 ???
+2167- EF ???
+2168- A0 F5 LDY #$F5
+216A- F0 E4 BEQ $2150
+216C- E1 F4 SBC ($F4,X)
+216E- E5 A0 SBC $A0
+2170- E3 ???
+2171- EC EF E3 CPX $E3EF
+2174- EB ???
+2175- AC 8D F0 LDY $F08D
+2178- F2 E5 SBC ($E5)
+217A- F3 ???
+217B- F3 ???
+217C- A0 DB LDY #$DB
+217E- E5 F3 SBC $F3
+2180- E3 ???
+2181- E1 F0 SBC ($F0,X)
+2183- E5 DD SBC $DD
+2185- A0 F4 LDY #$F4
+2187- EF ???
+2188- A0 E5 LDY #$E5
+218A- F8 SED
+218B- E9 F4 SBC #$F4
+218D- A0 F4 LDY #$F4
+218F- EF ???
+2190- A0 D0 LDY #$D0
+2192- F2 EF SBC ($EF)
+2194- C4 CF CPY $CF
+2196- D3 ???
+2197- 00 BRK
+2198- D4 ???
+2199- E8 INX
+219A- E9 F3 SBC #$F3
+219C- A0 E3 LDY #$E3
+219E- EF ???
+219F- ED F0 F5 SBC $F5F0
+21A2- F4 ???
+21A3- E5 F2 SBC $F2
+21A5- A0 E9 LDY #$E9
+21A7- F3 ???
+21A8- A0 EE LDY #$EE
+21AA- EF ???
+21AB- F4 ???
+21AC- A0 E1 LDY #$E1
+21AE- EE A0 C1 INC $C1A0
+21B1- F0 F0 BEQ $21A3
+21B3- EC E5 A0 CPX $A0E5
+21B6- AF ???
+21B7- AF ???
+21B8- E5 A0 SBC $A0
+21BA- EF ???
+21BB- F2 A0 SBC ($A0)
+21BD- AF ???
+21BE- AF ???
+21BF- E3 ???
+21C0- 00 BRK
+21C1- D3 ???
+21C2- ED E1 F2 SBC $F2E1
+21C5- F4 ???
+21C6- D7 ???
+21C7- E1 F4 SBC ($F4,X)
+21C9- E3 ???
+21CA- E8 INX
+21CB- A0 EE LDY #$EE
+21CD- EF ???
+21CE- F4 ???
+21CF- A0 E4 LDY #$E4
+21D1- E5 F4 SBC $F4
+21D3- E5 E3 SBC $E3
+21D5- F4 ???
+21D6- E5 E4 SBC $E4
+21D8- 00 BRK
+21D9- 8D 8D D0 STA $D08D
+21DC- F2 E5 SBC ($E5)
+21DE- F3 ???
+21DF- F3 ???
+21E0- A0 E1 LDY #$E1
+21E2- EE F9 A0 INC $A0F9
+21E5- EB ???
+21E6- E5 F9 SBC $F9
+21E8- A0 F4 LDY #$F4
+21EA- EF ???
+21EB- A0 E5 LDY #$E5
+21ED- F8 SED
+21EE- E9 F4 SBC #$F4
+21F0- A0 F4 LDY #$F4
+21F2- EF ???
+21F3- A0 D0 LDY #$D0
+21F5- F2 EF SBC ($EF)
+21F7- C4 CF CPY $CF
+21F9- D3 ???
+21FA- 00 BRK
+21FB- C5 F8 CMP $F8
+21FD- E9 F4 SBC #$F4
+21FF- A0 F4 LDY #$F4
+2201- EF ???
+2202- A0 D0 LDY #$D0
+2204- F2 EF SBC ($EF)
+2206- C4 CF CPY $CF
+2208- D3 ???
+2209- BF ???
+220A- A0 DB LDY #$DB
+220C- F9 AF EE SBC $EEAF,Y
+220F- DD 00
+2211- 8D 81 C0 STA $C081 ;set up ram and video
+2214- 20 89 FE JSR $FE89 F8ROM:SETKBD
+2217- 8D 10 C0 STA $C010 r:KBDSTRB
+221A- 20 93 FE JSR $FE93 F8ROM:SETVID
+221D- 20 2F FB JSR $FB2F F8ROM:INIT
+2220- 20 84 FE JSR $FE84 F8ROM:SETNORM
+2223- A9 02 LDA #$02
+2225- 2C 98 BF BIT $BF98
+2228- F0 13 BEQ $223D
+222A- A9 01 LDA #$01
+222C- CD 0B C3 CMP $C30B
+222F- D0 0C BNE $223D
+2231- A9 88 LDA #$88
+2233- CD 0C C3 CMP $C30C
+2236- D0 05 BNE $223D
+2238- A9 95 LDA #$95
+223A- 20 00 C3 JSR $C300
+223D- 20 58 FC JSR $FC58 F8ROM:HOME
+2240- 60 RTS
+2241- 8D FC BF STA $BFFC ;*** set min kernel version (=#$00)
+2244- 8C FD BF STY $BFFD ;version of this interpreter (app?) (=#$01)
+2247- A0 17 LDY #$17
+2249- A9 01 LDA #$01
+224B- 99 58 BF STA $BF58,Y ;update ProDOS memory map
+224E- 4A LSR
+224F- 88 DEY
+2250- D0 F9 BNE $224B
+2252- A9 CF LDA #$CF
+2254- 8D 58 BF STA $BF58
+2257- 60 RTS
+2258- A9 00 LDA #$00
+225A- 8D 94 BF STA $BF94 ;ProDOS current file level
+225D- 8D 82 22 STA $2282
+2260- 20 00 BF JSR $BF00 P8:CLOSE(1:Ref/1)
+2263- CC $CC
+2264- 81 22 $2281
+2266- 60 RTS
+2267- 20 00 BF JSR $BF00 P8:QUIT(4:Type/1,Path,zz/1,zz)
+226A- 65 $65
+226B- 83 22 $2283
+226D- 4C 6D 22 JMP $226D
+2270- 38 SEC ;*** check machine ID
+2271- 20 1F FE JSR $FE1F F8ROM:IDROUTINE
+2274- 90 09 BCC $227F ;IIgs
+2276- 2C 98 BF BIT $BF98
+2279- 10 04 BPL $227F
+227B- 70 02 BVS $227F
+227D- 18 CLC
+227E- B0
+227F 38 SEC ;fail
+2280- 60 RTS
+2281- 01
+2282- 00 ;copy of ProDOS current file level
+2283- 04 00 TSB $00
+2285- 00 BRK
+2286- 00 BRK
+2287- 00 BRK
+2288- 00 BRK
+2289- 00 BRK
+228A- 8C 94 22 STY $2294 ;*** print text at YYAA
+228D- 8D 93 22 STA $2293
+2290- A0 00 LDY #$00
+2292- B9 89 20 LDA $2089,Y
+2295- F0 11 BEQ $22A8
+2297- 2C 98 BF BIT $BF98
+229A- 30 06 BMI $22A2
+229C- C9 C0 CMP #$C0
+229E- 90 02 BCC $22A2
+22A0- 29 DF AND #$DF
+22A2- 20 ED FD JSR $FDED F8ROM:COUT
+22A5- C8 INY
+22A6- D0 EA BNE $2292
+22A8- 60 RTS
+22A9- 20 C1 FB JSR $FBC1 F8ROM:BASCALC
+22AC- A4 29 LDY $29
+22AE- A5 28 LDA $28
+22B0- 20 FD 24 JSR $24FD
+22B3- A9 00 LDA #$00
+22B5- 8D 11 26 STA $2611
+22B8- 85 24 STA $24
+22BA- 20 80 24 JSR $2480
+22BD- F0 F4 BEQ $22B3
+22BF- 20 90 24 JSR $2490
+22C2- B0 EF BCS $22B3
+22C4- 8D 3C 26 STA $263C
+22C7- A9 01 LDA #$01
+22C9- 85 24 STA $24
+22CB- 20 80 24 JSR $2480
+22CE- F0 E3 BEQ $22B3
+22D0- 20 90 24 JSR $2490
+22D3- B0 F2 BCS $22C7
+22D5- 8D 3D 26 STA $263D
+22D8- A9 02 LDA #$02
+22DA- 85 24 STA $24
+22DC- 20 80 24 JSR $2480
+22DF- F0 E6 BEQ $22C7
+22E1- 20 90 24 JSR $2490
+22E4- B0 F2 BCS $22D8
+22E6- 8D 3E 26 STA $263E
+22E9- A2 00 LDX #$00
+22EB- 8E 3B 26 STX $263B
+22EE- A0 00 LDY #$00
+22F0- EE 3B 26 INC $263B
+22F3- 8E 3F 26 STX $263F
+22F6- B9 3C 26 LDA $263C,Y
+22F9- DD 4F 26 CMP $264F,X
+22FC- D0 08 BNE $2306
+22FE- E8 INX
+22FF- C8 INY
+2300- C0 03 CPY #$03
+2302- 90 F2 BCC $22F6
+2304- F0 0D BEQ $2313
+2306- AE 3F 26 LDX $263F
+2309- E8 INX
+230A- E8 INX
+230B- E8 INX
+230C- E0 15 CPX #$15
+230E- 90 DE BCC $22EE
+2310- 4C B3 22 JMP $22B3
+2313- A9 04 LDA #$04
+2315- 85 24 STA $24
+2317- 20 BC 24 JSR $24BC
+231A- F0 BC BEQ $22D8
+231C- 20 A3 24 JSR $24A3
+231F- B0 F2 BCS $2313
+2321- 0A ASL
+2322- 0A ASL
+2323- 0A ASL
+2324- 0A ASL
+2325- 8D 41 26 STA $2641
+2328- A9 05 LDA #$05
+232A- 85 24 STA $24
+232C- 20 BC 24 JSR $24BC
+232F- F0 E2 BEQ $2313
+2331- 20 AB 24 JSR $24AB
+2334- B0 F2 BCS $2328
+2336- 29 0F AND #$0F
+2338- 0D 41 26 ORA $2641
+233B- 8D 40 26 STA $2640
+233E- F0 D3 BEQ $2313
+2340- C9 32 CMP #$32
+2342- B0 CF BCS $2313
+2344- A9 07 LDA #$07
+2346- 85 24 STA $24
+2348- 20 80 24 JSR $2480
+234B- F0 DB BEQ $2328
+234D- 20 90 24 JSR $2490
+2350- B0 F2 BCS $2344
+2352- 8D 43 26 STA $2643
+2355- A9 08 LDA #$08
+2357- 85 24 STA $24
+2359- 20 80 24 JSR $2480
+235C- F0 E6 BEQ $2344
+235E- 20 90 24 JSR $2490
+2361- B0 F2 BCS $2355
+2363- 8D 44 26 STA $2644
+2366- A9 09 LDA #$09
+2368- 85 24 STA $24
+236A- 20 80 24 JSR $2480
+236D- F0 E6 BEQ $2355
+236F- 20 90 24 JSR $2490
+2372- B0 F2 BCS $2366
+2374- 8D 45 26 STA $2645
+2377- A2 00 LDX #$00
+2379- 8E 42 26 STX $2642
+237C- A0 00 LDY #$00
+237E- EE 42 26 INC $2642
+2381- 8E 46 26 STX $2646
+2384- B9 43 26 LDA $2643,Y
+2387- DD 64 26 CMP $2664,X
+238A- D0 08 BNE $2394
+238C- E8 INX
+238D- C8 INY
+238E- C0 03 CPY #$03
+2390- 90 F2 BCC $2384
+2392- F0 0D BEQ $23A1
+2394- AE 46 26 LDX $2646
+2397- E8 INX
+2398- E8 INX
+2399- E8 INX
+239A- E0 36 CPX #$36
+239C- 90 DE BCC $237C
+239E- 4C 44 23 JMP $2344
+23A1- A9 0B LDA #$0B
+23A3- 85 24 STA $24
+23A5- 20 BC 24 JSR $24BC
+23A8- F0 BC BEQ $2366
+23AA- 20 AB 24 JSR $24AB
+23AD- B0 F2 BCS $23A1
+23AF- 0A ASL
+23B0- 0A ASL
+23B1- 0A ASL
+23B2- 0A ASL
+23B3- 8D 48 26 STA $2648
+23B6- A9 0C LDA #$0C
+23B8- 85 24 STA $24
+23BA- 20 BC 24 JSR $24BC
+23BD- F0 E2 BEQ $23A1
+23BF- 20 AB 24 JSR $24AB
+23C2- B0 F2 BCS $23B6
+23C4- 29 0F AND #$0F
+23C6- 0D 48 26 ORA $2648
+23C9- 8D 47 26 STA $2647
+23CC- C9 9A CMP #$9A
+23CE- F0 D1 BEQ $23A1
+23D0- A9 0E LDA #$0E
+23D2- 85 24 STA $24
+23D4- 20 BC 24 JSR $24BC
+23D7- F0 DD BEQ $23B6
+23D9- 20 9F 24 JSR $249F
+23DC- B0 F2 BCS $23D0
+23DE- 0A ASL
+23DF- 0A ASL
+23E0- 0A ASL
+23E1- 0A ASL
+23E2- 8D 4A 26 STA $264A
+23E5- A9 0F LDA #$0F
+23E7- 85 24 STA $24
+23E9- 20 BC 24 JSR $24BC
+23EC- F0 E2 BEQ $23D0
+23EE- 20 AB 24 JSR $24AB
+23F1- B0 F2 BCS $23E5
+23F3- 29 0F AND #$0F
+23F5- 0D 4A 26 ORA $264A
+23F8- 8D 49 26 STA $2649
+23FB- C9 24 CMP #$24
+23FD- F0 D1 BEQ $23D0
+23FF- A9 11 LDA #$11
+2401- 85 24 STA $24
+2403- 20 BC 24 JSR $24BC
+2406- F0 DD BEQ $23E5
+2408- 20 A7 24 JSR $24A7
+240B- B0 F2 BCS $23FF
+240D- 0A ASL
+240E- 0A ASL
+240F- 0A ASL
+2410- 0A ASL
+2411- 8D 4C 26 STA $264C
+2414- A9 12 LDA #$12
+2416- 85 24 STA $24
+2418- 20 BC 24 JSR $24BC
+241B- F0 E2 BEQ $23FF
+241D- 20 AB 24 JSR $24AB
+2420- B0 F2 BCS $2414
+2422- 29 0F AND #$0F
+2424- 0D 4C 26 ORA $264C
+2427- 8D 4B 26 STA $264B
+242A- C9 5A CMP #$5A
+242C- F0 D1 BEQ $23FF
+242E- A9 14 LDA #$14
+2430- 85 24 STA $24
+2432- 20 BC 24 JSR $24BC
+2435- F0 DD BEQ $2414
+2437- 20 A7 24 JSR $24A7
+243A- B0 F2 BCS $242E
+243C- 0A ASL
+243D- 0A ASL
+243E- 0A ASL
+243F- 0A ASL
+2440- 8D 4E 26 STA $264E
+2443- A9 15 LDA #$15
+2445- 85 24 STA $24
+2447- 20 BC 24 JSR $24BC
+244A- F0 E2 BEQ $242E
+244C- 20 AB 24 JSR $24AB
+244F- B0 F2 BCS $2443
+2451- 29 0F AND #$0F
+2453- 0D 4E 26 ORA $264E
+2456- 8D 4D 26 STA $264D
+2459- C9 5A CMP #$5A
+245B- F0 D1 BEQ $242E
+245D- AD 11 26 LDA $2611
+2460- D0 07 BNE $2469
+2462- 20 DA 24 JSR $24DA
+2465- C9 88 CMP #$88
+2467- F0 DA BEQ $2443
+2469- C9 8D CMP #$8D
+246B- F0 0C BEQ $2479
+246D- C9 9B CMP #$9B
+246F- F0 08 BEQ $2479
+2471- A9 00 LDA #$00
+2473- 8D 11 26 STA $2611
+2476- 4C 5D 24 JMP $245D
+2479- 20 DF 25 JSR $25DF
+247C- AD 11 26 LDA $2611
+247F- 60 RTS
+2480- 20 BC 24 JSR $24BC
+2483- C9 E1 CMP #$E1
+2485- 90 06 BCC $248D
+2487- C9 FB CMP #$FB
+2489- B0 02 BCS $248D
+248B- 29 DF AND #$DF
+248D- C9 88 CMP #$88
+248F- 60 RTS
+2490- C9 C1 CMP #$C1
+2492- 90 09 BCC $249D
+2494- C9 DB CMP #$DB
+2496- B0 05 BCS $249D
+2498- 20 ED FD JSR $FDED F8ROM:COUT
+249B- 18 CLC
+249C- B0 38 BCS $24D6
+249E- 60 RTS
+249F- C9 B3 CMP #$B3
+24A1- B0 17 BCS $24BA
+24A3- C9 B4 CMP #$B4
+24A5- B0 13 BCS $24BA
+24A7- C9 B6 CMP #$B6
+24A9- B0 0F BCS $24BA
+24AB- C9 B0 CMP #$B0
+24AD- 90 0B BCC $24BA
+24AF- C9 BA CMP #$BA
+24B1- B0 07 BCS $24BA
+24B3- 20 ED FD JSR $FDED F8ROM:COUT
+24B6- 29 0F AND #$0F
+24B8- 18 CLC
+24B9- B0 38 BCS $24F3
+24BB- 60 RTS
+24BC- AD 11 26 LDA $2611
+24BF- D0 12 BNE $24D3
+24C1- 20 DA 24 JSR $24DA
+24C4- C9 95 CMP #$95
+24C6- F0 0B BEQ $24D3
+24C8- C9 9B CMP #$9B
+24CA- F0 04 BEQ $24D0
+24CC- C9 8D CMP #$8D
+24CE- D0 07 BNE $24D7
+24D0- 8D 11 26 STA $2611
+24D3- A4 24 LDY $24
+24D5- B1 28 LDA ($28),Y
+24D7- C9 88 CMP #$88
+24D9- 60 RTS
+24DA- A4 24 LDY $24
+24DC- B1 28 LDA ($28),Y
+24DE- 48 PHA
+24DF- 29 3F AND #$3F
+24E1- 09 40 ORA #$40
+24E3- 91 28 STA ($28),Y
+24E5- 20 F9 24 JSR $24F9
+24E8- 2C 00 C0 BIT $C000 r:KBD w:CLR80COL
+24EB- 10 F8 BPL $24E5
+24ED- A4 24 LDY $24
+24EF- 68 PLA
+24F0- 91 28 STA ($28),Y
+24F2- AD 00 C0 LDA $C000 r:KBD w:CLR80COL
+24F5- 8D 10 C0 STA $C010 r:KBDSTRB
+24F8- 60 RTS
+24F9- A0 07 LDY #$07
+24FB- A9 00 LDA #$00
+24FD- 8C DA 25 STY $25DA
+2500- 8D D9 25 STA $25D9
+2503- 20 9A 26 JSR $269A ;read time
+2506- 20 CD 26 JSR $26CD
+2509- 90 03 BCC $250E
+250B- 4C DE 25 JMP $25DE
+250E- A0 27 LDY #$27
+2510- A9 A0 LDA #$A0
+2512- 99 13 26 STA $2613,Y
+2515- 88 DEY
+2516- D0 FA BNE $2512
+2518- AD 4F 27 LDA $274F
+251B- 29 07 AND #$07
+251D- 8D 12 26 STA $2612
+2520- 0A ASL
+2521- 6D 12 26 ADC $2612
+2524- A8 TAY
+2525- B9 4C 26 LDA $264C,Y
+2528- 8D 13 26 STA $2613
+252B- B9 4D 26 LDA $264D,Y
+252E- 8D 14 26 STA $2614
+2531- B9 4E 26 LDA $264E,Y
+2534- 8D 15 26 STA $2615
+2537- AD 4E 27 LDA $274E
+253A- 48 PHA
+253B- 4A LSR
+253C- 4A LSR
+253D- 4A LSR
+253E- 4A LSR
+253F- 09 B0 ORA #$B0
+2541- 8D 17 26 STA $2617
+2544- 68 PLA
+2545- 29 0F AND #$0F
+2547- 09 B0 ORA #$B0
+2549- 8D 18 26 STA $2618
+254C- A9 AF LDA #$AF
+254E- 8D 19 26 STA $2619
+2551- AD 4D 27 LDA $274D
+2554- 29 1F AND #$1F
+2556- 8D 12 26 STA $2612
+2559- 0A ASL
+255A- 6D 12 26 ADC $2612
+255D- A8 TAY
+255E- B9 61 26 LDA $2661,Y
+2561- 8D 1A 26 STA $261A
+2564- B9 62 26 LDA $2662,Y
+2567- 8D 1B 26 STA $261B
+256A- B9 63 26 LDA $2663,Y
+256D- 8D 1C 26 STA $261C
+2570- A9 AF LDA #$AF
+2572- 8D 1D 26 STA $261D
+2575- AD 4C 27 LDA $274C
+2578- 48 PHA
+2579- 4A LSR
+257A- 4A LSR
+257B- 4A LSR
+257C- 4A LSR
+257D- 09 B0 ORA #$B0
+257F- 8D 1E 26 STA $261E
+2582- 68 PLA
+2583- 29 0F AND #$0F
+2585- 09 B0 ORA #$B0
+2587- 8D 1F 26 STA $261F
+258A- AD 50 27 LDA $2750
+258D- 48 PHA
+258E- 4A LSR
+258F- 4A LSR
+2590- 4A LSR
+2591- 4A LSR
+2592- 09 B0 ORA #$B0
+2594- 8D 21 26 STA $2621
+2597- 68 PLA
+2598- 29 0F AND #$0F
+259A- 09 B0 ORA #$B0
+259C- 8D 22 26 STA $2622
+259F- A9 BA LDA #$BA
+25A1- 8D 23 26 STA $2623
+25A4- AD 51 27 LDA $2751
+25A7- 48 PHA
+25A8- 4A LSR
+25A9- 4A LSR
+25AA- 4A LSR
+25AB- 4A LSR
+25AC- 09 B0 ORA #$B0
+25AE- 8D 24 26 STA $2624
+25B1- 68 PLA
+25B2- 29 0F AND #$0F
+25B4- 09 B0 ORA #$B0
+25B6- 8D 25 26 STA $2625
+25B9- A9 BA LDA #$BA
+25BB- 8D 26 26 STA $2626
+25BE- AD 52 27 LDA $2752
+25C1- 48 PHA
+25C2- 4A LSR
+25C3- 4A LSR
+25C4- 4A LSR
+25C5- 4A LSR
+25C6- 09 B0 ORA #$B0
+25C8- 8D 27 26 STA $2627
+25CB- 68 PLA
+25CC- 29 0F AND #$0F
+25CE- 09 B0 ORA #$B0
+25D0- 8D 28 26 STA $2628
+25D3- A0 27 LDY #$27
+25D5- B9 13 26 LDA $2613,Y
+25D8- 99 13 26 STA $2613,Y
+25DB- 88 DEY
+25DC- 10 F7 BPL $25D5
+25DE- 60 RTS
+25DF- AD 47 26 LDA $2647
+25E2- 8D 4C 27 STA $274C
+25E5- AD 42 26 LDA $2642
+25E8- 8D 4D 27 STA $274D
+25EB- AD 40 26 LDA $2640
+25EE- 8D 4E 27 STA $274E
+25F1- AD 3B 26 LDA $263B
+25F4- 09 10 ORA #$10
+25F6- 8D 4F 27 STA $274F
+25F9- AD 49 26 LDA $2649
+25FC- 8D 50 27 STA $2750
+25FF- AD 4B 26 LDA $264B
+2602- 8D 51 27 STA $2751
+2605- AD 4D 26 LDA $264D
+2608- 8D 52 27 STA $2752
+260B- A9 00 LDA #$00
+260D- 8D 53 27 STA $2753
+2610- 60 RTS
+2611- 00 BRK
+2612- 00 BRK
+2613- 00 BRK
+2614- 00 BRK
+2615- 00 BRK
+2616- 00 BRK
+2617- 00 BRK
+2618- 00 BRK
+2619- 00 BRK
+261A- 00 BRK
+261B- 00 BRK
+261C- 00 BRK
+261D- 00 BRK
+261E- 00 BRK
+261F- 00 BRK
+2620- 00 BRK
+2621- 00 BRK
+2622- 00 BRK
+2623- 00 BRK
+2624- 00 BRK
+2625- 00 BRK
+2626- 00 BRK
+2627- 00 BRK
+2628- 00 BRK
+2629- 00 BRK
+262A- 00 BRK
+262B- 00 BRK
+262C- 00 BRK
+262D- 00 BRK
+262E- 00 BRK
+262F- 00 BRK
+2630- 00 BRK
+2631- 00 BRK
+2632- 00 BRK
+2633- 00 BRK
+2634- 00 BRK
+2635- 00 BRK
+2636- 00 BRK
+2637- 00 BRK
+2638- 00 BRK
+2639- 00 BRK
+263A- 00 BRK
+263B- 00 BRK
+263C- 00 BRK
+263D- 00 BRK
+263E- 00 BRK
+263F- 00 BRK
+2640- 00 BRK
+2641- 00 BRK
+2642- 00 BRK
+2643- 00 BRK
+2644- 00 BRK
+2645- 00 BRK
+2646- 00 BRK
+2647- 00 BRK
+2648- 00 BRK
+2649- 00 BRK
+264A- 00 BRK
+264B- 00 BRK
+264C- 00 BRK
+264D- 00 BRK
+264E- 00 BRK
+264F- D3 ???
+2650- D5 CE CMP $CE,X
+2652- CD CF CE CMP $CECF
+2655- D4 ???
+2656- D5 C5 CMP $C5,X
+2658- D7 ???
+2659- C5 C4 CMP $C4
+265B- D4 ???
+265C- C8 INY
+265D- D5 C6 CMP $C6,X
+265F- D2 C9 CMP ($C9)
+2661- D3 ???
+2662- C1 D4 CMP ($D4,X)
+2664- CA DEX
+2665- C1 CE CMP ($CE,X)
+2667- C6 C5 DEC $C5
+2669- C2 ???
+266A- CD C1 D2 CMP $D2C1
+266D- C1 D0 CMP ($D0,X)
+266F- D2 CD CMP ($CD)
+2671- C1 D9 CMP ($D9,X)
+2673- CA DEX
+2674- D5 CE CMP $CE,X
+2676- CA DEX
+2677- D5 CC CMP $CC,X
+2679- C1 D5 CMP ($D5,X)
+267B- C7 ???
+267C- D3 ???
+267D- C5 D0 CMP $D0
+267F- D5 CE CMP $CE,X
+2681- CB ???
+2682- D5 CE CMP $CE,X
+2684- CB ???
+2685- D5 CE CMP $CE,X
+2687- CB ???
+2688- D5 CE CMP $CE,X
+268A- CB ???
+268B- D5 CE CMP $CE,X
+268D- CB ???
+268E- D5 CE CMP $CE,X
+2690- CB ???
+2691- CF ???
+2692- C3 ???
+2693- D4 ???
+2694- CE CF D6 DEC $D6CF
+2697- C4 C5 CPY $C5
+2699- C3 ???
+
+269A- 20 0B 27 JSR $270B ;*** read time
+269D- 20 F2 26 JSR $26F2 ;init clock
+26A0- 20 19 27 JSR $2719 ;read time
+26A3- 20 0B 27 JSR $270B
+26A6- 60 RTS
+
+26A7- 20 0B 27 JSR $270B ;*** write time
+26AA- 20 F2 26 JSR $26F2 ;init clock
+26AD- 20 2B 27 JSR $272B ;write time
+26B0- 20 0B 27 JSR $270B
+26B3- 60 RTS
+
+26B4- A2 00 LDX #$00 ;check clock data read
+26B6- A0 07 LDY #$07
+26B8- B9 4C 27 LDA $274C,Y
+26BB- 4A LSR
+26BC- 90 01 BCC $26BF
+26BE- E8 INX ;count non-zero bits
+26BF- C9 00 CMP #$00
+26C1- D0 F8 BNE $26BB
+26C3- 88 DEY
+26C4- 10 F2 BPL $26B8
+26C6- E0 00 CPX #$00 ;0 = fail (all 0)
+26C8- F0 02 BEQ $26CC
+26CA- E0 40 CPX #$40 ;64 = fail (all 1)
+26CC- 60 RTS ;NE is ok, EQ is fail
+
+26CD- A0 07 LDY #$07 ;mask time?
+26CF- B9 4C 27 LDA $274C,Y
+26D2- 39 54 27 AND $2754,Y
+26D5- 99 4C 27 STA $274C,Y
+26D8- 29 0F AND #$0F
+26DA- C9 0A CMP #$0A
+26DC- B0 12 BCS $26F0
+26DE- B9 4C 27 LDA $274C,Y
+26E1- D9 5C 27 CMP $275C,Y
+26E4- 90 0A BCC $26F0
+26E6- D9 64 27 CMP $2764,Y
+26E9- B0 05 BCS $26F0
+26EB- 88 DEY
+26EC- 10 E1 BPL $26CF
+26EE- 18 CLC
+26EF- B0 38 BCS $2729
+26F1- 60 RTS
+
+26F2- A2 07 LDX #$07 ;*** clock init
+26F4- A0 07 LDY #$07
+26F6- BD 44 27 LDA $2744,X ;get SmartWatch comparison register pattern bytes
+26F9- 4A LSR
+26FA- B0 05 BCS $2701
+26FC- 2C 00 C3 BIT $C300 ;write data bit 0 on A0 (A2 low = SmartWatch write)
+26FF- 90 03 BCC $2704
+2701- 2C 01 C3 BIT $C301 ;write data bit 1 on A0 (A2 low = SmartWatch write)
+2704- 88 DEY
+2705- 10 F2 BPL $26F9
+2707- CA DEX
+2708- 10 EA BPL $26F4
+270A- 60 RTS
+
+270B- A0 08 LDY #$08 ;*** ensure clock inactive
+270D- AD 05 C3 LDA $C305 ;also reset the comparison register pointer (A2 high = SmartWatch read)
+2710- CD 05 C3 CMP $C305
+2713- D0 F6 BNE $270B
+2715- 88 DEY
+2716- D0 F8 BNE $2710
+2718- 60 RTS
+
+2719- A2 07 LDX #$07 ; *** read time
+271B- A0 07 LDY #$07
+271D- AD 05 C3 LDA $C305 ;read data bit on A0 (A2 high = SmartWatch read)
+2720- 6A ROR
+2721- 7E 4C 27 ROR $274C,X
+2724- 88 DEY
+2725- 10 F6 BPL $271D
+2727- CA DEX
+2728- 10 F1 BPL $271B
+272A- 60 RTS
+
+272B- A2 07 LDX #$07 ; *** write time
+272D- A0 07 LDY #$07
+272F- BD 4C 27 LDA $274C,X ;get the time bytes
+2732- 4A LSR
+2733- B0 05 BCS $273A
+2735- 2C 00 C3 BIT $C300 ;write data bit 0 on A0 (A2 low = SmartWatch write)
+2738- 90 03 BCC $273D
+273A- 2C 01 C3 BIT $C301 ;write data bit 1 on A0 (A2 low = SmartWatch write)
+273D- 88 DEY
+273E- 10 F2 BPL $2732
+2740- CA DEX
+2741- 10 EA BPL $272D
+2743- 60 RTS
+
+2744- 5C A3 3A C5 5C A3 3A C5 ;*** clock pattern
+
+274C- 00 BRK ;time buffer
+274D- 00 BRK
+274E- 00 BRK
+274F- 00 BRK
+2750- 00 BRK
+2751- 00 BRK
+2752- 00 BRK
+2753- 00 BRK
+2754- FF ??? ;time bitmask
+2755- 1F ???
+2756- 3F ???
+2757- 07 ???
+2758- 3F ???
+2759- 7F ???
+275A- 7F ???
+275B- FF ???
+275C- 00 BRK
+275D- 01 01 ORA ($01,X)
+275F- 01 00 ORA ($00,X)
+2761- 00 BRK
+2762- 00 BRK
+2763- 00 BRK
+2764- 9A TXS
+2765- 13 ???
+2766- 32 08 AND ($08)
+2768- 24 5A BIT $5A
+276A- 5A PHY
+276B- 9A TXS
+276C- 58 CLI
+276D- 9B ???
+276E- AD 3E BE LDA $BE3E
+2771- 91 28 STA ($28),Y
+2773- A9 00 LDA #$00
+2775- 8D 46 BE STA $BE46
+2778- AE BC BC LDX $BCBC
+277B- BD BC BC LDA $BCBC,X
+277E- 9D FF 01 STA $01FF,X
+2781- CA DEX
+2782- D0 F7 BNE $277B
+2784- AE BC BC LDX $BCBC
+2787- A9 8D LDA #$8D
+2789- 60 RTS
+278A- AD A3 BC LDA $BCA3
+278D- 8D D6 BE STA $BED6
+2790- A9 02 LDA #$02
+2792- 8D D8 BE STA $BED8
+2795- A9 EF LDA #$EF
+2797- 8D D9 BE STA $BED9
+279A- A9 00 LDA #$00
+279C- 8D DA BE STA $BEDA
+279F- 8D D7 BE STA $BED7
+27A2- 60 RTS
+27A3- 20 62 9F JSR $9F62
+27A6- C9 84 CMP #$84
+27A8- D0 17 BNE $27C1
+27AA- 20 F4 9F JSR $9FF4
+27AD- 8D 4B BE STA $BE4B
+27B0- 8D 44 BE STA $BE44
+27B3- 8D 45 BE STA $BE45
+27B6- 8D 46 BE STA $BE46
+27B9- A2 08 LDX #$08
+27BB- 20 76 9F JSR $9F76
+27BE- 4C 6C 9F JMP $9F6C
+27C1- A2 04 LDX #$04
+27C3- 20 76 9F JSR $9F76
+27C6- 20 6C 9F JSR $9F6C
+27C9- 4C F1 B7 JMP $B7F1
+27CC- 20 62 9F JSR $9F62
+27CF- AE 4B BE LDX $BE4B
+27D2- 9D 00 02 STA $0200,X
+27D5- C9 8D CMP #$8D
+27D7- F0 0E BEQ $27E7
+27D9- EE 4B BE INC $BE4B
+27DC- D0 05 BNE $27E3
+27DE- A9 10 LDA #$10
+27E0- 4C F0 9A JMP $9AF0
+27E3- AE 3F BE LDX $BE3F
+27E6- 60 RTS
+27E7- E8 INX
+27E8- CA DEX
+27E9- F0 0B BEQ $27F6
+27EB- 20 00 9A JSR $9A00
+27EE- 20 77 A6 JSR $A677
+27F1- B0 ED BCS $27E0
+27F3- 20 8D 9A JSR $9A8D
+27F6- A2 04 LDX #$04
+27F8- 20 76 9F JSR $9F76
+27FB- 4C 6C 9F JMP $9F6C
+27FE- 8C 40 00 STY $0040
diff --git a/docs/History.txt b/docs/History.txt
index 9d9385f2..87da9749 100644
--- a/docs/History.txt
+++ b/docs/History.txt
@@ -19,6 +19,12 @@ Restrictions/bugs:
- For an original Apple //e, 80-column (PR#3) and INVERSE, it still appears to be mousetext character, but it should be inverted upper-case from $40 to $5F.
+1.19.0 - 28 Aug 2010
+--------------------
+Changes:
+. Added No-Slot-Clock (located in $C300 ROM space).
+
+
1.18.2 - 17 Aug 2010
--------------------
Fixed:
diff --git a/docs/NoSlotClockDriverDisassembly.txt b/docs/NoSlotClockDriverDisassembly.txt
new file mode 100644
index 00000000..e0cc4f15
--- /dev/null
+++ b/docs/NoSlotClockDriverDisassembly.txt
@@ -0,0 +1,674 @@
+No-Slot-Clock (Dallas SmartWatch DS1216) ProDOS Driver.
+Probably written by Craig Peterson in 1990.
+Partial disassembly and comments by Nick Westgate (and CiderPress).
+
+2000- 38 SEC ;actually loads at $2000
+2001- B0 03 BCS $2006
+2003- 09 23
+2005- 90
+2006- A2 05 LDX #$05 ;pages to relocate
+2008- A0 00 LDY #$00
+200A- B9 00 20 LDA $2000,Y ;relocate to $1000
+200D- 99 00 10 STA $1000,Y
+2010- C8 INY
+2011- D0 F7 BNE $200A
+2013- EE 0C 10 INC $100C
+2016- EE 0F 10 INC $100F
+2019- CA DEX
+201A- F0 03 BEQ $201F
+201C- 4C 0A 10 JMP $100A
+101F- A9 00 LDA #$00
+1021- 85 A8 STA $A8
+1023- AE 80 02 LDX $0280 ;check input buffer for something? (ProDOS path?)
+1026- F0 1E BEQ $1046
+1028- E6 A8 INC $A8
+102A- CA DEX
+102B- F0 08 BEQ $1035
+102D- BD 80 02 LDA $0280,X
+1030- 49 2F EOR #$2F
+1032- 0A ASL
+1033- D0 F3 BNE $1028
+1035- A0 00 LDY #$00
+1037- C8 INY
+1038- E8 INX
+1039- BD 80 02 LDA $0280,X
+103C- 99 E5 13 STA $13E5,Y
+103F- C4 A8 CPY $A8
+1041- 90 F4 BCC $1037
+1043- 8C E5 13 STY $13E5
+1046- D8 CLD
+1047- 2C 82 C0 BIT $C082 ;read LC ROM
+104A- A9 46 LDA #$46
+104C- 8D F2 03 STA $03F2 ;reset vector
+104F- A9 10 LDA #$10
+1051- 8D F3 03 STA $03F3
+1054- 49 A5 EOR #$A5
+1056- 8D F4 03 STA $03F4
+1059- A9 95 LDA #$95
+105B- 20 ED FD JSR $FDED F8ROM:COUT
+105E- A2 FF LDX #$FF
+1060- 9A TXS
+1061- 8D 0C C0 STA $C00C w:CLR80VID
+1064- 8D 0E C0 STA $C00E w:CLRALTCHAR
+1067- 20 93 FE JSR $FE93 F8ROM:SETVID
+106A- 20 89 FE JSR $FE89 F8ROM:SETKBD
+106D- 20 84 FE JSR $FE84 F8ROM:SETNORM
+1070- 20 2F FB JSR $FB2F F8ROM:INIT
+1073- A2 17 LDX #$17
+1075- A9 01 LDA #$01
+1077- 9D 58 BF STA $BF58,X
+107A- A9 00 LDA #$00
+107C- CA DEX
+107D- D0 F8 BNE $1077
+107F- A9 CF LDA #$CF
+1081- 8D 58 BF STA $BF58 ;ProDOS system memory bitmap
+1084- AD 98 BF LDA $BF98 ;ProDOS machine ID
+1087- 29 88 AND #$88
+1089- D0 05 BNE $1090
+108B- A9 DF LDA #$DF ;II or II+
+108D- 8D 5B 13 STA $135B
+1090- AD 98 BF LDA $BF98 ;ProDOS machine ID
+1093- 29 01 AND #$01 ;check for clock
+1095- F0 26 BEQ $10BD
+1097- 20 58 FC JSR $FC58 F8ROM:HOME
+109A- 20 19 13 JSR $1319 ;print
+109D- 8D D0 F2 ;Previous Clock Installed!
+10A0- E5 F6 E9 EF F5 F3 A0 C3
+10A8- EC EF E3 EB A0 C9 EE F3
+10B0- F4 E1 EC EC E5 E4 A1 87
+10B8- 8D 00
+10BA- 4C 1F 12 JMP $121F ;exit
+
+10BD- A0 03 LDY #$03
+10BF- B9 90 BF LDA $BF90,Y ;backup ProDOS date/time
+10C2- 99 97 11 STA $1197,Y
+10C5- 88 DEY
+10C6- 10 F7 BPL $10BF
+10C8- A9 CF LDA #$CF ;prepare to check slot ROM
+10CA- A0 FF LDY #$FF
+10CC- 8D F9 13 STA $13F9 ;(LDA $CFFF)
+10CF- 8C F8 13 STY $13F8
+10D2- 8D 66 14 STA $1466 ;(STA $CFFF)
+10D5- 8C 65 14 STY $1465
+10D8- A9 00 LDA #$00 ;slot (3, 1..7)
+10DA- 8D 9C 11 STA $119C ;count?
+10DD- A9 03 LDA #$03
+10DF- 09 C0 ORA #$C0
+10E1- 8D FD 13 STA $13FD ;(STA $CX00)
+10E4- 8D 00 14 STA $1400 ;(LDA $CX04)
+10E7- 8D 0F 14 STA $140F ;(LDA $CX00,Y)
+10EA- 8D 1D 14 STA $141D ;(LDA $CX04)
+10ED- A9 03 LDA #$03 ;try to init 3 times
+10EF- 8D 9B 11 STA $119B
+10F2- 20 F5 13 JSR $13F5 ;init clock and get date/time
+10F5- AD 91 BF LDA $BF91 ;ProDOS date/time updated?
+10F8- 6A ROR
+10F9- AD 90 BF LDA $BF90
+10FC- 2A ROL
+10FD- 2A ROL
+10FE- 2A ROL
+10FF- 2A ROL
+1100- 29 0F AND #$0F
+1102- F0 24 BEQ $1128
+1104- C9 0D CMP #$0D
+1106- B0 20 BCS $1128
+1108- AD 90 BF LDA $BF90
+110B- 29 1F AND #$1F
+110D- F0 19 BEQ $1128
+110F- C9 20 CMP #$20
+1111- B0 15 BCS $1128
+1113- AD 93 BF LDA $BF93
+1116- C9 18 CMP #$18
+1118- B0 0E BCS $1128
+111A- AD 92 BF LDA $BF92
+111D- C9 3C CMP #$3C
+111F- B0 07 BCS $1128
+1121- CE 9B 11 DEC $119B
+1124- D0 CC BNE $10F2 ;not updated: try to init again (3 times)
+1126- F0 75 BEQ $119D
+1128- EE 9C 11 INC $119C ;next slot
+112B- AD 9C 11 LDA $119C
+112E- C9 08 CMP #$08
+1130- 90 AD BCC $10DF
+1132- D0 1D BNE $1151 ;stop after slots 3, 1..7
+
+1134- A9 C0 LDA #$C0 ;prepare to check internal C8 ROM (where is this called from?)
+1136- A0 15 LDY #$15
+1138- 8D F9 13 STA $13F9
+113B- 8C F8 13 STY $13F8 ;(LDA $C015)
+113E- A0 07 LDY #$07
+1140- 8D FD 13 STA $13FD ;(STA $C007)
+1143- 8C FC 13 STY $13FC
+1146- 88 DEY
+1147- 8D 66 14 STA $1466 ;(STA $C006)
+114A- 8C 65 14 STY $1465
+114D- A9 C8 LDA #$C8
+114F- D0 93 BNE $10E4 ;set up addresses for internal C8 ROM
+
+1151- A0 03 LDY #$03 ;SmartWatch not found
+1153- B9 97 11 LDA $1197,Y ;restore ProDOS date/time
+1156- 99 90 BF STA $BF90,Y
+1159- 88 DEY
+115A- 10 F7 BPL $1153
+115C- 20 58 FC JSR $FC58 F8ROM:HOME
+115F- 20 19 13 JSR $1319 ;print
+1162- 8D CE EF AD D3 CC ;No-SLot Clock Not Found...Clock Not Installed
+1168- EF F4 A0 C3 EC EF E3 EB
+1170- A0 CE EF F4 A0 C6 EF F5
+1178- EE E4 AE 8D 8D C3 EC EF
+1180- E3 EB A0 CE EF F4 A0 C9
+1188- EE F3 F4 E1 EC EC E5 E4
+1190- A1 87 8D 00
+1194- 4C 1F 12 JMP $121F ;exit
+
+1197- 00 ;ProDOS date/time
+1198- 00
+1199- 00
+119A- 00
+119B- 03 ???
+119C- 00 BRK
+119D- AD 07 BF LDA $BF07 ;success: install driver
+11A0- 85 A5 STA $A5
+11A2- 18 CLC
+11A3- 69 73 ADC #$73
+11A5- 8D 04 14 STA $1404
+11A8- AD 08 BF LDA $BF08
+11AB- 85 A6 STA $A6
+11AD- 69 00 ADC #$00
+11AF- 8D 05 14 STA $1405
+11B2- AD 8B C0 LDA $C08B rw:LCBANK1
+11B5- AD 8B C0 LDA $C08B rw:LCBANK1
+11B8- A0 7C LDY #$7C
+11BA- B9 F5 13 LDA $13F5,Y
+11BD- 91 A5 STA ($A5),Y
+11BF- 88 DEY
+11C0- 10 F8 BPL $11BA
+11C2- AD 98 BF LDA $BF98
+11C5- 09 01 ORA #$01
+11C7- 8D 98 BF STA $BF98
+11CA- A9 4C LDA #$4C
+11CC- 8D 06 BF STA $BF06
+11CF- 20 06 BF JSR $BF06
+11D2- 2C 82 C0 BIT $C082
+11D5- 20 58 FC JSR $FC58 F8ROM:HOME
+11D8- 20 19 13 JSR $1319 ;print
+11DB- 8D CE EF AD D3 ;No-Slot Clock Installed
+11E0- EC EF F4 A0 C3 EC EF E3
+11E8- EB A0 C9 EE F3 F4 E1 EC
+11F0- EC E5 E4 A0 A0 00
+11F6- AD 91 BF LDA $BF91
+11F9- 6A ROR
+11FA- 48 PHA
+11FB- AD 90 BF LDA $BF90
+11FE- 48 PHA
+11FF- 2A ROL
+1200- 2A ROL
+1201- 2A ROL
+1202- 2A ROL
+1203- 29 0F AND #$0F
+1205- 20 3E 13 JSR $133E
+1208- A9 AF LDA #$AF
+120A- 20 ED FD JSR $FDED F8ROM:COUT
+120D- 68 PLA
+120E- 29 1F AND #$1F
+1210- 20 3E 13 JSR $133E
+1213- A9 AF LDA #$AF
+1215- 20 ED FD JSR $FDED F8ROM:COUT
+1218- 68 PLA
+1219- 20 3E 13 JSR $133E
+121C- 20 8E FD JSR $FD8E F8ROM:CROUT
+121F- A9 5C LDA #$5C ;*** exit routine
+1221- 8D F2 03 STA $03F2
+1224- A9 13 LDA #$13
+1226- 8D F3 03 STA $03F3
+1229- 49 A5 EOR #$A5
+122B- 8D F4 03 STA $03F4
+122E- AD 30 BF LDA $BF30
+1231- 8D 75 13 STA $1375
+1234- 20 6B 13 JSR $136B
+1237- AD 23 18 LDA $1823
+123A- 8D 88 12 STA $1288
+123D- AD 24 18 LDA $1824
+1240- 8D 94 12 STA $1294
+1243- A9 01 LDA #$01
+1245- 85 A7 STA $A7
+1247- A9 2B LDA #$2B
+1249- 85 A5 STA $A5
+124B- A9 18 LDA #$18
+124D- 85 A6 STA $A6
+124F- A0 10 LDY #$10
+1251- B1 A5 LDA ($A5),Y
+1253- C9 FF CMP #$FF
+1255- D0 2D BNE $1284
+1257- A0 00 LDY #$00
+1259- B1 A5 LDA ($A5),Y
+125B- 29 30 AND #$30
+125D- F0 25 BEQ $1284
+125F- B1 A5 LDA ($A5),Y
+1261- 29 0F AND #$0F
+1263- 85 A8 STA $A8
+1265- A8 TAY
+1266- A2 06 LDX #$06
+1268- B1 A5 LDA ($A5),Y
+126A- DD DE 13 CMP $13DE,X
+126D- D0 15 BNE $1284
+126F- 88 DEY
+1270- CA DEX
+1271- 10 F5 BPL $1268
+1273- AC E5 13 LDY $13E5
+1276- C4 A8 CPY $A8
+1278- D0 40 BNE $12BA
+127A- B1 A5 LDA ($A5),Y
+127C- D9 E5 13 CMP $13E5,Y
+127F- D0 39 BNE $12BA
+1281- 88 DEY
+1282- D0 F6 BNE $127A
+1284- A5 A5 LDA $A5
+1286- 18 CLC
+1287- 69 27 ADC #$27
+1289- 85 A5 STA $A5
+128B- 90 02 BCC $128F
+128D- E6 A6 INC $A6
+128F- E6 A7 INC $A7
+1291- A5 A7 LDA $A7
+1293- C9 0D CMP #$0D
+1295- 90 B8 BCC $124F
+1297- AD 02 18 LDA $1802
+129A- 8D 78 13 STA $1378
+129D- AD 03 18 LDA $1803
+12A0- 8D 79 13 STA $1379
+12A3- 0D 78 13 ORA $1378
+12A6- F0 35 BEQ $12DD
+12A8- 20 6B 13 JSR $136B
+12AB- A9 00 LDA #$00
+12AD- 85 A7 STA $A7
+12AF- A9 04 LDA #$04
+12B1- 85 A5 STA $A5
+12B3- A9 18 LDA #$18
+12B5- 85 A6 STA $A6
+12B7- 4C 4F 12 JMP $124F
+12BA- AE 80 02 LDX $0280
+12BD- F0 0B BEQ $12CA
+12BF- CA DEX
+12C0- F0 08 BEQ $12CA
+12C2- BD 80 02 LDA $0280,X
+12C5- 49 2F EOR #$2F
+12C7- 0A ASL
+12C8- D0 F5 BNE $12BF
+12CA- A0 00 LDY #$00
+12CC- C8 INY
+12CD- E8 INX
+12CE- B1 A5 LDA ($A5),Y
+12D0- 9D 80 02 STA $0280,X
+12D3- C4 A8 CPY $A8
+12D5- 90 F5 BCC $12CC
+12D7- 8E 80 02 STX $0280
+12DA- 4C 7A 13 JMP $137A
+12DD- 20 19 13 JSR $1319 ;print
+12E0- 8D 8D 8D AA A0 D5 EE E1 ;...* Unable to find next '.SYSTEM' file
+12E8- E2 EC E5 A0 F4 EF A0 E6
+12F0- E9 EE E4 A0 EE E5 F8 F4
+12F8- A0 A7 AE D3 D9 D3 D4 C5
+1300- CD A7 A0 E6 E9 EC E5 A0
+1308- AA 8D 00
+130B- 2C 10 C0 BIT $C010
+130E- AD 00 C0 LDA $C000 r:KBD w:CLR80COL
+1311- 10 FB BPL $130E
+1313- 2C 10 C0 BIT $C010 r:KBDSTRB
+1316- 4C 5C 13 JMP $135C ;exit
+
+1319- 68 PLA ;*** print routine (text follows JSR)
+131A- 85 A5 STA $A5
+131C- 68 PLA
+131D- 85 A6 STA $A6
+131F- D0 0A BNE $132B
+1321- C9 E1 CMP #$E1
+1323- 90 03 BCC $1328
+1325- 2D 5B 13 AND $135B
+1328- 20 ED FD JSR $FDED F8ROM:COUT
+132B- E6 A5 INC $A5
+132D- D0 02 BNE $1331
+132F- E6 A6 INC $A6
+1331- A0 00 LDY #$00
+1333- B1 A5 LDA ($A5),Y
+1335- D0 EA BNE $1321
+1337- A5 A6 LDA $A6
+1339- 48 PHA
+133A- A5 A5 LDA $A5
+133C- 48 PHA
+133D- 60 RTS
+133E- A2 B0 LDX #$B0
+1340- C9 0A CMP #$0A
+1342- 90 07 BCC $134B
+1344- E9 0A SBC #$0A
+1346- E8 INX
+1347- C9 0A CMP #$0A
+1349- B0 F9 BCS $1344
+134B- 48 PHA
+134C- E0 B0 CPX #$B0
+134E- F0 04 BEQ $1354
+1350- 8A TXA
+1351- 20 ED FD JSR $FDED F8ROM:COUT
+1354- 68 PLA
+1355- 09 B0 ORA #$B0
+1357- 20 ED FD JSR $FDED F8ROM:COUT
+135A- 60 RTS
+135B- FF ??? ;or DF
+135C- 20 00 BF JSR $BF00 P8:QUIT(4:Type/1,Path,zz/1,zz)
+135F- 65 $65
+1360- 64 13 $1364
+1362- 00 BRK
+1363- 60 RTS
+1364- 04 00 TSB $00
+1366- 00 BRK
+1367- 00 BRK
+1368- 00 BRK
+1369- 00 BRK
+136A- 00 BRK
+136B- 20 00 BF JSR $BF00 P8:READ_BLOCK(3:Unit/1,Buff,BlkNum)
+136E- 80 $80
+136F- 74 13 $1374
+1371- B0 28 BCS $139B ;disk error
+1373- 60 RTS
+1374- 03 ???
+1375- 60 RTS
+1376- 00 BRK
+1377- 18 CLC
+1378- 02 ???
+1379- 00 BRK
+137A- 20 00 BF JSR $BF00 P8:OPEN(3:pn,ioBuff,Ref/1)
+137D- C8 $C8
+137E- CE 13 $13CE
+1380- B0 19 BCS $139B
+1382- AD D3 13 LDA $13D3
+1385- 8D D5 13 STA $13D5
+1388- 20 00 BF JSR $BF00 P8:READ(4:Ref/1,Where,reqCount,xfrCount)
+138B- CA $CA
+138C- D4 13 $13D4
+138E- B0 0B BCS $139B
+1390- 20 00 BF JSR $BF00 P8:CLOSE(1:Ref/1)
+1393- CC $CC
+1394- DC 13 $13DC
+1396- B0 03 BCS $139B
+1398- 4C 00 20 JMP $1000
+139B- 48 PHA
+139C- 20 19 13 JSR $1319 ;print
+139F- 8D ;...** Disk Error $
+13A0- 8D 8D AA AA A0 A0 C4 E9
+13A8- F3 EB A0 C5 F2 F2 EF F2
+13B0- A0 A4 00
+13B3- 68 PLA
+13B4- 20 DA FD JSR $FDDA F8ROM:PRBYTE
+13B7- 20 19 13 JSR $1319 ;print
+13BA- A0 A0 AA AA 8D 00 ; **.
+13C0- 2C 10 C0 BIT $C010
+13C3- AD 00 C0 LDA $C000 r:KBD w:CLR80COL
+13C6- 10 FB BPL $13C3
+13C8- 2C 10 C0 BIT $C010 r:KBDSTRB
+13CB- 4C 5C 13 JMP $135C
+13CE- 03 ???
+13CF- 80 02 BRA $13D3
+13D1- 00 BRK
+13D2- 18 CLC
+13D3- 01 04 ORA ($04,X)
+13D5- 01 00 ORA ($00,X)
+13D7- 20 FF FF JSR $FFFF
+13DA- 00 BRK
+13DB- 00 BRK
+13DC- 01 00 ORA ($00,X)
+13DE- 2E 53 59 ROL $5953
+13E1- 53 ???
+13E2- 54 ???
+13E3- 45 4D EOR $4D
+13E5- 0F ;length
+13E6- 4E 53 2E ;copied from input buffer (path?)
+13E9- 43
+13EA- 4C 4F 43
+13ED- 4B ...
+13EE- 2E 53 59 ROL $5953
+13F1- 53 ???
+13F2- 54 ???
+13F3- 45 4D EOR $4D
+
+13F5- 08 PHP ;*** clock init and get time
+13F6- 78 SEI
+13F7- AD FF CF LDA $CFFF rw:CLRROM
+13FA- 48 PHA
+13FB- 8D 00 C3 STA $C300 ;switch in CX00 slot/C8 ROM? (calling code sets CX from here on)
+13FE- AD 04 C3 LDA $C304 ;reset the comparison register pointer (A2 high = SmartWatch read)
+1401- A2 08 LDX #$08
+1403- BD 68 14 LDA $1468,X ;get SmartWatch comparison register pattern bytes
+1406- 38 SEC ;mark end of byte
+1407- 6A ROR ;low bits first
+1408- 48 PHA
+1409- A9 00 LDA #$00
+140B- 2A ROL
+140C- A8 TAY
+140D- B9 00 C3 LDA $C300,Y ;write data bit on A0 (A2 low = SmartWatch write)
+1410- 68 PLA
+1411- 4A LSR
+1412- D0 F4 BNE $1408
+1414- CA DEX
+1415- D0 EC BNE $1403
+1417- A2 08 LDX #$08 ;read registers (date/time)
+1419- A0 08 LDY #$08
+141B- AD 04 C3 LDA $C304 ;read data bit on D0 (A2 high = SmartWatch read)
+141E- 6A ROR
+141F- 7E FF 01 ROR $01FF,X ;copy data to input buffer
+1422- 88 DEY
+1423- D0 F6 BNE $141B
+1425- BD FF 01 LDA $01FF,X
+1428- 4A LSR
+1429- 4A LSR
+142A- 4A LSR
+142B- 4A LSR
+142C- A8 TAY
+142D- F0 0E BEQ $143D
+142F- BD FF 01 LDA $01FF,X
+1432- 29 0F AND #$0F
+1434- 18 CLC
+1435- 69 0A ADC #$0A
+1437- 88 DEY
+1438- D0 FB BNE $1435
+143A- 9D FF 01 STA $01FF,X
+143D- CA DEX
+143E- D0 D9 BNE $1419
+1440- AD 04 02 LDA $0204 ;copy data to ProDOS date/time
+1443- 8D 93 BF STA $BF93
+1446- AD 05 02 LDA $0205
+1449- 8D 92 BF STA $BF92
+144C- AD 01 02 LDA $0201
+144F- 0A ASL
+1450- 0A ASL
+1451- 0A ASL
+1452- 0A ASL
+1453- 0A ASL
+1454- 0D 02 02 ORA $0202
+1457- 8D 90 BF STA $BF90
+145A- AD 00 02 LDA $0200
+145D- 2A ROL
+145E- 8D 91 BF STA $BF91
+1461- 68 PLA
+1462- 30 03 BMI $1467
+1464- 8D FF CF STA $CFFF rw:CLRROM ;restore ROM status (hmm)
+1467- 28 PLP
+1468- 60 RTS
+
+1469- 5C A3 3A C5 5C A3 3A C5 ;*** clock pattern
+
+1471- 00
+1472- B3 ???
+1473- 74 F5 STZ $F5,X
+1475- D3 ???
+1476- 6D E0 68 ADC $68E0
+1479- 7D DD BB ADC $BBDD,X
+147C- 20 2F 52 JSR $522F
+147F- 41 4D EOR ($4D,X)
+1481- 20 8D 00 JSR $008D
+1484- F3 ???
+1485- 20 E1 AA JSR $AAE1
+1488- 68 PLA
+1489- B0 13 BCS $149E
+148B- 6D DD BB ADC $BBDD
+148E- 8D DD 20 STA $10DD
+1491- 2F ???
+1492- 43 ???
+1493- 54 ???
+1494- 2E 31 20 ROL $1031
+1497- 8D 00 EE STA $EE00
+149A- DF ???
+149B- BB ???
+149C- D0 03 BNE $14A1
+149E- A9 FF LDA #$FF
+14A0- 38 SEC
+14A1- 60 RTS
+14A2- C9 30 CMP #$30
+14A4- 20 2F 48 JSR $482F
+14A7- 41 52 EOR ($52,X)
+14A9- 44 ???
+14AA- 31 20 AND ($10),Y
+14AC- 8D 00 C9 STA $C900
+14AF- 47 ???
+14B0- 90 04 BCC $14B6
+14B2- 38 SEC
+14B3- 09 00 ORA #$00
+14B5- 60 RTS
+14B6- E9 06 SBC #$06
+14B8- 20 2F 52 JSR $522F
+14BB- 41 4D EOR ($4D,X)
+14BD- 20 8D 00 JSR $008D
+14C0- DD CA 10 CMP $10CA,X
+14C3- F8 SED
+14C4- 0D DD BB ORA $BBDD
+14C7- 8D DD BB STA $BBDD
+14CA- 60 RTS
+14CB- 0E 0E 2F ASL $1F0E
+14CE- 4E 4F 2E LSR $1E4F
+14D1- 53 ???
+14D2- 4C 4F 54 JMP $544F
+14D5- 2E 43 4C ROL $4C43
+14D8- 4F ???
+14D9- 43 ???
+14DA- 4B ???
+14DB- 20 8D 00 JSR $008D
+14DE- 2D D0 08 AND $08D0
+14E1- EE 53 BE INC $BE53
+14E4- 8D 52 BE STA $BE52
+14E7- D0 1D BNE $1506
+14E9- A0 08 LDY #$08
+14EB- 8C 52 BE STY $BE52
+14EE- BD 97 B8 LDA $B897,X
+14F1- 10 06 BPL $14F9
+14F3- 29 7F AND #$7F
+14F5- 88 DEY
+14F6- CE 52 BE DEC $BE52
+14F9- AA TAX
+14FA- B9 EB BB LDA $BBEB,Y
+14FD- DD B7 B8 CMP $B8B7,X
+1500- D0 17 BNE $1519
+1502- CA DEX
+1503- 88 DEY
+1504- 10 F4 BPL $14FA
+1506- AD 53 BE LDA $BE53
+1509- 0A ASL
+150A- AA TAX
+150B- BD 69 B9 LDA $B969,X
+150E- 8D 55 BE STA $BE55
+1511- BD 68 B9 LDA $B968,X
+1514- 8D 54 BE STA $BE54
+1517- 18 CLC
+1518- 60 RTS
+1519- AC 52 BE LDY $BE52
+151C- CE 53 BE DEC $BE53
+151F- AE 53 BE LDX $BE53
+1522- D0 CA BNE $14EE
+1524- CE 53 BE DEC $BE53
+1527- 38 SEC
+1528- 4C 06 BE JMP $BE06
+152B- A0 00 LDY #$00
+152D- 8C DD BB STY $BBDD
+1530- 8C DE BB STY $BBDE
+1533- 8C DF BB STY $BBDF
+1536- 60 RTS
+1537- AD B8 BE LDA $BEB8
+153A- C9 FC CMP #$FC
+153C- F0 68 BEQ $15A6
+153E- C9 06 CMP #$06
+1540- F0 3F BEQ $1581
+1542- C9 04 CMP #$04
+1544- D0 03 BNE $1549
+1546- 4C 60 B2 JMP $B260
+1549- C9 FF CMP #$FF
+154B- F0 04 BEQ $1551
+154D- A9 0D LDA #$0D
+154F- 38 SEC
+1550- 60 RTS
+1551- 20 31 B5 JSR $B531
+1554- 20 3A B3 JSR $B33A
+1557- A9 00 LDA #$00
+1559- 8D 58 BE STA $BE58
+155C- 8D 6B BF STA $BF6B
+155F- 8D 6C BF STA $BF6C
+1562- 8D 6D BF STA $BF6D
+1565- 8D 6E BF STA $BF6E
+1568- A9 01 LDA #$01
+156A- 8D 6F BF STA $BF6F
+156D- A9 20 LDA #$20
+156F- 8D 59 BE STA $BE59
+1572- A9 FF LDA #$FF
+1574- 8D 6A BE STA $BE6A
+1577- A9 80 LDA #$80
+1579- 8D 57 BE STA $BE57
+157C- A9 05 LDA #$05
+157E- 8D 56 BE STA $BE56
+1581- 4C 20 AE JMP $AE20
+1584- 20 0D A4 JSR $A40D
+1587- A5 74 LDA $74
+1589- 8D A9 BB STA $BBA9
+158C- AE BD BB LDX $BBBD
+158F- CA DEX
+1590- 86 74 STX $74
+1592- 20 0D AC JSR $AC0D
+1595- AE A9 BB LDX $BBA9
+1598- 86 74 STX $74
+159A- B0 6C BCS $1608
+159C- 20 65 D6 JSR $D665
+159F- 20 7C A4 JSR $A47C
+15A2- A9 00 LDA #$00
+15A4- F0 15 BEQ $15BB
+15A6- A9 00 LDA #$00
+15A8- 8D 44 BE STA $BE44
+15AB- 85 DE STA $DE
+15AD- AD 56 BE LDA $BE56
+15B0- 4A LSR
+15B1- 90 16 BCC $15C9
+15B3- 20 08 AC JSR $AC08
+15B6- B0 50 BCS $1608
+15B8- 20 65 D6 JSR $D665
+15BB- 85 D8 STA $D8
+15BD- 20 A1 AC JSR $ACA1
+15C0- 20 8D 9A JSR $9A8D
+15C3- 20 DF AB JSR $ABDF
+15C6- 4C D2 D7 JMP $D7D2
+15C9- 20 73 F2 JSR $F273
+15CC- A9 A3 LDA #$A3
+15CE- 8D 61 9F STA $9F61
+15D1- A9 FF LDA #$FF
+15D3- 8D 53 BE STA $BE53
+15D6- 85 33 STA $33
+15D8- A2 04 LDX #$04
+15DA- 20 76 9F JSR $9F76
+15DD- 4C 43 A8 JMP $A843
+15E0- 20 08 AC JSR $AC08
+15E3- B0 23 BCS $1608
+15E5- 20 65 D6 JSR $D665
+15E8- 20 17 9A JSR $9A17
+15EB- A9 00 LDA #$00
+15ED- 85 24 STA $24
+15EF- 4C 3F D4 JMP $D43F
+15F2- 20 31 B5 JSR $B531
+15F5- B0 11 BCS $1608
+15F7- 20 1F AC JSR $AC1F
+15FA- B0 0C BCS $1608
+15FC- 84 6B STY $6B
+15FE- 84 69 STY $69
diff --git a/resource/Applewin.rc b/resource/Applewin.rc
index 8b40bd35..52653225 100644
--- a/resource/Applewin.rc
+++ b/resource/Applewin.rc
@@ -246,8 +246,8 @@ DISK_ICON ICON "DISK.ICO"
//
VS_VERSION_INFO VERSIONINFO
- FILEVERSION 1,18,2,0
- PRODUCTVERSION 1,18,2,0
+ FILEVERSION 1,19,0,0
+ PRODUCTVERSION 1,19,0,0
FILEFLAGSMASK 0x3fL
#ifdef _DEBUG
FILEFLAGS 0x1L
@@ -265,12 +265,12 @@ BEGIN
VALUE "Comments", "http://applewin.berlios.de"
VALUE "CompanyName", "AppleWin"
VALUE "FileDescription", "Apple //e Emulator for Windows"
- VALUE "FileVersion", "1, 18, 2, 0"
+ VALUE "FileVersion", "1, 19, 0, 0"
VALUE "InternalName", "APPLEWIN"
VALUE "LegalCopyright", " 1994-2010 Michael O'Brien, Oliver Schmidt, Tom Charlesworth, Michael Pohoreski, Nick Westgate, Linards Ticmanis"
VALUE "OriginalFilename", "APPLEWIN.EXE"
VALUE "ProductName", "Apple //e Emulator"
- VALUE "ProductVersion", "1, 18, 2, 0"
+ VALUE "ProductVersion", "1, 19, 0, 0"
END
END
BLOCK "VarFileInfo"
diff --git a/source/Memory.cpp b/source/Memory.cpp
index 41cac526..44df3857 100644
--- a/source/Memory.cpp
+++ b/source/Memory.cpp
@@ -29,6 +29,7 @@ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
#include "StdAfx.h"
#include "Harddisk.h"
#include "MouseInterface.h"
+#include "NoSlotClock.h"
#ifdef SUPPORT_CPM
#include "z80emu.h"
#include "Z80VICE\z80.h"
@@ -147,6 +148,8 @@ static BOOL modechanging = 0;
static BOOL Pravets8charmode = 0;
MemoryInitPattern_e g_eMemoryInitPattern = MIP_FF_FF_00_00;
+static CNoSlotClock g_NoSlotClock;
+
#ifdef RAMWORKS
UINT g_uMaxExPages = 1; // user requested ram pages
static LPBYTE RWpages[128]; // pointers to RW memory banks
@@ -548,6 +551,13 @@ BYTE __stdcall IORead_Cxxx(WORD programcounter, WORD address, BYTE write, BYTE v
}
}
+ if ((address >= 0xC300) && (address <= 0xC3FF))
+ {
+ int data;
+ if (g_NoSlotClock.ReadAccess(address, data))
+ return (BYTE) data;
+ }
+
if (!IS_APPLE2 && !SW_SLOTCXROM)
{
// !SW_SLOTC3ROM = Internal ROM: $C300-C3FF
@@ -575,6 +585,11 @@ BYTE __stdcall IORead_Cxxx(WORD programcounter, WORD address, BYTE write, BYTE v
BYTE __stdcall IOWrite_Cxxx(WORD programcounter, WORD address, BYTE write, BYTE value, ULONG nCyclesLeft)
{
+ if ((address >= 0xC300) && (address <= 0xC3FF))
+ {
+ g_NoSlotClock.WriteAccess(address);
+ }
+
return 0;
}
diff --git a/source/NoSlotClock.cpp b/source/NoSlotClock.cpp
new file mode 100644
index 00000000..13c21da6
--- /dev/null
+++ b/source/NoSlotClock.cpp
@@ -0,0 +1,231 @@
+/*
+AppleWin : An Apple //e emulator for Windows
+
+Copyright (C) 1994-1996, Michael O'Brien
+Copyright (C) 1999-2001, Oliver Schmidt
+Copyright (C) 2002-2005, Tom Charlesworth
+Copyright (C) 2006-2010, Tom Charlesworth, Michael Pohoreski, Nick Westgate
+
+AppleWin is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+AppleWin is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with AppleWin; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+*/
+
+/* Description: No Slot Clock (Dallas SmartWatch DS1216) emulation
+ *
+ * Author: Nick Westgate
+ */
+
+#include "StdAfx.h"
+#include "NoSlotClock.h"
+
+static byte ClockInitSequence[] = { 0xC5, 0x3A, 0xA3, 0x5C, 0xC5, 0x3A, 0xA3, 0x5C };
+
+CNoSlotClock::CNoSlotClock()
+:
+ m_ClockRegister(64),
+ m_ComparisonRegister(ClockInitSequence, sizeof(ClockInitSequence))
+{
+ Reset();
+}
+
+void CNoSlotClock::Reset()
+{
+ // SmartWatch reset - whether tied to system reset is component specific
+ m_ComparisonRegister.Reset();
+ m_bClockRegisterEnabled = false;
+ m_bWriteEnabled = true;
+}
+
+bool CNoSlotClock::ReadAccess(int address, int& data)
+{
+ // this may read or write the clock (returns true if data is changed)
+ if (address & 0x04)
+ return ClockRead(data);
+ else
+ {
+ ClockWrite(address);
+ return false;
+ }
+}
+
+void CNoSlotClock::WriteAccess(int address)
+{
+ // this may read or write the clock
+ int dummy = 0;
+ if (address & 0x04)
+ ClockRead(dummy);
+ else
+ ClockWrite(address);
+}
+
+bool CNoSlotClock::ClockRead(int& d0)
+{
+ // for a ROM, A2 high = read, and data out (if any) is on D0
+ if (!m_bClockRegisterEnabled)
+ {
+ m_ComparisonRegister.Reset();
+ m_bWriteEnabled = true;
+ return false;
+ }
+ else if (m_ClockRegister.ReadBit(d0))
+ {
+ m_bClockRegisterEnabled = false;
+ }
+ return true;
+}
+
+void CNoSlotClock::ClockWrite(int address)
+{
+ // for a ROM, A2 low = write, and data in is on A0
+ if (!m_bWriteEnabled)
+ return;
+
+ if (!m_bClockRegisterEnabled)
+ {
+ if ((m_ComparisonRegister.CompareBitNoIncrement(address & 0x1)))
+ {
+ if (m_ComparisonRegister.IncrementPointer())
+ {
+ m_bClockRegisterEnabled = true;
+ PopulateClockRegister();
+ }
+ }
+ else
+ {
+ // mismatch ignores further writes
+ m_bWriteEnabled = false;
+ }
+ }
+ else if (m_ClockRegister.IncrementPointer())
+ {
+ // simulate writes, but our clock register is read-only
+ m_bClockRegisterEnabled = false;
+ }
+}
+
+void CNoSlotClock::PopulateClockRegister()
+{
+ // all values are in packed BCD format (4 bits per decimal digit)
+ SYSTEMTIME now;
+ GetLocalTime(&now);
+
+ m_ClockRegister.Reset();
+
+ int centisecond = now.wMilliseconds / 10; // 00-99
+ m_ClockRegister.WriteNibble(centisecond % 10);
+ m_ClockRegister.WriteNibble(centisecond / 10);
+
+ int second = now.wSecond; // 00-59
+ m_ClockRegister.WriteNibble(second % 10);
+ m_ClockRegister.WriteNibble(second / 10);
+
+ int minute = now.wMinute; // 00-59
+ m_ClockRegister.WriteNibble(minute % 10);
+ m_ClockRegister.WriteNibble(minute / 10);
+
+ int hour = now.wHour; // 01-23
+ m_ClockRegister.WriteNibble(hour % 10);
+ m_ClockRegister.WriteNibble(hour / 10);
+
+ int day = now.wDayOfWeek + 1; // 01-07 (1 = Sunday)
+ m_ClockRegister.WriteNibble(day % 10);
+ m_ClockRegister.WriteNibble(day / 10);
+
+ int date = now.wDay; // 01-31
+ m_ClockRegister.WriteNibble(date % 10);
+ m_ClockRegister.WriteNibble(date / 10);
+
+ int month = now.wMonth; // 01-12
+ m_ClockRegister.WriteNibble(month % 10);
+ m_ClockRegister.WriteNibble(month / 10);
+
+ int year = now.wYear % 100; // 00-99
+ m_ClockRegister.WriteNibble(year % 10);
+ m_ClockRegister.WriteNibble(year / 10);
+}
+
+CNoSlotClock::RingRegister::~RingRegister()
+{
+ delete[] m_pRegister;
+}
+
+CNoSlotClock::RingRegister::RingRegister(int bitCount)
+{
+ Reset();
+
+ m_pRegister = new int[bitCount];
+ m_PointerWrap = bitCount;
+}
+
+CNoSlotClock::RingRegister::RingRegister(byte* bytes, int byteCount)
+{
+ Reset();
+
+ m_PointerWrap = byteCount * 8;
+ m_pRegister = new int[m_PointerWrap];
+
+ for (int i = 0; i < byteCount; i++)
+ WriteByte(bytes[i]);
+}
+
+void CNoSlotClock::RingRegister::Reset()
+{
+ m_Pointer = 0;
+}
+
+void CNoSlotClock::RingRegister::WriteByte(int data)
+{
+ WriteBits(data, 8);
+}
+
+void CNoSlotClock::RingRegister::WriteNibble(int data)
+{
+ WriteBits(data, 4);
+}
+
+void CNoSlotClock::RingRegister::WriteBits(int data, int count)
+{
+ for (int i = 1; i <= count; i++)
+ {
+ WriteBit(data);
+ data >>= 1;
+ }
+}
+
+bool CNoSlotClock::RingRegister::WriteBit(int data)
+{
+ m_pRegister[m_Pointer] = data & 1;
+ return IncrementPointer();
+}
+
+bool CNoSlotClock::RingRegister::ReadBit(int& data)
+{
+ data = m_pRegister[m_Pointer];
+ return IncrementPointer();
+}
+
+bool CNoSlotClock::RingRegister::CompareBitNoIncrement(int data)
+{
+ return m_pRegister[m_Pointer] == data;
+}
+
+bool CNoSlotClock::RingRegister::IncrementPointer()
+{
+ if (++m_Pointer == m_PointerWrap)
+ {
+ m_Pointer = 0;
+ return true; // wrap
+ }
+ return false;
+}
diff --git a/source/NoSlotClock.h b/source/NoSlotClock.h
new file mode 100644
index 00000000..50a09e1c
--- /dev/null
+++ b/source/NoSlotClock.h
@@ -0,0 +1,73 @@
+/*
+AppleWin : An Apple //e emulator for Windows
+
+Copyright (C) 1994-1996, Michael O'Brien
+Copyright (C) 1999-2001, Oliver Schmidt
+Copyright (C) 2002-2005, Tom Charlesworth
+Copyright (C) 2006-2010, Tom Charlesworth, Michael Pohoreski, Nick Westgate
+
+AppleWin is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+AppleWin is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with AppleWin; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+*/
+
+/* Description: No Slot Clock (Dallas SmartWatch) emulation
+ *
+ * Author: Nick Westgate
+ */
+
+#pragma once
+
+class CNoSlotClock
+{
+ class RingRegister
+ {
+ public:
+ RingRegister(int bitCount);
+ RingRegister(BYTE* bytes, int byteCount);
+ ~RingRegister();
+
+ void Reset();
+ void WriteByte(int data);
+ void WriteNibble(int data);
+ void WriteBits(int data, int count);
+ bool WriteBit(int data);
+ bool ReadBit(int& data);
+ bool CompareBitNoIncrement(int data);
+ bool IncrementPointer();
+
+ private:
+ RingRegister() {};
+
+ int m_Pointer;
+ int m_PointerWrap;
+ int* m_pRegister;
+ };
+
+public:
+ CNoSlotClock();
+
+ void Reset();
+ bool ReadAccess(int address, int& data);
+ void WriteAccess(int address);
+ bool ClockRead(int& d0);
+ void ClockWrite(int address);
+
+private:
+ void PopulateClockRegister();
+
+ bool m_bClockRegisterEnabled;
+ bool m_bWriteEnabled;
+ RingRegister m_ClockRegister;
+ RingRegister m_ComparisonRegister;
+};