Commit Graph

26 Commits

Author SHA1 Message Date
tomcw
f03f5e0904 Fix for 6522 counter underflows falsely delaying when IRQ occurs. (Fixes #1176) 2023-02-05 11:02:56 +00:00
TomCh
577ffccf8f
VidHD: Support SHR for Apple II/II+ models (#997, PR #1013)
. Support aux writes for II/II+ (6502 emulation, not 65C02)
. Extend VidHD save-state for II/II+ aux memory
2021-12-19 14:17:51 +00:00
TomCh
9553106f4e
Debugger: Add IRQ support to LBR and new command to Break on Interrupt (#987, PR #990)
Extend LBR so that it includes the control-flow on a taken interrupt
Add a new command 'brkint <0|1>' to support Break on Interrupt

Internal: in core emulation loop, moved IRQ/NMI check to start of loop so that just the "interrupt vectoring" case can be single-stepped (instead of previously opcode + interrupt vector).

Debugger help chm: update Breakpoints section to include BRK, BRKOP and BRKINT
2021-10-16 16:57:00 +01:00
tomcw
4f8b30506d Debugger: Fix LBR so it's updated only if branch is taken (#987) 2021-10-16 11:58:09 +01:00
Andrea
d2a34e1f91
Remove VirtualAlloc, VirtualFree & ZeroMemory. (PR #884)
. Allocation in Memory.cpp: keep VirtualAlloc of size=64KiB (alignment=64KiB) to ease debugging.
2020-12-10 21:08:15 +00:00
Andrea
bbe88da787
AppleWin.cpp split (PR #875)
. Split AppleWin -> Core with the functionality really needed by the emulator.
. Split AppleWin -> Utilities for generic code not called by other emulator components.
. Split AppleWin -> CmdLine for the command line option parsing.
2020-11-26 21:50:06 +00:00
TomCh
6e166dfff6
Support NSC for Apple II/II+ via F8-ROM (#827 PR #873) 2020-11-25 21:57:34 +00:00
tomcw
bd1d65ce4f Renamed Applewin.h to AppleWin.h across entire project 2020-11-11 22:12:39 +00:00
TomCh
6125c2b12d
Support for synchronous events (PR #841)
Switched Mockingboard/6522 Timer interrupts & Mousecard's VBlank interrupt to use synchronous events.
This is a linked-list of ordered timer-based event, where only the head of the list needs updating after every opcode.
2020-10-11 16:08:05 +01:00
TomCh
ef913fe827
Removed 65d02 and used the regular 65c02/6502 headers instead (PR #825)
Removed 65d02.h and reconstructed this code using a combination of existing 6502.h/65c02.h and extra C Pre-Processor macros to include (or omit) the extra heatmap functionality.

We still end up with a normal 65c02 instance and also a debug 65c02 instance, but both will derive from the same 65c02.h file (+ same for the 6502 normal/debug instances).

Also:
. Added cpu_heatmap.inl for the built-in debugger's read/write operations.
. Support CpuRead/Write() from Z80 to hook the heatmap r/w.
2020-08-31 10:03:29 +01:00
tomcw
42d265a25c Fixed timing for 6502 opcodes: rol abs,x; lsr abs,x; ror abs,x. (Fixes #801) 2020-06-19 19:40:23 +01:00
tomcw
3a41061f83 Check interrupt sources after every opcode when in normal speed. (#651) 2019-06-01 16:54:58 +01:00
Andrea
6051bc55d0 Changes to ease code compilation in gcc. (#541)
Changes to ease code compilation in GCC.

Disk_t and HDD contain a std::string and for this reason they need a proper constructor, ZeroMemory is not guaranteed to work.
2018-02-24 15:12:40 +00:00
tomcw
52450aa7f7 These 2 combined fix #418:
1) Uthernet card now returns floating bus for slot ROM at $Cs00-CsFF (where s=3).
2) Fixed IoHandlerCardsIn() to not map in the card in slot3's slot ROM when SLOTC3ROM=0.

Also:
. moved the typedef 'iofunction' from common.h to memory.h
2017-05-13 22:07:53 +01:00
tomcw
3d6c10bad9 Debugger:
. Move the BRK and invalid opcodes checks out of main emulation's Fetch() and into DebugContinueStepping()
. Added a new break condition: when PC reads floating bus or I/O memory
. On a break condition, output a 'Stop Reason' message to the console
2017-03-07 21:35:38 +00:00
tomcw
0b6c5bbb91 Support for #384:
. Debug 'G(o)' cmd now defaults to normal speed (and precise video updates)
. New debug 'GG' cmd enables full speed (and periodic video updates)
. Single-stepping (normal or full speed) now routed through ContinueExecution()
. Removed Cpu6502()/Cpu65C02() check for debug breakpoints
. Removed the (undocumented) SHIFT+F7 feature to exit debugger for 'normal speed breakpoints'
. Removed the g_bDebugNormalSpeedBreakpoints variable
2017-02-25 22:32:46 +00:00
tomcw
58671545bb Fix #366 (IRQ erroreously deducting extra cycles) 2016-10-22 19:50:35 +01:00
tomcw
5fdc879a05 Merge from branch 'NTSC_PreMerge':
1.26.0.1
. NTSC video modes (TV Color, TV B&W, Monitor Color, Monitor B&W)
. Full Screen using native resolution (not 640x480)

NB. 6502 emulation is slower now, which means disk loading (ie. full-speed) is slower.
. EG. Aztec.dsk: from F2 boot to "Press any key". (Release build, 50% "TV Color", not run in VS, VAIO laptop)
  ~4 secs: AppleWin 1.25.0.3 (built with VS2005)
  ~7 secs: AppleWin 1.26.0.1 (built with VS2008 or VS015)
2016-09-04 21:14:26 +01:00
tomcw
4b1341c0fa Add test for #321 2016-05-31 22:45:18 +01:00
tomcw
04c9d09e38 When FullSpeed: don't do cycle-accurate graphics update
. means that disk accesses (eg. loading) is much quicker
Correct naming of video modes (in UI and code)
Pixel adjust for NTSC B&W and Color video modes to align with other video modes
2016-05-17 22:07:27 +01:00
tomcw
0cc6a4841f Add test/TestCPU6502 2016-03-21 22:41:29 +00:00
tomcw
37ad1ebd63 Removed redundant binary v2 save-state code
Also:
. support new CpuType independently of Apple2Type
. save-state: don't save disk track image if no disk
. save-state: re-init AppleWin internals & UI to reflect changed Apple2Type
2016-02-14 16:01:30 +00:00
tomcw
9f32050c60 Fix opcode timing issues reported in #292 2015-05-26 21:58:48 +01:00
tomcw
cbb837bf6b Add timing tests for all opcodes: 6502, 65C02, page-cross and non-page-cross (#278). Also fix opcode timing for 0xCE: DEC abs (#288). 2015-05-09 19:20:31 +01:00
tomcw
9c7b8f50c6 Extend unit tests for #264 and #271. Refactor: renamed some macros. 2015-05-04 11:57:24 +01:00
tomcw
54f2425168 Add unit test for #282 2015-05-03 21:44:24 +01:00