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Author SHA1 Message Date
michaelangel007
730c2d8fcc Update coding standard with style already in use 2023-03-23 08:47:38 -07:00
michaelangel007
1398e7495d Debugger: Post #1191 cleanup. Add BPCHANGE params 2023-03-23 08:08:18 -07:00
michaelangel007
a767763486 Debugger: QoL for bpchange when no args 2023-03-23 08:06:02 -07:00
michaelangel007
f97531c5c0 Cleanup function to match coding-standard 2023-03-23 08:05:29 -07:00
michaelangel007
a8e6941a68 Debugger: Post cleanup for #1191. Pre-requsite for bpchange. 2023-03-23 08:00:56 -07:00
michaelangel007
7d566ad0b3 Debugger: 2.9.1.16 2023-03-22 20:48:49 -07:00
michaelangel007
b7263bb1f7 Debugger: Fix BPL to have header and be colorized 2023-03-22 20:33:34 -07:00
michaelangel007
9bf2bcda4e Cleanup alignment in _BWZ_List 2023-03-20 08:29:51 -07:00
Andrea
5287bfb409
Breakpoints: some new features (#1191) 
* Debugger: add new flags to breakpoints.

Stop / no stop.
Hit count
Keep temp breakpoint alive so they can be inspected.

Signed-off-by: Andrea Odetti <mariofutire@gmail.com>

* Debugger: ensure temporary breakpoints are removed when the execution restarts.

This code:

_BWZ_Clear(pBP, iBreakpoint);

was actually a bug since the function needs the root points of all breakpoints, not to a particular one.

* Breakpoints: some extra tweaks.

Signed-off-by: Andrea Odetti <mariofutire@gmail.com>

* Remove reundant code and comment.

Signed-off-by: Andrea Odetti <mariofutire@gmail.com>

* Breakpoints: coding standards.

Signed-off-by: Andrea Odetti <mariofutire@gmail.com>

---------

Signed-off-by: Andrea Odetti <mariofutire@gmail.com>
 2023-03-20 06:25:25 -07:00
tomcw
387b66d213 Debugger: on DebugInitialize() reset counts for BPs, Watches & ZP pointers. 
. fixes an issue when BPs set, do a VM restart (eg. change h/w config), and it was STEPPING when no BPs were set!
 2023-03-12 16:52:05 +00:00
tomcw
5e06ddaa94 1.30.14.1: Update History.txt 2023-03-11 23:12:11 +00:00
tomcw
17a4746df6 6522: reset also clears DDRB, DDRA, PCR 2023-03-11 21:08:41 +00:00
tomcw
5a7076135e Debugger: mini-view for AYs: show AY PSG function: RD, WR, LA (or '--' if INACTIVE) 2023-03-11 13:56:44 +00:00
tomcw
bf4eed6600 Debugger: mini-view: fix for 'm1 AYsn' 2023-03-11 11:53:20 +00:00
tomcw
2f8ad98fc0 Debugger: mini-mem views: 
Add: 'm1 MBsn' and 'm2 MBsn' (eg. 'm1 MB4A').
Support 'm1 MBs' and 'm1 AYs' (eg. 'm1 MB4') which defaults to 6522-A.
Move the 2nd mini-mem view (ie. m2) down 1 line.
Remove legacy mini-mem devices: AY0-AY3 and SY0-SY3 (eg. 'm1 SY0').
. so eg. 'm1 AY0' now means show slot-0's AY1 & AY2.
 2023-03-11 10:51:23 +00:00
tomcw
80328b2bac Debugger: mini-mem: fix SYn to match AYn 2023-03-09 23:02:31 +00:00
tomcw
1416cc1676 Debugger: mini-mem views: support Phasor's AY1&AY2 pair in a single view. 
. use: AYsn, where s=0-7 (slot), n=A|B (6522)
 2023-03-09 22:53:09 +00:00
tomcw
055c299bb4 Debugger: use dedicated MB structs to populate mini-mem views. 
Remove old v1 save-state header files.
 2023-03-09 20:16:21 +00:00
tomcw
3f2f071fa6 MB: rename consts AY0/AY1 to AY1/AY2 (for consistency with mb-audit code) 2023-03-07 21:51:24 +00:00
tomcw
57c26c59b2 Update History.txt & some Phasor-related comments 2023-03-07 18:06:06 +00:00
tomcw
fb37310acd Phasor: support AY READ from both AYs (#1192) 2023-03-06 22:25:30 +00:00
tomcw
f55c1abc52 Help doc: add info about '-s5h1' and '-s5h2' 2023-03-05 22:52:05 +00:00
tomcw
46302015b6 Help doc: add info about '-s<N> hdc' 2023-03-05 22:41:59 +00:00
tomcw
df0f4356ec Fix so that MB can still read AY regs after setting INACTIVE state (#1193) 2023-03-05 21:09:08 +00:00
tomcw
7c5f0e7b9a 1.30.14.0: Update History.txt 2023-03-05 21:02:45 +00:00
tomcw
a3a89ad156 Phasor/MB: For AY INACTIVE state, bus floats high - so reflect this in 6522 PortA (fixes #1193) 2023-03-05 15:43:13 +00:00
tomcw
500f32071b Phasor/MB (#1192) 
. For MB: isChipSelected[0] = true. So do this on Reset() or for Phasor when switching to MB mode.
. Add "Notes on Phasor's AY-3-8913 chip-select & r/w"
. Refactor some common code into SY6522::UpdatePortAForHiZ()
 2023-03-05 15:37:52 +00:00
tomcw
7110e92f14 MB/Phasor save-state: persist 'Chip Select' & 'Reg Address Latch Valid' for MB card too 2023-03-04 23:25:53 +00:00
tomcw
4f8ee0d7d9 AppleWin help: add info about -multimon command line (#1190) 2023-03-04 23:08:49 +00:00
tomcw
d8e30e56be Phasor: support discrete LATCH & READ PSG functions (#1192) 
. Recode 'MB_SUBUNIT::state' as a 2-element array
 2023-03-04 22:41:07 +00:00
tomcw
3b53c882ab Phasor: improve odd Phasor logic for AY1 & AY2 chip select (#1192) 2023-03-04 19:38:11 +00:00
tomcw
34141b0c1d Phasor: 
. add 2nd nAYCurrentRegister (Reg. Address Latch) for 2nd AY8913.
. add support for the odd Phasor logic when doing discrete LATCH and WRITE PSG functions.
(keep in sync with mb-audit v1.3)
 2023-03-04 18:14:00 +00:00
tomcw
89eb0cb07b Mockingboard: After AY is reset, then latched addr isn't valid 
. Save-state: save all 8 bits of latched addr.
. Debugger: for mini-AY dump, show latched addr (current register shown in white)
 2023-03-01 21:01:59 +00:00
tomcw
db44b15c37 For Phasor (native/Echo+ modes) improve support for null AY chip-select case 2023-02-28 20:42:53 +00:00
tomcw
a57bb0cb6a Update help for -capslock=off 2023-02-27 22:54:29 +00:00
tomcw
453268a302 Add command line: -capslock=off (#1187) 2023-02-27 22:42:57 +00:00
tomcw
9cf3d00288 For Phasor (native/Echo+ modes) support the null AY chip-select case (for eg. mb-audit v0.9) 2023-02-26 21:52:46 +00:00
tomcw
31cb83419a AppleWin.chm: Sound: updated info about which slots the MB/Phasor/SAM cards can be plugged into 2023-02-26 21:06:42 +00:00
tomcw
d612972e6c Add command line support for hard disk controller (hdc) in slot-5 (#1033) 
. -s5 hdc
. -s5h1 <pathname>
NB. No GUI config support, so no way to plug/unplug HDDs.
 2023-02-26 20:42:21 +00:00
tomcw
0d0adc1f22 Phasor's Echo+: support dual-mono (R copied to L) 2023-02-25 21:25:46 +00:00
tomcw
abe606b2a6 Alt+Enter: fix regression, as this key combo should default to toggling full screen (#1188) 2023-02-25 10:58:53 +00:00
tomcw
bca99278b6 Simplify Phasor's Echo+ mode's chip-select (#1183) 2023-02-21 21:32:11 +00:00
tomcw
dc029a4700 Fix Phasor's Echo+ mode's dual chip-select (#1183) 2023-02-21 21:08:20 +00:00
ThorstenB
e3863d47de
Properly catch the use of multiple Z80 cards. (PR #1184) 2023-02-20 19:57:25 +00:00
tomcw
cc07dc7f7b Fix Phasor's Echo+ mode to use correct AYs (#1183) 2023-02-19 21:22:44 +00:00
tomcw
13ee80686c Phasor: support reading AY8913 regs for Echo+ mode 2023-02-19 18:28:37 +00:00
tomcw
bcdaa3e1c1 Phasor: support Echo+ mode (#1183) 2023-02-19 16:38:06 +00:00
Andrea
fd8ed23b56
2 small fixes: enum comparison and include. (PR #1182) 2023-02-19 09:46:07 +00:00
tomcw
1aa0e38696 Typo in comment 2023-02-17 17:20:56 +00:00
Andrea
fb11c74d62
Avoid a couple of warnings. (PR #1180) 2023-02-17 17:18:29 +00:00