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- Speed optimization: It is unlikely that one would poke I/O address space with indexed memory access, so those no need to check
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@ -139,15 +139,16 @@ static inline uint8_t memread( uint16_t addr ) {
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return RAM[ addr ];
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}
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/**
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Naive implementation of RAM read from address
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**/
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static inline uint8_t memread8( uint16_t addr ) {
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return RAM[ addr ];
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}
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/**
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Naive implementation of RAM read from address
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**/
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static inline uint16_t memread16( uint16_t addr ) {
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// if ( ( addr >= 0xC000 ) && ( addr < 0xD000 ) ) {
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// return mmioRead(addr);
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// }
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// dbgPrintf("%04X ", * (uint16_t*) (& RAM[ addr ]));
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return * (uint16_t*) (& RAM[ addr ]);
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}
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@ -237,7 +238,7 @@ static inline uint16_t addr_abs_X() {
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return fetch16() + m6502.X;
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}
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static inline uint8_t src_abs_X() {
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return memread( addr_abs_X() );
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return memread8( addr_abs_X() );
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}
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static inline uint8_t * dest_abs_X() {
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return & RAM[ addr_abs_X() ];
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@ -252,7 +253,7 @@ static inline uint16_t addr_abs_Y() {
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return abs_addr() + m6502.Y;
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}
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static inline uint8_t src_abs_Y() {
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return memread(addr_abs_Y());
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return memread8(addr_abs_Y());
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}
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static inline uint8_t * dest_abs_Y() {
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return & RAM[ addr_abs_Y() ];
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@ -293,7 +294,7 @@ static inline uint16_t addr_X_ind() {
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return addr_zp_ind( addr_zp() + m6502.X );
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}
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static inline uint8_t src_X_ind() {
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return memread( addr_X_ind() );
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return memread8( addr_X_ind() );
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}
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static inline uint8_t * dest_X_ind() {
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return & RAM[ addr_X_ind() ];
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@ -310,7 +311,7 @@ static inline uint16_t addr_ind_Y() {
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return addr_zp_ind( addr_zp() ) + m6502.Y;
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}
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static inline uint8_t src_ind_Y() {
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return memread( addr_ind_Y() );
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return memread8( addr_ind_Y() );
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}
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static inline uint8_t * dest_ind_Y() {
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return & RAM[ addr_ind_Y() ];
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