mirror of https://github.com/trudnai/Steve2.git
212 lines
4.9 KiB
C
212 lines
4.9 KiB
C
//
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// main.c
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// 6502
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//
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// Created by Tamas Rudnai on 7/14/19.
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// Copyright © 2019, 2020 Tamas Rudnai. All rights reserved.
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//
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// This file is part of Steve ][ -- The Apple ][ Emulator.
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//
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// Steve ][ is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// Steve ][ is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with Steve ][. If not, see <https://www.gnu.org/licenses/>.
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//
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#ifndef __6502_INSTR_BRANCH_H__
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#define __6502_INSTR_BRANCH_H__
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INLINE void BRA( int8_t reladdr ) {
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m6502.PC += reladdr;
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#ifdef CLK_ABSOLUTE_PRECISE
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uint8_t pg = m6502.PC >> 8;
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m6502.clktime += m6502.PC >> 8 == pg ? 1 : 2;
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#else
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// m6502.clktime++;
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#endif
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#ifdef DEBUG
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if ( reladdr == -2 ) {
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dbgPrintf2("Infinite Loop at %04X!\n", m6502.PC);
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}
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#endif
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dbgPrintf("BRA %04X ", m6502.PC);
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}
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/**
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BCC Branch on Carry Clear
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branch on C = 0 N Z C I D V
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- - - - - -
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addressing assembler opc bytes cyles
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--------------------------------------------
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relative BCC oper 90 2 2**
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**/
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INLINE void BCC( int8_t reladdr ) {
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dbgPrintf("BCC ");
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disPrintf(disassembly.inst, "BCC");
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if ( ! m6502.C ) {
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BRA( reladdr );
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}
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else {
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dbgPrintf("-no-");
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}
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}
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/**
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BCS Branch on Carry Set
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branch on C = 1 N Z C I D V
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- - - - - -
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addressing assembler opc bytes cyles
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--------------------------------------------
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relative BCS oper B0 2 2**
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**/
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INLINE void BCS( int8_t reladdr ) {
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dbgPrintf("BCS ");
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disPrintf(disassembly.inst, "BCS");
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if ( m6502.C ) {
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BRA( reladdr );
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}
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else {
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dbgPrintf("-no-");
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}
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}
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/**
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BNE Branch on Result not Zero
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branch on Z = 0 N Z C I D V
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- - - - - -
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addressing assembler opc bytes cyles
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--------------------------------------------
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relative BNE oper D0 2 2**
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**/
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INLINE void BNE( int8_t reladdr ) {
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dbgPrintf("BNE ");
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disPrintf(disassembly.inst, "BNE");
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if ( ! m6502.Z ) {
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BRA( reladdr );
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}
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else {
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dbgPrintf("-no-");
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}
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}
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/**
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BEQ Branch on Result Zero
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branch on Z = 1 N Z C I D V
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- - - - - -
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addressing assembler opc bytes cyles
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--------------------------------------------
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relative BEQ oper F0 2 2**
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**/
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INLINE void BEQ( int8_t reladdr ) {
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dbgPrintf("BEQ ");
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disPrintf(disassembly.inst, "BEQ");
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if ( m6502.Z ) {
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BRA( reladdr );
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}
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else {
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dbgPrintf("-no-");
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}
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}
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/**
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BPL Branch on Result Plus
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branch on N = 0 N Z C I D V
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- - - - - -
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addressing assembler opc bytes cyles
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--------------------------------------------
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relative BPL oper 10 2 2**
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**/
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INLINE void BPL( int8_t reladdr ) {
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dbgPrintf("BPL ");
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disPrintf(disassembly.inst, "BPL");
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if ( ! m6502.N ) {
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BRA( reladdr );
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}
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else {
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dbgPrintf("-no-");
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}
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}
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/**
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BMI Branch on Result Minus
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branch on N = 1 N Z C I D V
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- - - - - -
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addressing assembler opc bytes cyles
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--------------------------------------------
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relative BMI oper 30 2 2**
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**/
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INLINE void BMI( int8_t reladdr ) {
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dbgPrintf("BMI ");
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disPrintf(disassembly.inst, "BMI");
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if ( m6502.N ) {
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BRA( reladdr );
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}
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else {
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dbgPrintf("-no-");
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}
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}
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/**
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BVC Branch on Overflow Clear
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branch on V = 0 N Z C I D V
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- - - - - -
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addressing assembler opc bytes cyles
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--------------------------------------------
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relative BVC oper 50 2 2**
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**/
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INLINE void BVC( int8_t reladdr ) {
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dbgPrintf("BVC ");
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disPrintf(disassembly.inst, "BVC");
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if ( ! m6502.V ) {
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BRA( reladdr );
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}
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else {
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dbgPrintf("-no-");
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}
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}
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/**
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BVS Branch on Overflow Set
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branch on V = 1 N Z C I D V
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- - - - - -
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addressing assembler opc bytes cyles
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--------------------------------------------
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relative BVC oper 70 2 2**
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**/
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INLINE void BVS( int8_t reladdr ) {
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dbgPrintf("BVS ");
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disPrintf(disassembly.inst, "BVS");
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if ( m6502.V ) {
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BRA( reladdr );
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}
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else {
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dbgPrintf("-no-");
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}
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}
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#endif // __6502_INSTR_BRANCH_H__
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