mirror of
https://github.com/ogoguel/activegs-ios.git
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463 lines
9.6 KiB
C
463 lines
9.6 KiB
C
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/*
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ActiveGS, Copyright 2004-2016 Olivier Goguel, https://github.com/ogoguel/ActiveGS
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Based on Kegs, Copyright 2004 Kent Dickey, https://kegs.sourceforge.net
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This code is covered by the GNU GPL licence
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*/
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#ifdef ASM
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# ifdef INCLUDE_RCSID_S
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.data
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.export rcsdif_op_routs_h,data
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rcsdif_op_routs_h
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.stringz "@(#)$KmKId: op_routs.h,v 1.40 2004-01-10 15:49:46-05 kentd Exp $"
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.code
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# endif
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.import get_mem_b0_16,code
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.import get_mem_b0_8,code
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.export op_routs_start,data
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op_routs_start .word 0
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#endif /* ASM */
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#ifdef ASM
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# define CMP_INDEX_REG_MEAT8(index_reg) \
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extru ret0,31,8,ret0 ! \
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ldi 0xff,scratch3 ! \
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subi 0x100,ret0,ret0 ! \
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add index_reg,ret0,ret0 ! \
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extru ret0,23,1,scratch1 ! \
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and ret0,scratch3,zero ! \
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extru ret0,24,1,neg ! \
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b dispatch ! \
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dep scratch1,31,1,psr
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# define CMP_INDEX_REG_MEAT16(index_reg) \
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extru ret0,31,16,ret0 ! \
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ldil l%0x10000,scratch2 ! \
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zdepi -1,31,16,scratch3 ! \
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sub scratch2,ret0,ret0 ! \
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add index_reg,ret0,ret0 ! \
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extru ret0,15,1,scratch1 ! \
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and ret0,scratch3,zero ! \
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extru ret0,16,1,neg ! \
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b dispatch ! \
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dep scratch1,31,1,psr
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# define CMP_INDEX_REG_LOAD(new_label, index_reg) \
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bb,>=,n psr,27,new_label ! \
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bl get_mem_long_8,link ! \
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nop ! \
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CMP_INDEX_REG_MEAT8(index_reg) ! \
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.label new_label ! \
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bl get_mem_long_16,link ! \
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nop ! \
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CMP_INDEX_REG_MEAT16(index_reg)
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#endif
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#ifdef ASM
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#define GET_DLOC_X_IND_WR() \
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CYCLES_PLUS_1 ! \
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add xreg,direct,scratch2 ! \
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INC_KPC_2 ! \
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add scratch2,arg0,arg0 ! \
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bl get_mem_b0_direct_page_16,link ! \
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extru arg0,31,16,arg0 ! \
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copy ret0,arg0 ! \
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extru,= direct,31,8,0 ! \
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CYCLES_PLUS_1 ! \
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dep dbank,15,8,arg0
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#else /* C */
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# define GET_DLOC_X_IND_WR() \
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CYCLES_PLUS_1; \
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INC_KPC_2; \
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if(direct & 0xff) { \
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CYCLES_PLUS_1; \
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} \
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arg = arg + xreg + direct; \
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GET_MEMORY_DIRECT_PAGE16(arg & 0xffff, arg); \
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arg = (dbank << 16) + arg;
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#endif
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#ifdef ASM
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# define GET_DLOC_X_IND_ADDR() \
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ldb 1(scratch1),arg0 ! \
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GET_DLOC_X_IND_WR()
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#else /* C */
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# define GET_DLOC_X_IND_ADDR() \
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GET_1BYTE_ARG; \
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GET_DLOC_X_IND_WR()
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#endif
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#ifdef ASM
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# define GET_DISP8_S_WR() \
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CYCLES_PLUS_1 ! \
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add stack,arg0,arg0 ! \
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INC_KPC_2 ! \
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extru arg0,31,16,arg0
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#else /* C */
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#define GET_DISP8_S_WR() \
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CYCLES_PLUS_1; \
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arg = (arg + stack) & 0xffff; \
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INC_KPC_2;
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#endif
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#ifdef ASM
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# define GET_DISP8_S_ADDR() \
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ldb 1(scratch1),arg0 ! \
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GET_DISP8_S_WR()
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#else /* C */
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# define GET_DISP8_S_ADDR() \
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GET_1BYTE_ARG; \
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GET_DISP8_S_WR()
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#endif
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#ifdef ASM
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# define GET_DLOC_WR() \
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INC_KPC_2 ! \
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extru,= direct,31,8,0 ! \
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CYCLES_PLUS_1 ! \
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add direct,arg0,arg0 ! \
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extru arg0,31,16,arg0
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#else /* C */
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# define GET_DLOC_WR() \
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arg = (arg + direct) & 0xffff; \
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if(direct & 0xff) { \
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CYCLES_PLUS_1; \
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} \
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INC_KPC_2;
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#endif
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#ifdef ASM
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# define GET_DLOC_ADDR() \
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ldb 1(scratch1),arg0 ! \
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GET_DLOC_WR()
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#else /* C */
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# define GET_DLOC_ADDR() \
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GET_1BYTE_ARG; \
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GET_DLOC_WR()
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#endif
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#ifdef ASM
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# define GET_DLOC_L_IND_WR() \
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INC_KPC_2 ! \
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extru,= direct,31,8,0 ! \
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CYCLES_PLUS_1 ! \
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add direct,arg0,arg0 ! \
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bl get_mem_b0_24,link ! \
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extru arg0,31,16,arg0 ! \
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copy ret0,arg0
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#else /* C */
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# define GET_DLOC_L_IND_WR() \
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arg = (arg + direct) & 0xffff; \
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if(direct & 0xff) { \
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CYCLES_PLUS_1; \
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} \
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INC_KPC_2; \
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GET_MEMORY24(arg, arg, 1);
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#endif
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#ifdef ASM
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# define GET_DLOC_L_IND_ADDR() \
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ldb 1(scratch1),arg0 ! \
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GET_DLOC_L_IND_WR()
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#else /* C */
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# define GET_DLOC_L_IND_ADDR() \
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GET_1BYTE_ARG; \
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GET_DLOC_L_IND_WR()
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#endif
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#ifdef ASM
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# define GET_DLOC_IND_Y_ADDR_FOR_WR() \
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ldb 1(scratch1),arg0 ! \
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CYCLES_PLUS_1 ! \
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GET_DLOC_IND_Y_WR_SPECIAL()
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#else /* C */
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# define GET_DLOC_IND_Y_ADDR_FOR_WR() \
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GET_1BYTE_ARG; \
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if(direct & 0xff) { \
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CYCLES_PLUS_1; \
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} \
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GET_MEMORY_DIRECT_PAGE16((direct + arg) & 0xffff, tmp1); \
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tmp1 += (dbank << 16); \
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arg = tmp1 + yreg; \
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CYCLES_PLUS_1; \
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INC_KPC_2;
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#endif
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#ifdef ASM
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# define GET_DLOC_IND_WR() \
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extru,= direct,31,8,0 ! \
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CYCLES_PLUS_1 ! \
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INC_KPC_2 ! \
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add direct,arg0,arg0 ! \
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bl get_mem_b0_direct_page_16,link ! \
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extru arg0,31,16,arg0 ! \
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copy ret0,arg0 ! \
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dep dbank,15,16,arg0
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#else /* C */
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# define GET_DLOC_IND_WR() \
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INC_KPC_2; \
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if(direct & 0xff) { \
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CYCLES_PLUS_1; \
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} \
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GET_MEMORY_DIRECT_PAGE16((direct + arg) & 0xffff, arg); \
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arg = (dbank << 16) + arg;
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#endif
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#ifdef ASM
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# define GET_DLOC_IND_ADDR() \
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ldb 1(scratch1),arg0 ! \
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GET_DLOC_IND_WR()
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#else
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# define GET_DLOC_IND_ADDR() \
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GET_1BYTE_ARG; \
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GET_DLOC_IND_WR();
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#endif
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#ifdef ASM
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#define GET_DLOC_INDEX_WR(index_reg) \
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GET_DLOC_INDEX_WR_A(index_reg) ! GET_DLOC_INDEX_WR_B(index_reg)
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#define GET_DLOC_INDEX_WR_A(index_reg) \
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CYCLES_PLUS_1 ! \
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add index_reg,direct,scratch2 ! \
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extru direct,23,8,scratch1 ! \
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INC_KPC_2 ! \
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extru,= direct,31,8,0 ! \
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CYCLES_PLUS_1 ! \
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bb,>= psr,23,.+16 ! \
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/* 4*/ add scratch2,arg0,arg0 ! \
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/* 8*/ extru,<> direct,31,8,0 ! \
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/*12*/ dep scratch1,23,8,arg0
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/* GET_DLOC_INDeX_WR_B must be exactly one instruction! */
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#define GET_DLOC_INDEX_WR_B(index_reg) \
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/*16*/ extru arg0,31,16,arg0
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#define GET_DLOC_Y_WR() \
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GET_DLOC_INDEX_WR(yreg)
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#define GET_DLOC_X_WR() \
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GET_DLOC_INDEX_WR(xreg)
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#define GET_DLOC_Y_ADDR() \
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ldb 1(scratch1),arg0 ! \
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GET_DLOC_Y_WR()
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# define GET_DLOC_X_ADDR() \
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ldb 1(scratch1),arg0 ! \
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GET_DLOC_X_WR()
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#else
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# define GET_DLOC_INDEX_WR(index_reg) \
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CYCLES_PLUS_1; \
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arg = (arg & 0xff) + index_reg; \
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INC_KPC_2; \
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if(direct & 0xff) { \
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CYCLES_PLUS_1; \
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} \
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if((psr & 0x100) && ((direct & 0xff) == 0)) { \
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arg = (arg & 0xff); \
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} \
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arg = (arg + direct) & 0xffff;
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# define GET_DLOC_X_WR() \
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GET_DLOC_INDEX_WR(xreg)
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# define GET_DLOC_Y_WR() \
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GET_DLOC_INDEX_WR(yreg)
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# define GET_DLOC_X_ADDR() \
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GET_1BYTE_ARG; \
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GET_DLOC_INDEX_WR(xreg)
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# define GET_DLOC_Y_ADDR() \
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GET_1BYTE_ARG; \
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GET_DLOC_INDEX_WR(yreg)
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#endif
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#ifdef ASM
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# define GET_DISP8_S_IND_Y_WR() \
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add stack,arg0,arg0 ! \
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bl get_mem_b0_16,link ! \
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extru arg0,31,16,arg0 ! \
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dep dbank,15,16,ret0 ! \
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CYCLES_PLUS_2 ! \
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add ret0,yreg,arg0 ! \
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INC_KPC_2 ! \
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extru arg0,31,24,arg0
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# define GET_DISP8_S_IND_Y_ADDR() \
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ldb 1(scratch1),arg0 ! \
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GET_DISP8_S_IND_Y_WR()
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#else /* C */
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# define GET_DISP8_S_IND_Y_WR() \
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arg = (stack + arg) & 0xffff; \
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GET_MEMORY16(arg,arg,1); \
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CYCLES_PLUS_2; \
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arg += (dbank << 16); \
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INC_KPC_2; \
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arg = (arg + yreg) & 0xffffff;
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# define GET_DISP8_S_IND_Y_ADDR() \
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GET_1BYTE_ARG; \
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GET_DISP8_S_IND_Y_WR()
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#endif
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#ifdef ASM
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# define GET_DLOC_L_IND_Y_WR() \
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extru,= direct,31,8,0 ! \
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CYCLES_PLUS_1 ! \
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INC_KPC_2 ! \
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add direct,arg0,arg0 ! \
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bl get_mem_b0_24,link ! \
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extru arg0,31,16,arg0 ! \
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add ret0,yreg,arg0 ! \
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extru arg0,31,24,arg0
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# define GET_DLOC_L_IND_Y_ADDR() \
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ldb 1(scratch1),arg0 ! \
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GET_DLOC_L_IND_Y_WR()
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#else /* C */
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# define GET_DLOC_L_IND_Y_WR() \
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arg = (direct + arg) & 0xffff; \
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if(direct & 0xff) { \
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CYCLES_PLUS_1; \
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} \
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GET_MEMORY24(arg,arg,1); \
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INC_KPC_2; \
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arg = (arg + yreg) & 0xffffff;
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# define GET_DLOC_L_IND_Y_ADDR() \
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GET_1BYTE_ARG; \
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GET_DLOC_L_IND_Y_WR()
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#endif
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#ifdef ASM
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# define GET_ABS_ADDR() \
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ldb 1(scratch1),arg0 ! \
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ldb 2(scratch1),scratch1 ! \
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CYCLES_PLUS_1 ! \
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dep dbank,15,8,arg0 ! \
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INC_KPC_3 ! \
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dep scratch1,23,8,arg0
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# define GET_LONG_ADDR() \
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ldb 1(scratch1),arg0 ! \
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ldb 2(scratch1),scratch2 ! \
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CYCLES_PLUS_2 ! \
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ldb 3(scratch1),scratch1 ! \
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||
|
|
INC_KPC_4 ! \
|
||
|
|
dep scratch2,23,8,arg0 ! \
|
||
|
|
dep scratch1,15,8,arg0
|
||
|
|
#else /* C */
|
||
|
|
|
||
|
|
# define GET_ABS_ADDR() \
|
||
|
|
GET_2BYTE_ARG; \
|
||
|
|
CYCLES_PLUS_1; \
|
||
|
|
arg = arg + (dbank << 16); \
|
||
|
|
INC_KPC_3;
|
||
|
|
|
||
|
|
# define GET_LONG_ADDR() \
|
||
|
|
GET_3BYTE_ARG; \
|
||
|
|
CYCLES_PLUS_2; \
|
||
|
|
INC_KPC_4;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#ifdef ASM
|
||
|
|
#define GET_ABS_INDEX_ADDR_FOR_WR(index_reg) \
|
||
|
|
ldb 1(scratch1),arg0 ! \
|
||
|
|
copy index_reg,scratch3 ! \
|
||
|
|
ldb 2(scratch1),scratch2 ! \
|
||
|
|
dep dbank,15,8,scratch3 ! \
|
||
|
|
INC_KPC_3 ! \
|
||
|
|
dep scratch2,23,8,arg0 ! \
|
||
|
|
CYCLES_PLUS_2 ! \
|
||
|
|
add arg0,scratch3,arg0 ! \
|
||
|
|
extru arg0,31,24,arg0
|
||
|
|
|
||
|
|
#define GET_LONG_X_ADDR_FOR_WR() \
|
||
|
|
ldb 3(scratch1),scratch2 ! \
|
||
|
|
copy xreg,scratch3 ! \
|
||
|
|
ldb 1(scratch1),arg0 ! \
|
||
|
|
ldb 2(scratch1),scratch1 ! \
|
||
|
|
CYCLES_PLUS_2 ! \
|
||
|
|
dep scratch2,15,8,scratch3 ! \
|
||
|
|
INC_KPC_4 ! \
|
||
|
|
dep scratch1,23,8,arg0 ! \
|
||
|
|
add arg0,scratch3,arg0 ! \
|
||
|
|
extru arg0,31,24,arg0
|
||
|
|
#else /* C */
|
||
|
|
|
||
|
|
#define GET_ABS_INDEX_ADDR_FOR_WR(index_reg) \
|
||
|
|
GET_2BYTE_ARG; \
|
||
|
|
arg = arg + (dbank << 16); \
|
||
|
|
INC_KPC_3; \
|
||
|
|
CYCLES_PLUS_2; \
|
||
|
|
arg = (arg + index_reg) & 0xffffff;
|
||
|
|
|
||
|
|
#define GET_LONG_X_ADDR_FOR_WR() \
|
||
|
|
GET_3BYTE_ARG; \
|
||
|
|
INC_KPC_4; \
|
||
|
|
arg = (arg + xreg) & 0xffffff; \
|
||
|
|
CYCLES_PLUS_2;
|
||
|
|
|
||
|
|
#endif /* ASM */
|
||
|
|
|
||
|
|
|
||
|
|
#ifdef ASM
|
||
|
|
.export op_routs_end,data
|
||
|
|
op_routs_end .word 0
|
||
|
|
|
||
|
|
|
||
|
|
#define GET_DLOC_IND_Y_WR_SPECIAL() \
|
||
|
|
add direct,arg0,arg0 ! \
|
||
|
|
extru,= direct,31,8,0 ! \
|
||
|
|
CYCLES_PLUS_1 ! \
|
||
|
|
bl get_mem_b0_direct_page_16,link ! \
|
||
|
|
extru arg0,31,16,arg0 ! \
|
||
|
|
dep dbank,15,8,ret0 ! \
|
||
|
|
INC_KPC_2 ! \
|
||
|
|
add yreg,ret0,arg0 /* don't change this instr */
|
||
|
|
/* or add any after */
|
||
|
|
/* to preserve ret0 & arg0 */
|
||
|
|
|
||
|
|
|
||
|
|
/* cycle calc: if yreg is 16bit or carry into 2nd byte, inc cycle */
|
||
|
|
/* So, if y==16bit, add 1. If x==8bit, add 1 if carry */
|
||
|
|
get_dloc_ind_y_rd_8
|
||
|
|
stw link,STACK_SAVE_OP_LINK(sp)
|
||
|
|
GET_DLOC_IND_Y_WR_SPECIAL()
|
||
|
|
xor arg0,ret0,scratch1
|
||
|
|
extru,= psr,27,1,0
|
||
|
|
extru,= scratch1,23,8,0
|
||
|
|
CYCLES_PLUS_1
|
||
|
|
b get_mem_long_8
|
||
|
|
ldw STACK_SAVE_OP_LINK(sp),link
|
||
|
|
|
||
|
|
get_dloc_ind_y_rd_16
|
||
|
|
stw link,STACK_SAVE_OP_LINK(sp)
|
||
|
|
GET_DLOC_IND_Y_WR_SPECIAL()
|
||
|
|
xor arg0,ret0,scratch1
|
||
|
|
extru,= psr,27,1,0
|
||
|
|
extru,= scratch1,23,8,0
|
||
|
|
CYCLES_PLUS_1
|
||
|
|
b get_mem_long_16
|
||
|
|
ldw STACK_SAVE_OP_LINK(sp),link
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
#endif /* ASM */
|
||
|
|
|