Added a bunch of comments
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@ -11,6 +11,15 @@ import (
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"github.com/stretchr/testify/assert"
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)
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func assertMemoryConfiguration(t *testing.T, address uint16, upperRamReadOnly bool, upperReadMappedToROM bool, d000Bank int) {
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mmu.WriteMemory(address, 0x00)
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assert.Equal(t, upperReadMappedToROM, mmu.UpperReadMappedToROM)
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assert.Equal(t, d000Bank, mmu.D000Bank)
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}
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// TestBankSwitching tests the area starting at $d000 and managed by $c08x.
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// First the initial settings are checked. Then a bunch of assertions on the
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// internal code. Then writes to $c08x.
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func TestBankSwitching(t *testing.T) {
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cpu.InitInstructionDecoder()
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mmu.InitRAM()
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@ -79,17 +88,7 @@ func TestBankSwitching(t *testing.T) {
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assert.Equal(t, uint8(0x6f), mmu.ReadMemory(0xd000)) // read from ROM
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assert.Equal(t, uint8(0xc3), mmu.ReadMemory(0xffff)) // read from ROM
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testSwitches(t)
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}
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func assertMemoryConfiguration(t *testing.T, address uint16, upperRamReadOnly bool, upperReadMappedToROM bool, d000Bank int) {
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mmu.WriteMemory(address, 0x00)
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// assert.Equal(t, upperRamReadOnly, mmu.UpperRamReadOnly)
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assert.Equal(t, upperReadMappedToROM, mmu.UpperReadMappedToROM)
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assert.Equal(t, d000Bank, mmu.D000Bank)
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}
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func testSwitches(t *testing.T) {
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// Test writes to 0xc08x lead to correct memory configurations
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assertMemoryConfiguration(t, 0xc080, true, false, 2)
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assertMemoryConfiguration(t, 0xc081, false, true, 2)
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assertMemoryConfiguration(t, 0xc082, true, true, 2)
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28
bell_test.go
28
bell_test.go
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@ -5,32 +5,33 @@ import (
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"testing"
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"github.com/freewilll/apple2/cpu"
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"github.com/freewilll/apple2/keyboard"
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"github.com/freewilll/apple2/mmu"
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"github.com/freewilll/apple2/system"
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"github.com/freewilll/apple2/video"
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)
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func testBellCycles(delay int) {
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cpu.State.PC = 0x800
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mmu.WriteMemory(0x800, 0xa9) // LDA #$xx
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mmu.WriteMemory(0x801, uint8(delay))
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mmu.WriteMemory(0x802, 0x20) // JSR $fca8
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mmu.WriteMemory(0x803, 0xa8)
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mmu.WriteMemory(0x804, 0xfc)
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mmu.WriteMemory(0x805, 0x00) // Break address
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// Add some code to $800
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mmu.WriteMemory(0x800, 0xa9) // LDA #delay
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mmu.WriteMemory(0x801, uint8(delay)) //
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mmu.WriteMemory(0x802, 0x20) // JSR $fca8 BELL
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mmu.WriteMemory(0x803, 0xa8) //
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mmu.WriteMemory(0x804, 0xfc) //
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mmu.WriteMemory(0x805, 0x00) // BRK
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// Run the code until the BRK instruction and count the cycles
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system.FrameCycles = 0
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showInstructions := false
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breakAddress := uint16(0x805)
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exitAtBreak := false
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disableFirmwareWait := false
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cpu.State.PC = 0x800
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cpu.Run(showInstructions, &breakAddress, exitAtBreak, disableFirmwareWait, system.CpuFrequency*1000)
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// See http://apple2.org.za/gswv/a2zine/GS.WorldView/Resources/USEFUL.TABLES/WAIT.DELAY.CR.txt
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expectedCycles := (26 + 27*delay + 5*delay*delay) / 2
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gotCycles := int(system.FrameCycles - 2)
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gotCycles := int(system.FrameCycles - 2) // Exclude the cycles taken by the LDA
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fmt.Printf("Delay %3d ", delay)
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if gotCycles == expectedCycles {
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fmt.Println("OK")
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@ -40,14 +41,15 @@ func testBellCycles(delay int) {
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}
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}
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// TestBell tests the nunber of cycles in the system BELL loop for different
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// values of the accumulator. This test was mainly used to diagnose a bug
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// related to sound frequencies being incorrect due to invalid cycle
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// housekeeping in the CPU branch code.
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func TestBell(t *testing.T) {
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cpu.InitInstructionDecoder()
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mmu.InitRAM()
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mmu.InitApple2eROM()
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mmu.InitIO()
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cpu.Init()
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keyboard.Init()
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video.Init()
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system.Init()
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testBellCycles(1)
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@ -1,7 +1,11 @@
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package main
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// Command line tool to disassemble a range of addresses
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import (
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"flag"
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"fmt"
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"os"
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"github.com/freewilll/apple2/cpu"
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"github.com/freewilll/apple2/mmu"
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@ -9,6 +13,14 @@ import (
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)
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func main() {
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var Usage = func() {
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fmt.Fprintf(flag.CommandLine.Output(), "Usage of %s:\n\n", os.Args[0])
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fmt.Fprintf(flag.CommandLine.Output(), "Synopsis:\n %s -start ADDRESS [-end ADDRESS]\n\n", os.Args[0])
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fmt.Fprintf(flag.CommandLine.Output(), "Example:\n %s -start d000 -end ffff\n\n", os.Args[0])
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flag.PrintDefaults()
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}
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flag.Usage = Usage
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startString := flag.String("start", "", "Start address")
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endString := flag.String("end", "", "End address")
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flag.Parse()
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@ -16,14 +16,8 @@ import (
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const dosDiskImage = "dos33.dsk"
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func runDos33Boot(t *testing.T) {
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// Boot up DOS3.3
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utils.RunUntilBreakPoint(t, 0x0801, 2, false, "Boot0")
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utils.RunUntilBreakPoint(t, 0xb700, 1, false, "Boot1") // $3700 is for master disk, $b700 for a slave disk
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utils.RunUntilBreakPoint(t, 0x9d84, 3, false, "Boot2")
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utils.RunUntilBreakPoint(t, 0xd7d2, 2, false, "JMP to basic interpreter NEWSTT")
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}
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// TestDOS33Boot goes through the boot process and asserts that the code ends
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// up in the BASIC interpreter after DOS has loaded.
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func TestDOS33Boot(t *testing.T) {
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cpu.InitInstructionDecoder()
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mmu.InitRAM()
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@ -39,7 +33,11 @@ func TestDOS33Boot(t *testing.T) {
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t0 := time.Now()
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runDos33Boot(t)
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// Boot up DOS3.3
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utils.RunUntilBreakPoint(t, 0x0801, 2, false, "Boot0")
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utils.RunUntilBreakPoint(t, 0xb700, 1, false, "Boot1") // $3700 is for master disk, $b700 for a slave disk
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utils.RunUntilBreakPoint(t, 0x9d84, 3, false, "Boot2")
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utils.RunUntilBreakPoint(t, 0xd7d2, 2, false, "JMP to basic interpreter NEWSTT")
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elapsed := float64(time.Since(t0) / time.Millisecond)
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fmt.Printf("CPU Cycles: %d\n", system.FrameCycles)
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@ -11,6 +11,7 @@ import (
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"github.com/stretchr/testify/assert"
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)
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// TestIoBankSwitching tests the switching of the IO memory ROM at $c000-$c7ff
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func TestIoBankSwitching(t *testing.T) {
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cpu.InitInstructionDecoder()
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mmu.InitRAM()
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@ -16,7 +16,9 @@ import (
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const prodosDiskImage = "prodos19.dsk"
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func TestProdosBoot(t *testing.T) {
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// TestProdos19Boot goes through the boot process and asserts that the code ends
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// up in the BASIC interpreter after Prodos has loaded.
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func TestProdos19Boot(t *testing.T) {
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cpu.InitInstructionDecoder()
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mmu.InitRAM()
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mmu.InitApple2eROM()
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@ -40,7 +42,7 @@ func TestProdosBoot(t *testing.T) {
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utils.RunUntilBreakPoint(t, 0xd000, 1, false, "First call to MLI kernel")
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utils.RunUntilBreakPoint(t, 0x0800, 2, false, "BI loader")
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utils.RunUntilBreakPoint(t, 0x2000, 2, false, "BI Relocator")
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utils.RunUntilBreakPoint(t, 0xbe00, 52, false, "BI Start")
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utils.RunUntilBreakPoint(t, 0xbe00, 1, false, "BI Start")
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elapsed := float64(time.Since(t0) / time.Millisecond)
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fmt.Printf("CPU Cycles: %d\n", system.FrameCycles)
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@ -14,12 +14,16 @@ import (
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const rwtsDosDiskImage = "dos33.dsk"
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// Write a number of bytes to an address
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func writeBytes(address int, data []uint8) {
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for i := 0; i < len(data); i++ {
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mmu.WriteMemory(uint16(address)+uint16(i), data[i])
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}
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}
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// TestDos33RwtsWriteRead goes through the boot process and then calls RWTS
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// with a write and read request. Then the result of the read is cheked to make
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// sure it maches the write. This tests the disk image IO code.
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func TestDos33RwtsWriteRead(t *testing.T) {
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// Test writing and reading a sector using DOS 3.3's RWTS
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cpu.InitInstructionDecoder()
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@ -75,6 +79,7 @@ func TestDos33RwtsWriteRead(t *testing.T) {
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writeBytes(start+0x2e, []uint8{0x20, 0xd9, 0x03}) // JSR $03D9 RWTS
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writeBytes(start+0x31, []uint8{0x00}) // BRK
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// Run until the RWTS write returns
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cpu.State.PC = uint16(start)
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utils.RunUntilBreakPoint(t, 0xb944, 128, false, "RWTS RDADDR")
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utils.RunUntilBreakPoint(t, 0xb82a, 8, false, "RWTS WRITESEC")
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@ -92,6 +97,7 @@ func TestDos33RwtsWriteRead(t *testing.T) {
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writeBytes(start+0x1b, []uint8{0xa0, 0x09}) // LDY #$09
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writeBytes(start+0x1d, []uint8{0x91, 0x00}) // STA ($00),Y
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// Run until the RWTS read returns
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cpu.State.PC = uint16(start)
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utils.RunUntilBreakPoint(t, uint16(start+0x31), 1, false, "Read routine break")
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