mirror of
https://github.com/mauiaaron/apple2.git
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Use name-indirection for assembly acting on full-length registers
This commit is contained in:
Aaron Culliney
parent
efc63aeb7a
commit
71f71af834
@ -35,10 +35,30 @@
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# define _XSP %esp /* x86 stack pointer */
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# define _XSP %esp /* x86 stack pointer */
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# define _XAX %eax /* scratch */
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# define _XAX %eax /* scratch */
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# define _XBX %ebx /* scratch2 */
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# define _XBX %ebx /* scratch2 */
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// full-length Apple ][ registers
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# define XY_Reg_X %ebx /* 6502 X&Y flags */
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# define XY_Reg_X %ebx /* 6502 X&Y flags */
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# define AF_Reg_X %ecx /* 6502 F&A flags */
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# define AF_Reg_X %ecx /* 6502 F&A flags */
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# define SP_Reg_X %edx /* 6502 Stack pointer */
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# define SP_Reg_X %edx /* 6502 Stack pointer */
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# define PC_Reg_X %esi /* 6502 Program Counter */
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# define PC_Reg_X %esi /* 6502 Program Counter */
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# define EffectiveAddr_X %edi /* Effective address */
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# define EffectiveAddr_X %edi /* Effective address */
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// full-length assembly instructions
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# define addLQ addl
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# define andLQ andl
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# define decLQ decl
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# define orLQ orl
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# define movLQ movl
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# define movzbLQ movzbl
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# define movzwLQ movzwl
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# define popaLQ popal
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# define popLQ popl
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# define pushaLQ pushal
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# define pushfLQ pushfl
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# define pushLQ pushl
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# define rorLQ rorl
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# define shlLQ shll
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# define shrLQ shrl
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# define subLQ subl
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# define testLQ testl
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# define xorLQ xorl
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#endif
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#endif
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126
src/x86/cpu.S
126
src/x86/cpu.S
@ -29,12 +29,12 @@
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------------------------------------------------------------------------- */
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------------------------------------------------------------------------- */
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#define GetFromPC_B \
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#define GetFromPC_B \
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movl PC_Reg_X, EffectiveAddr_X; \
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movLQ PC_Reg_X, EffectiveAddr_X; \
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incw PC_Reg; \
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incw PC_Reg; \
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call *SN(cpu65_vmem)(,EffectiveAddr_X,SZ_PTR*2);
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call *SN(cpu65_vmem)(,EffectiveAddr_X,SZ_PTR*2);
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#define GetFromPC_W \
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#define GetFromPC_W \
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movl PC_Reg_X, EffectiveAddr_X; \
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movLQ PC_Reg_X, EffectiveAddr_X; \
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incw EffectiveAddr; \
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incw EffectiveAddr; \
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addw $2, PC_Reg; \
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addw $2, PC_Reg; \
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call *SN(cpu65_vmem)(,EffectiveAddr_X,SZ_PTR*2); \
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call *SN(cpu65_vmem)(,EffectiveAddr_X,SZ_PTR*2); \
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@ -66,11 +66,11 @@
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call *SN(cpu65_vmem)+4(,EffectiveAddr_X,SZ_PTR*2);
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call *SN(cpu65_vmem)+4(,EffectiveAddr_X,SZ_PTR*2);
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#define GetFromMem_B(x) \
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#define GetFromMem_B(x) \
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movl x, EffectiveAddr_X; \
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movLQ x, EffectiveAddr_X; \
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call *SN(cpu65_vmem)(,EffectiveAddr_X,SZ_PTR*2);
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call *SN(cpu65_vmem)(,EffectiveAddr_X,SZ_PTR*2);
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#define GetFromMem_W(x) \
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#define GetFromMem_W(x) \
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movl x, EffectiveAddr_X; \
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movLQ x, EffectiveAddr_X; \
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incw EffectiveAddr; \
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incw EffectiveAddr; \
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call *SN(cpu65_vmem)(,EffectiveAddr_X,SZ_PTR*2); \
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call *SN(cpu65_vmem)(,EffectiveAddr_X,SZ_PTR*2); \
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decw EffectiveAddr; \
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decw EffectiveAddr; \
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@ -82,7 +82,7 @@
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#define BranchXCycles \
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#define BranchXCycles \
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incb DebugCycleCount; /* +1 branch taken */ \
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incb DebugCycleCount; /* +1 branch taken */ \
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shll $16, _XBX; \
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shlLQ $16, _XBX; \
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movw PC_Reg, %bx; \
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movw PC_Reg, %bx; \
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cbw; \
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cbw; \
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addw %bx, %ax; \
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addw %bx, %ax; \
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@ -90,7 +90,7 @@
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cmpb %ah, %bh; \
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cmpb %ah, %bh; \
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je 9f; \
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je 9f; \
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incb DebugCycleCount; /* +1 branch new page */ \
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incb DebugCycleCount; /* +1 branch new page */ \
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9: shrl $16, _XBX;
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9: shrLQ $16, _XBX;
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#define FlagC lahf; \
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#define FlagC lahf; \
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andb $C_Flag, %ah; \
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andb $C_Flag, %ah; \
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@ -125,9 +125,9 @@
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* This doesn't affect the cycle count.
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* This doesn't affect the cycle count.
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*/
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*/
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#define FlagNVZC \
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#define FlagNVZC \
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pushfl; \
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pushfLQ; \
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popl _XAX; \
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popLQ _XAX; \
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andl $0x08C1,_XAX; \
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andLQ $0x08C1,_XAX; \
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andb $~(N_Flag|V_Flag|Z_Flag|C_Flag), F_Reg; \
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andb $~(N_Flag|V_Flag|Z_Flag|C_Flag), F_Reg; \
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orb %ah, F_Reg; \
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orb %ah, F_Reg; \
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orb %al, F_Reg;
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orb %al, F_Reg;
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@ -140,19 +140,19 @@
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/* Immediate Addressing - the operand is contained in the second byte of the
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/* Immediate Addressing - the operand is contained in the second byte of the
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instruction. */
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instruction. */
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#define GetImm movl PC_Reg_X, EffectiveAddr_X; \
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#define GetImm movLQ PC_Reg_X, EffectiveAddr_X; \
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incw PC_Reg;
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incw PC_Reg;
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/* Absolute Addressing - the second byte of the instruction is the low
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/* Absolute Addressing - the second byte of the instruction is the low
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order address, and the third byte is the high order byte. */
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order address, and the third byte is the high order byte. */
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#define GetAbs GetFromPC_W; \
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#define GetAbs GetFromPC_W; \
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movl _XAX, EffectiveAddr_X;
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movLQ _XAX, EffectiveAddr_X;
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/* Zero Page Addressing - the second byte of the instruction is an
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/* Zero Page Addressing - the second byte of the instruction is an
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address on the zero page */
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address on the zero page */
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#define GetZPage \
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#define GetZPage \
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GetFromPC_B; \
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GetFromPC_B; \
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movl _XAX, EffectiveAddr_X;
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movLQ _XAX, EffectiveAddr_X;
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/* Zero Page Indexed Addressing - The effective address is calculated by
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/* Zero Page Indexed Addressing - The effective address is calculated by
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adding the second byte to the contents of the index register. Due
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adding the second byte to the contents of the index register. Due
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@ -162,13 +162,13 @@
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#define GetZPage_X \
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#define GetZPage_X \
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GetFromPC_B; \
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GetFromPC_B; \
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addb X_Reg, %al; \
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addb X_Reg, %al; \
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movl _XAX, EffectiveAddr_X;
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movLQ _XAX, EffectiveAddr_X;
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// HACK IS THIS EVER USED?
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// HACK IS THIS EVER USED?
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#define GetZPage_Y \
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#define GetZPage_Y \
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GetFromPC_B; \
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GetFromPC_B; \
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addb Y_Reg, %al; \
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addb Y_Reg, %al; \
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movl _XAX, EffectiveAddr_X;
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movLQ _XAX, EffectiveAddr_X;
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/* Absolute Indexed Addressing - The effective address is formed by
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/* Absolute Indexed Addressing - The effective address is formed by
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adding the contents of X or Y to the address contained in the
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adding the contents of X or Y to the address contained in the
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@ -182,11 +182,11 @@
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#define GetAbs_X \
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#define GetAbs_X \
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_GetAbs_X \
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_GetAbs_X \
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incb DebugCycleCount; /* +1 cycle on page boundary */ \
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incb DebugCycleCount; /* +1 cycle on page boundary */ \
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9: movl _XAX, EffectiveAddr_X;
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9: movLQ _XAX, EffectiveAddr_X;
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#define GetAbs_X_STx \
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#define GetAbs_X_STx \
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_GetAbs_X \
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_GetAbs_X \
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9: movl _XAX, EffectiveAddr_X;
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9: movLQ _XAX, EffectiveAddr_X;
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#define _GetAbs_Y \
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#define _GetAbs_Y \
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GetFromPC_W; \
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GetFromPC_W; \
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@ -197,11 +197,11 @@
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#define GetAbs_Y \
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#define GetAbs_Y \
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_GetAbs_Y \
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_GetAbs_Y \
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incb DebugCycleCount; /* +1 cycle on page boundary */ \
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incb DebugCycleCount; /* +1 cycle on page boundary */ \
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9: movl _XAX, EffectiveAddr_X;
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9: movLQ _XAX, EffectiveAddr_X;
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#define GetAbs_Y_STA \
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#define GetAbs_Y_STA \
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_GetAbs_Y \
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_GetAbs_Y \
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9: movl _XAX, EffectiveAddr_X;
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9: movLQ _XAX, EffectiveAddr_X;
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/* Absolute Indirect Addressing - The second and third bytes of the
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/* Absolute Indirect Addressing - The second and third bytes of the
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instruction are the low and high bytes of an address, respectively.
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instruction are the low and high bytes of an address, respectively.
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@ -221,13 +221,13 @@
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#define GetIndZPage \
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#define GetIndZPage \
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GetFromPC_B; \
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GetFromPC_B; \
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incb %al; \
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incb %al; \
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movl _XAX, EffectiveAddr_X; \
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movLQ _XAX, EffectiveAddr_X; \
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GetFromEA_B; \
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GetFromEA_B; \
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movb %al, %ah; \
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movb %al, %ah; \
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decl EffectiveAddr_X; \
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decLQ EffectiveAddr_X; \
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andl $0xFF, EffectiveAddr_X; \
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andLQ $0xFF, EffectiveAddr_X; \
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GetFromEA_B; \
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GetFromEA_B; \
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movl _XAX, EffectiveAddr_X;
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movLQ _XAX, EffectiveAddr_X;
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/* Zero Page Indexed Indirect Addressing - The second byte is added to
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/* Zero Page Indexed Indirect Addressing - The second byte is added to
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the contents of the X index register; the carry is discarded. The
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the contents of the X index register; the carry is discarded. The
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@ -240,13 +240,13 @@
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GetFromPC_B; \
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GetFromPC_B; \
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addb X_Reg, %al; \
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addb X_Reg, %al; \
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incb %al; \
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incb %al; \
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movl _XAX, EffectiveAddr_X; \
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movLQ _XAX, EffectiveAddr_X; \
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GetFromEA_B; \
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GetFromEA_B; \
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movb %al, %ah; \
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movb %al, %ah; \
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decl EffectiveAddr_X; \
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decLQ EffectiveAddr_X; \
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andl $0xFF, EffectiveAddr_X; \
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andLQ $0xFF, EffectiveAddr_X; \
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GetFromEA_B; \
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GetFromEA_B; \
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movl _XAX, EffectiveAddr_X;
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movLQ _XAX, EffectiveAddr_X;
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/* Indirect Indexed Addressing - The second byte of the instruction
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/* Indirect Indexed Addressing - The second byte of the instruction
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points to a memory location in page zero. The contents of this
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points to a memory location in page zero. The contents of this
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@ -258,11 +258,11 @@
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#define _GetIndZPage_Y \
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#define _GetIndZPage_Y \
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GetFromPC_B; \
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GetFromPC_B; \
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incb %al; \
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incb %al; \
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movl _XAX, EffectiveAddr_X; \
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movLQ _XAX, EffectiveAddr_X; \
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GetFromEA_B; \
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GetFromEA_B; \
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movb %al, %ah; \
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movb %al, %ah; \
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decl EffectiveAddr_X; \
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decLQ EffectiveAddr_X; \
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andl $0xFF, EffectiveAddr_X; \
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andLQ $0xFF, EffectiveAddr_X; \
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GetFromEA_B; \
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GetFromEA_B; \
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addb Y_Reg, %al; \
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addb Y_Reg, %al; \
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jnc 9f;
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jnc 9f;
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@ -271,12 +271,12 @@
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_GetIndZPage_Y \
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_GetIndZPage_Y \
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adcb $0, %ah; \
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adcb $0, %ah; \
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incb DebugCycleCount; /* +1 cycle on page boundary */ \
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incb DebugCycleCount; /* +1 cycle on page boundary */ \
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9: movl _XAX, EffectiveAddr_X;
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9: movLQ _XAX, EffectiveAddr_X;
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#define GetIndZPage_Y_STA \
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#define GetIndZPage_Y_STA \
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_GetIndZPage_Y \
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_GetIndZPage_Y \
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adcb $0, %ah; \
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adcb $0, %ah; \
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9: movl _XAX, EffectiveAddr_X;
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9: movLQ _XAX, EffectiveAddr_X;
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#define DoADC_b GetFromEA_B \
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#define DoADC_b GetFromEA_B \
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bt $C_Flag_Bit, AF_Reg_X; \
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bt $C_Flag_Bit, AF_Reg_X; \
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@ -399,7 +399,7 @@
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#define DoROR GetFromEA_B \
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#define DoROR GetFromEA_B \
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movb F_Reg, %ah; \
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movb F_Reg, %ah; \
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rorl $1, _XAX; \
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rorLQ $1, _XAX; \
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orb %al, %al; \
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orb %al, %al; \
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btr $31, _XAX; \
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btr $31, _XAX; \
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FlagNZC \
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FlagNZC \
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@ -818,7 +818,7 @@ E(op_BRK)
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Push(%ah)
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Push(%ah)
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Push(%al)
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Push(%al)
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orb $(B_Flag|X_Flag), F_Reg
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orb $(B_Flag|X_Flag), F_Reg
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movzbl F_Reg, _XAX
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movzbLQ F_Reg, _XAX
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movb SN(cpu65_flags_encode)(,_XAX,1), %al
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movb SN(cpu65_flags_encode)(,_XAX,1), %al
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Push(%al)
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Push(%al)
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orb $I_Flag, F_Reg
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orb $I_Flag, F_Reg
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@ -1175,7 +1175,7 @@ jmp_special: // see JMP indirect note in _Understanding the Apple IIe_ 4-25
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E(op_JMP_abs_ind_x)
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E(op_JMP_abs_ind_x)
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GetFromPC_W
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GetFromPC_W
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movw %ax, EffectiveAddr
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movw %ax, EffectiveAddr
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movzbl X_Reg, _XAX
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movzbLQ X_Reg, _XAX
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addw %ax, EffectiveAddr
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addw %ax, EffectiveAddr
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GetFromMem_W(EffectiveAddr_X)
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GetFromMem_W(EffectiveAddr_X)
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movw %ax, PC_Reg
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movw %ax, PC_Reg
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@ -1961,16 +1961,16 @@ E(op_WAI_65c02)
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------------------------------------------------------------------------- */
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------------------------------------------------------------------------- */
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continue:
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continue:
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movzbl DebugCurrOpcode, _XAX
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movzbLQ DebugCurrOpcode, _XAX
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movb SN(cpu65__opcycles)(,_XAX,1), %al
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movb SN(cpu65__opcycles)(,_XAX,1), %al
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addb DebugCycleCount, %al
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addb DebugCycleCount, %al
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movb %al, DebugCycleCount
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movb %al, DebugCycleCount
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addw %ax, SN(cpu65_cycle_count)
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addw %ax, SN(cpu65_cycle_count)
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subl _XAX, SN(gc_cycles_timer_0)
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subLQ _XAX, SN(gc_cycles_timer_0)
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subl _XAX, SN(gc_cycles_timer_1)
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subLQ _XAX, SN(gc_cycles_timer_1)
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subw %ax, SN(cpu65_cycles_to_execute)
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subw %ax, SN(cpu65_cycles_to_execute)
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jle exit_cpu65_run
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jle exit_cpu65_run
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continue1: xorl _XAX, _XAX
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continue1: xorLQ _XAX, _XAX
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orb SN(cpu65__signal), %al
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orb SN(cpu65__signal), %al
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jnz exception
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jnz exception
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1: JumpNextInstruction
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1: JumpNextInstruction
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@ -2001,12 +2001,12 @@ ex_irq: testb $I_Flag, F_Reg // Already interrupt
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Push(%ah)
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Push(%ah)
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Push(%al)
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Push(%al)
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orb $X_Flag, F_Reg
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orb $X_Flag, F_Reg
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movzbl F_Reg, _XAX
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movzbLQ F_Reg, _XAX
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movb SN(cpu65_flags_encode)(,_XAX,1), %al
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movb SN(cpu65_flags_encode)(,_XAX,1), %al
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Push(%al)
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Push(%al)
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orb $(B_Flag | I_Flag), F_Reg
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orb $(B_Flag | I_Flag), F_Reg
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//andb $~D_Flag, F_Reg // AppleWin clears Decimal bit?
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//andb $~D_Flag, F_Reg // AppleWin clears Decimal bit?
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movl $0xFFFE, EffectiveAddr_X// HACK FIXME : there is a bug somewhere that is occasionally corrupting EffectiveAddr_X
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movLQ $0xFFFE, EffectiveAddr_X// HACK FIXME : there is a bug somewhere that is occasionally corrupting EffectiveAddr_X
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GetFromEA_W
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GetFromEA_W
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movw %ax, PC_Reg
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movw %ax, PC_Reg
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xorb %ah, %ah
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xorb %ah, %ah
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@ -2016,36 +2016,36 @@ ex_irq: testb $I_Flag, F_Reg // Already interrupt
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CPU thread main entry and exit points
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CPU thread main entry and exit points
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------------------------------------------------------------------------- */
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------------------------------------------------------------------------- */
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E(cpu65_run)
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E(cpu65_run)
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pushal // ENTER CPURUN
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pushaLQ // ENTER CPURUN
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cmpb $0, SN(emul_reinitialize)
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cmpb $0, SN(emul_reinitialize)
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jnz 1f
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jnz 1f
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// Restore CPU state when being called from C.
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// Restore CPU state when being called from C.
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movl $0x0100, SP_Reg_X
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movLQ $0x0100, SP_Reg_X
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movzwl DebugCurrEA, EffectiveAddr_X
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movzwLQ DebugCurrEA, EffectiveAddr_X
|
||||||
movzwl SN(cpu65_current), PC_Reg_X
|
movzwLQ SN(cpu65_current), PC_Reg_X
|
||||||
movzbl SN(cpu65_current)+2, AF_Reg_X
|
movzbLQ SN(cpu65_current)+2, AF_Reg_X
|
||||||
movzbl SN(cpu65_current)+3, _XAX
|
movzbLQ SN(cpu65_current)+3, _XAX
|
||||||
movb SN(cpu65_flags_decode)(,_XAX,1), F_Reg
|
movb SN(cpu65_flags_decode)(,_XAX,1), F_Reg
|
||||||
movzbl SN(cpu65_current)+4, XY_Reg_X
|
movzbLQ SN(cpu65_current)+4, XY_Reg_X
|
||||||
movb SN(cpu65_current)+5, Y_Reg
|
movb SN(cpu65_current)+5, Y_Reg
|
||||||
movb SN(cpu65_current)+6, SP_Reg_L
|
movb SN(cpu65_current)+6, SP_Reg_L
|
||||||
#ifdef __APPLE2_VM__
|
#ifdef __APPLE2_VM__
|
||||||
// Apple //e machine specific set stack point to ALTZP (or not)
|
// Apple //e machine specific set stack point to ALTZP (or not)
|
||||||
movl SN(base_stackzp), _XAX
|
movLQ SN(base_stackzp), _XAX
|
||||||
subl $SN(apple_ii_64k), _XAX
|
subLQ $SN(apple_ii_64k), _XAX
|
||||||
orl _XAX, SP_Reg_X
|
orLQ _XAX, SP_Reg_X
|
||||||
#endif
|
#endif
|
||||||
jmp continue1
|
jmp continue1
|
||||||
|
|
||||||
1: movb $0, SN(emul_reinitialize)
|
1: movb $0, SN(emul_reinitialize)
|
||||||
// Zero all used registers
|
// Zero all used registers
|
||||||
xorl _XAX, _XAX
|
xorLQ _XAX, _XAX
|
||||||
xorl XY_Reg_X, XY_Reg_X
|
xorLQ XY_Reg_X, XY_Reg_X
|
||||||
xorl AF_Reg_X, AF_Reg_X
|
xorLQ AF_Reg_X, AF_Reg_X
|
||||||
xorl PC_Reg_X, PC_Reg_X
|
xorLQ PC_Reg_X, PC_Reg_X
|
||||||
xorl EffectiveAddr_X, EffectiveAddr_X
|
xorLQ EffectiveAddr_X, EffectiveAddr_X
|
||||||
movl $0x1FF, SP_Reg_X
|
movLQ $0x1FF, SP_Reg_X
|
||||||
jmp ex_reset
|
jmp ex_reset
|
||||||
|
|
||||||
exit_cpu65_run:
|
exit_cpu65_run:
|
||||||
@ -2053,18 +2053,18 @@ exit_cpu65_run:
|
|||||||
movw EffectiveAddr, DebugCurrEA
|
movw EffectiveAddr, DebugCurrEA
|
||||||
movw PC_Reg, SN(cpu65_current)
|
movw PC_Reg, SN(cpu65_current)
|
||||||
movb A_Reg, SN(cpu65_current)+2
|
movb A_Reg, SN(cpu65_current)+2
|
||||||
movzbl F_Reg, _XAX
|
movzbLQ F_Reg, _XAX
|
||||||
movb SN(cpu65_flags_encode)(,_XAX,1), %al
|
movb SN(cpu65_flags_encode)(,_XAX,1), %al
|
||||||
movb %al, SN(cpu65_current)+3
|
movb %al, SN(cpu65_current)+3
|
||||||
movb X_Reg, SN(cpu65_current)+4
|
movb X_Reg, SN(cpu65_current)+4
|
||||||
movb Y_Reg, SN(cpu65_current)+5
|
movb Y_Reg, SN(cpu65_current)+5
|
||||||
movb SP_Reg_L, SN(cpu65_current)+6
|
movb SP_Reg_L, SN(cpu65_current)+6
|
||||||
popal
|
popaLQ
|
||||||
ret
|
ret
|
||||||
|
|
||||||
emul_reinit: movb $0, SN(cpu65__signal)
|
emul_reinit: movb $0, SN(cpu65__signal)
|
||||||
movb $1, SN(emul_reinitialize)
|
movb $1, SN(emul_reinitialize)
|
||||||
popal
|
popaLQ
|
||||||
ret
|
ret
|
||||||
|
|
||||||
/* -------------------------------------------------------------------------
|
/* -------------------------------------------------------------------------
|
||||||
@ -2072,10 +2072,10 @@ emul_reinit: movb $0, SN(cpu65__signal)
|
|||||||
------------------------------------------------------------------------- */
|
------------------------------------------------------------------------- */
|
||||||
|
|
||||||
E(cpu65_direct_write)
|
E(cpu65_direct_write)
|
||||||
pushl EffectiveAddr_X
|
pushLQ EffectiveAddr_X
|
||||||
movl 8(_XSP),EffectiveAddr_X
|
movLQ 8(_XSP),EffectiveAddr_X
|
||||||
movl 12(_XSP),_XAX
|
movLQ 12(_XSP),_XAX
|
||||||
call *SN(cpu65_vmem)+4(,EffectiveAddr_X,SZ_PTR*2)
|
call *SN(cpu65_vmem)+4(,EffectiveAddr_X,SZ_PTR*2)
|
||||||
popl EffectiveAddr_X
|
popLQ EffectiveAddr_X
|
||||||
ret
|
ret
|
||||||
|
|
||||||
|
|||||||
@ -28,29 +28,29 @@ E(func) movb %al,SN(address)(EffectiveAddr_X); \
|
|||||||
ret;
|
ret;
|
||||||
|
|
||||||
#define GLUE_BANK_MAYBEREAD(func,pointer) \
|
#define GLUE_BANK_MAYBEREAD(func,pointer) \
|
||||||
E(func) testl $SS_CXROM, SN(softswitches); \
|
E(func) testLQ $SS_CXROM, SN(softswitches); \
|
||||||
jnz 1f; \
|
jnz 1f; \
|
||||||
call *SN(pointer); \
|
call *SN(pointer); \
|
||||||
ret; \
|
ret; \
|
||||||
1: addl SN(pointer),EffectiveAddr_X; \
|
1: addLQ SN(pointer),EffectiveAddr_X; \
|
||||||
movb (EffectiveAddr_X),%al; \
|
movb (EffectiveAddr_X),%al; \
|
||||||
subl SN(pointer),EffectiveAddr_X; \
|
subLQ SN(pointer),EffectiveAddr_X; \
|
||||||
ret;
|
ret;
|
||||||
|
|
||||||
#define GLUE_BANK_READ(func,pointer) \
|
#define GLUE_BANK_READ(func,pointer) \
|
||||||
E(func) addl SN(pointer),EffectiveAddr_X; \
|
E(func) addLQ SN(pointer),EffectiveAddr_X; \
|
||||||
movb (EffectiveAddr_X),%al; \
|
movb (EffectiveAddr_X),%al; \
|
||||||
subl SN(pointer),EffectiveAddr_X; \
|
subLQ SN(pointer),EffectiveAddr_X; \
|
||||||
ret;
|
ret;
|
||||||
|
|
||||||
#define GLUE_BANK_WRITE(func,pointer) \
|
#define GLUE_BANK_WRITE(func,pointer) \
|
||||||
E(func) addl SN(pointer),EffectiveAddr_X; \
|
E(func) addLQ SN(pointer),EffectiveAddr_X; \
|
||||||
movb %al,(EffectiveAddr_X); \
|
movb %al,(EffectiveAddr_X); \
|
||||||
subl SN(pointer),EffectiveAddr_X; \
|
subLQ SN(pointer),EffectiveAddr_X; \
|
||||||
ret;
|
ret;
|
||||||
|
|
||||||
#define GLUE_BANK_MAYBEWRITE(func,pointer) \
|
#define GLUE_BANK_MAYBEWRITE(func,pointer) \
|
||||||
E(func) addl SN(pointer),EffectiveAddr_X; \
|
E(func) addLQ SN(pointer),EffectiveAddr_X; \
|
||||||
cmpl $0,SN(pointer); \
|
cmpl $0,SN(pointer); \
|
||||||
jz 1f; \
|
jz 1f; \
|
||||||
movb %al,(EffectiveAddr_X); \
|
movb %al,(EffectiveAddr_X); \
|
||||||
@ -59,41 +59,41 @@ E(func) addl SN(pointer),EffectiveAddr_X; \
|
|||||||
|
|
||||||
// TODO FIXME : implement CDECL prologue/epilogues...
|
// TODO FIXME : implement CDECL prologue/epilogues...
|
||||||
#define GLUE_C_WRITE(func) \
|
#define GLUE_C_WRITE(func) \
|
||||||
E(func) pushl _XAX; \
|
E(func) pushLQ _XAX; \
|
||||||
pushl XY_Reg_X; \
|
pushLQ XY_Reg_X; \
|
||||||
pushl AF_Reg_X; \
|
pushLQ AF_Reg_X; \
|
||||||
pushl SP_Reg_X; \
|
pushLQ SP_Reg_X; \
|
||||||
pushl PC_Reg_X; \
|
pushLQ PC_Reg_X; \
|
||||||
andl $0xff,_XAX; \
|
andLQ $0xff,_XAX; \
|
||||||
pushl _XAX; \
|
pushLQ _XAX; \
|
||||||
pushl EffectiveAddr_X; \
|
pushLQ EffectiveAddr_X; \
|
||||||
call SN(c_##func); \
|
call SN(c_##func); \
|
||||||
popl EffectiveAddr_X; /* dummy */ \
|
popLQ EffectiveAddr_X; /* dummy */ \
|
||||||
popl _XAX; /* dummy */ \
|
popLQ _XAX; /* dummy */ \
|
||||||
popl PC_Reg_X; \
|
popLQ PC_Reg_X; \
|
||||||
popl SP_Reg_X; \
|
popLQ SP_Reg_X; \
|
||||||
popl AF_Reg_X; \
|
popLQ AF_Reg_X; \
|
||||||
popl XY_Reg_X; \
|
popLQ XY_Reg_X; \
|
||||||
popl _XAX; \
|
popLQ _XAX; \
|
||||||
ret;
|
ret;
|
||||||
|
|
||||||
// TODO FIXME : implement CDECL prologue/epilogues...
|
// TODO FIXME : implement CDECL prologue/epilogues...
|
||||||
#define _GLUE_C_READ(func, ...) \
|
#define _GLUE_C_READ(func, ...) \
|
||||||
E(func) pushl XY_Reg_X; \
|
E(func) pushLQ XY_Reg_X; \
|
||||||
pushl AF_Reg_X; \
|
pushLQ AF_Reg_X; \
|
||||||
pushl SP_Reg_X; \
|
pushLQ SP_Reg_X; \
|
||||||
pushl PC_Reg_X; \
|
pushLQ PC_Reg_X; \
|
||||||
pushl _XAX; /* HACK: works around mysterious issue with generated mov(_XAX), _XAX ... */ \
|
pushLQ _XAX; /* HACK: works around mysterious issue with generated mov(_XAX), _XAX ... */ \
|
||||||
pushl EffectiveAddr_X; \
|
pushLQ EffectiveAddr_X; \
|
||||||
call SN(c_##func); \
|
call SN(c_##func); \
|
||||||
popl EffectiveAddr_X; /* dummy */ \
|
popLQ EffectiveAddr_X; /* dummy */ \
|
||||||
movb %al, %dl; \
|
movb %al, %dl; \
|
||||||
popl _XAX; /* ... ugh */ \
|
popLQ _XAX; /* ... ugh */ \
|
||||||
movb %dl, %al; \
|
movb %dl, %al; \
|
||||||
popl PC_Reg_X; \
|
popLQ PC_Reg_X; \
|
||||||
popl SP_Reg_X; \
|
popLQ SP_Reg_X; \
|
||||||
popl AF_Reg_X; \
|
popLQ AF_Reg_X; \
|
||||||
popl XY_Reg_X; \
|
popLQ XY_Reg_X; \
|
||||||
__VA_ARGS__ \
|
__VA_ARGS__ \
|
||||||
ret;
|
ret;
|
||||||
|
|
||||||
@ -101,11 +101,11 @@ E(func) pushl XY_Reg_X; \
|
|||||||
#define GLUE_C_READ(FUNC) _GLUE_C_READ(FUNC)
|
#define GLUE_C_READ(FUNC) _GLUE_C_READ(FUNC)
|
||||||
|
|
||||||
#define GLUE_C_READ_ALTZP(FUNC) _GLUE_C_READ(FUNC, \
|
#define GLUE_C_READ_ALTZP(FUNC) _GLUE_C_READ(FUNC, \
|
||||||
pushl _XAX; \
|
pushLQ _XAX; \
|
||||||
andl $0xFFFF, SP_Reg_X; \
|
andLQ $0xFFFF, SP_Reg_X; \
|
||||||
movl SN(base_stackzp), _XAX; \
|
movLQ SN(base_stackzp), _XAX; \
|
||||||
subl $SN(apple_ii_64k), _XAX; \
|
subLQ $SN(apple_ii_64k), _XAX; \
|
||||||
orl _XAX, SP_Reg_X; \
|
orLQ _XAX, SP_Reg_X; \
|
||||||
popl _XAX; \
|
popLQ _XAX; \
|
||||||
)
|
)
|
||||||
|
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user