Refactoring for more consistent/descriptive register names

This commit is contained in:
Aaron Culliney 2014-06-07 11:40:36 -07:00
parent 8791730b12
commit d7685a2163
3 changed files with 90 additions and 90 deletions

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@ -13,15 +13,15 @@
#define X_Reg %bl /* 6502 X register in %bl */ #define X_Reg %bl /* 6502 X register in %bl */
#define Y_Reg %bh /* 6502 Y register in %bh */ #define Y_Reg %bh /* 6502 Y register in %bh */
#define XY_Regs %ebx /* 6502 X&Y flags */ #define XY_Reg_X %ebx /* 6502 X&Y flags */
#define A_Reg %cl /* 6502 A register in %cl */ #define A_Reg %cl /* 6502 A register in %cl */
#define F_Reg %ch /* 6502 flags in %ch */ #define F_Reg %ch /* 6502 flags in %ch */
#define FF_Reg %ecx /* 6502 F&A flags */ #define AF_Reg_X %ecx /* 6502 F&A flags */
#define SP_Reg_L %dl /* 6502 Stack pointer low */ #define SP_Reg_L %dl /* 6502 Stack pointer low */
#define SP_Reg_H %dh /* 6502 Stack pointer high */ #define SP_Reg_H %dh /* 6502 Stack pointer high */
#define SP_Reg %edx /* 6502 Stack pointer */ #define SP_Reg_X %edx /* 6502 Stack pointer */
#define PC_Reg %si /* 6502 Program Counter */ #define PC_Reg %si /* 6502 Program Counter */
#define PC_Reg_E %esi /* 6502 Program Counter */ #define PC_Reg_X %esi /* 6502 Program Counter */
#define EffectiveAddr %di /* Effective address */ #define EffectiveAddr %di /* Effective address */
#define EffectiveAddr_E %edi /* Effective address */ #define EffectiveAddr_X %edi /* Effective address */

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@ -29,18 +29,18 @@
------------------------------------------------------------------------- */ ------------------------------------------------------------------------- */
#define GetFromPC_B \ #define GetFromPC_B \
movl PC_Reg_E, EffectiveAddr_E; \ movl PC_Reg_X, EffectiveAddr_X; \
incw PC_Reg; \ incw PC_Reg; \
call *SN(cpu65_vmem)(,EffectiveAddr_E,8); call *SN(cpu65_vmem)(,EffectiveAddr_X,8);
#define GetFromPC_W \ #define GetFromPC_W \
movl PC_Reg_E, EffectiveAddr_E; \ movl PC_Reg_X, EffectiveAddr_X; \
incw EffectiveAddr; \ incw EffectiveAddr; \
addw $2, PC_Reg; \ addw $2, PC_Reg; \
call *SN(cpu65_vmem)(,EffectiveAddr_E,8); \ call *SN(cpu65_vmem)(,EffectiveAddr_X,8); \
decw EffectiveAddr; \ decw EffectiveAddr; \
movb %al, %ah; \ movb %al, %ah; \
call *SN(cpu65_vmem)(,EffectiveAddr_E,8); call *SN(cpu65_vmem)(,EffectiveAddr_X,8);
#define JumpNextInstruction \ #define JumpNextInstruction \
GetFromPC_B \ GetFromPC_B \
@ -51,31 +51,31 @@
#define GetFromEA_B \ #define GetFromEA_B \
orb $1, DebugCurrRW; \ orb $1, DebugCurrRW; \
call *SN(cpu65_vmem)(,EffectiveAddr_E,8); call *SN(cpu65_vmem)(,EffectiveAddr_X,8);
#define GetFromEA_W \ #define GetFromEA_W \
incw EffectiveAddr; \ incw EffectiveAddr; \
call *SN(cpu65_vmem)(,EffectiveAddr_E,8); \ call *SN(cpu65_vmem)(,EffectiveAddr_X,8); \
decw EffectiveAddr; \ decw EffectiveAddr; \
movb %al, %ah; \ movb %al, %ah; \
call *SN(cpu65_vmem)(,EffectiveAddr_E,8); call *SN(cpu65_vmem)(,EffectiveAddr_X,8);
#define PutToEA_B \ #define PutToEA_B \
orb $2, DebugCurrRW; \ orb $2, DebugCurrRW; \
movb %al, DebugCurrByte; \ movb %al, DebugCurrByte; \
call *SN(cpu65_vmem)+4(,EffectiveAddr_E,8); call *SN(cpu65_vmem)+4(,EffectiveAddr_X,8);
#define GetFromMem_B(x) \ #define GetFromMem_B(x) \
movl x, EffectiveAddr_E; \ movl x, EffectiveAddr_X; \
call *SN(cpu65_vmem)(,EffectiveAddr_E,8); call *SN(cpu65_vmem)(,EffectiveAddr_X,8);
#define GetFromMem_W(x) \ #define GetFromMem_W(x) \
movl x, EffectiveAddr_E; \ movl x, EffectiveAddr_X; \
incw EffectiveAddr; \ incw EffectiveAddr; \
call *SN(cpu65_vmem)(,EffectiveAddr_E,8); \ call *SN(cpu65_vmem)(,EffectiveAddr_X,8); \
decw EffectiveAddr; \ decw EffectiveAddr; \
movb %al, %ah; \ movb %al, %ah; \
call *SN(cpu65_vmem)(,EffectiveAddr_E,8); call *SN(cpu65_vmem)(,EffectiveAddr_X,8);
#define Continue \ #define Continue \
jmp continue; jmp continue;
@ -109,7 +109,7 @@
xorl %eax, %eax; \ xorl %eax, %eax; \
xorl %ebx, %ebx; \ xorl %ebx, %ebx; \
xorl %ecx, %ecx; \ xorl %ecx, %ecx; \
movl $0x0100, SP_Reg; \ movl $0x0100, SP_Reg_X; \
xorl %esi, %esi; \ xorl %esi, %esi; \
xorl %edi, %edi; \ xorl %edi, %edi; \
movw DebugCurrEA, EffectiveAddr; \ movw DebugCurrEA, EffectiveAddr; \
@ -122,7 +122,7 @@
movb SN(cpu65_current)+6, SP_Reg_L; \ movb SN(cpu65_current)+6, SP_Reg_L; \
movl SN(base_stackzp), %eax; \ movl SN(base_stackzp), %eax; \
subl $SN(apple_ii_64k), %eax; /* $ for pointer addr */ \ subl $SN(apple_ii_64k), %eax; /* $ for pointer addr */ \
orl %eax, SP_Reg; \ orl %eax, SP_Reg_X; \
xorl %eax, %eax; xorl %eax, %eax;
#define BranchXCycles \ #define BranchXCycles \
@ -177,27 +177,27 @@
orb %ah, F_Reg; \ orb %ah, F_Reg; \
orb %al, F_Reg; orb %al, F_Reg;
#define Push(x) movb x, SN(apple_ii_64k)(,SP_Reg,1); \ #define Push(x) movb x, SN(apple_ii_64k)(,SP_Reg_X,1); \
decb SP_Reg_L; decb SP_Reg_L;
#define Pop(x) incb SP_Reg_L; \ #define Pop(x) incb SP_Reg_L; \
movb SN(apple_ii_64k)(,SP_Reg,1), x; movb SN(apple_ii_64k)(,SP_Reg_X,1), x;
/* Immediate Addressing - the operand is contained in the second byte of the /* Immediate Addressing - the operand is contained in the second byte of the
instruction. */ instruction. */
#define GetImm movl PC_Reg_E, EffectiveAddr_E; \ #define GetImm movl PC_Reg_X, EffectiveAddr_X; \
incw PC_Reg; incw PC_Reg;
/* Absolute Addressing - the second byte of the instruction is the low /* Absolute Addressing - the second byte of the instruction is the low
order address, and the third byte is the high order byte. */ order address, and the third byte is the high order byte. */
#define GetAbs GetFromPC_W; \ #define GetAbs GetFromPC_W; \
movl %eax, EffectiveAddr_E; movl %eax, EffectiveAddr_X;
/* Zero Page Addressing - the second byte of the instruction is an /* Zero Page Addressing - the second byte of the instruction is an
address on the zero page */ address on the zero page */
#define GetZPage \ #define GetZPage \
GetFromPC_B; \ GetFromPC_B; \
movl %eax, EffectiveAddr_E; movl %eax, EffectiveAddr_X;
/* Zero Page Indexed Addressing - The effective address is calculated by /* Zero Page Indexed Addressing - The effective address is calculated by
adding the second byte to the contents of the index register. Due adding the second byte to the contents of the index register. Due
@ -207,13 +207,13 @@
#define GetZPage_X \ #define GetZPage_X \
GetFromPC_B; \ GetFromPC_B; \
addb X_Reg, %al; \ addb X_Reg, %al; \
movl %eax, EffectiveAddr_E; movl %eax, EffectiveAddr_X;
// HACK IS THIS EVER USED? // HACK IS THIS EVER USED?
#define GetZPage_Y \ #define GetZPage_Y \
GetFromPC_B; \ GetFromPC_B; \
addb Y_Reg, %al; \ addb Y_Reg, %al; \
movl %eax, EffectiveAddr_E; movl %eax, EffectiveAddr_X;
/* Absolute Indexed Addressing - The effective address is formed by /* Absolute Indexed Addressing - The effective address is formed by
adding the contents of X or Y to the address contained in the adding the contents of X or Y to the address contained in the
@ -227,11 +227,11 @@
#define GetAbs_X \ #define GetAbs_X \
_GetAbs_X \ _GetAbs_X \
incb DebugCycleCount; /* +1 cycle on page boundary */ \ incb DebugCycleCount; /* +1 cycle on page boundary */ \
9: movl %eax, EffectiveAddr_E; 9: movl %eax, EffectiveAddr_X;
#define GetAbs_X_STx \ #define GetAbs_X_STx \
_GetAbs_X \ _GetAbs_X \
9: movl %eax, EffectiveAddr_E; 9: movl %eax, EffectiveAddr_X;
#define _GetAbs_Y \ #define _GetAbs_Y \
GetFromPC_W; \ GetFromPC_W; \
@ -242,11 +242,11 @@
#define GetAbs_Y \ #define GetAbs_Y \
_GetAbs_Y \ _GetAbs_Y \
incb DebugCycleCount; /* +1 cycle on page boundary */ \ incb DebugCycleCount; /* +1 cycle on page boundary */ \
9: movl %eax, EffectiveAddr_E; 9: movl %eax, EffectiveAddr_X;
#define GetAbs_Y_STA \ #define GetAbs_Y_STA \
_GetAbs_Y \ _GetAbs_Y \
9: movl %eax, EffectiveAddr_E; 9: movl %eax, EffectiveAddr_X;
/* Absolute Indirect Addressing - The second and third bytes of the /* Absolute Indirect Addressing - The second and third bytes of the
instruction are the low and high bytes of an address, respectively. instruction are the low and high bytes of an address, respectively.
@ -266,13 +266,13 @@
#define GetIndZPage \ #define GetIndZPage \
GetFromPC_B; \ GetFromPC_B; \
incb %al; \ incb %al; \
movl %eax, EffectiveAddr_E; \ movl %eax, EffectiveAddr_X; \
GetFromEA_B; \ GetFromEA_B; \
movb %al, %ah; \ movb %al, %ah; \
decl EffectiveAddr_E; \ decl EffectiveAddr_X; \
andl $0xFF, EffectiveAddr_E; \ andl $0xFF, EffectiveAddr_X; \
GetFromEA_B; \ GetFromEA_B; \
movl %eax, EffectiveAddr_E; movl %eax, EffectiveAddr_X;
/* Zero Page Indexed Indirect Addressing - The second byte is added to /* Zero Page Indexed Indirect Addressing - The second byte is added to
the contents of the X index register; the carry is discarded. The the contents of the X index register; the carry is discarded. The
@ -285,13 +285,13 @@
GetFromPC_B; \ GetFromPC_B; \
addb X_Reg, %al; \ addb X_Reg, %al; \
incb %al; \ incb %al; \
movl %eax, EffectiveAddr_E; \ movl %eax, EffectiveAddr_X; \
GetFromEA_B; \ GetFromEA_B; \
movb %al, %ah; \ movb %al, %ah; \
decl EffectiveAddr_E; \ decl EffectiveAddr_X; \
andl $0xFF, EffectiveAddr_E; \ andl $0xFF, EffectiveAddr_X; \
GetFromEA_B; \ GetFromEA_B; \
movl %eax, EffectiveAddr_E; movl %eax, EffectiveAddr_X;
/* Indirect Indexed Addressing - The second byte of the instruction /* Indirect Indexed Addressing - The second byte of the instruction
points to a memory location in page zero. The contents of this points to a memory location in page zero. The contents of this
@ -303,11 +303,11 @@
#define _GetIndZPage_Y \ #define _GetIndZPage_Y \
GetFromPC_B; \ GetFromPC_B; \
incb %al; \ incb %al; \
movl %eax, EffectiveAddr_E; \ movl %eax, EffectiveAddr_X; \
GetFromEA_B; \ GetFromEA_B; \
movb %al, %ah; \ movb %al, %ah; \
decl EffectiveAddr_E; \ decl EffectiveAddr_X; \
andl $0xFF, EffectiveAddr_E; \ andl $0xFF, EffectiveAddr_X; \
GetFromEA_B; \ GetFromEA_B; \
addb Y_Reg, %al; \ addb Y_Reg, %al; \
jnc 9f; jnc 9f;
@ -316,15 +316,15 @@
_GetIndZPage_Y \ _GetIndZPage_Y \
adcb $0, %ah; \ adcb $0, %ah; \
incb DebugCycleCount; /* +1 cycle on page boundary */ \ incb DebugCycleCount; /* +1 cycle on page boundary */ \
9: movl %eax, EffectiveAddr_E; 9: movl %eax, EffectiveAddr_X;
#define GetIndZPage_Y_STA \ #define GetIndZPage_Y_STA \
_GetIndZPage_Y \ _GetIndZPage_Y \
adcb $0, %ah; \ adcb $0, %ah; \
9: movl %eax, EffectiveAddr_E; 9: movl %eax, EffectiveAddr_X;
#define DoADC_b GetFromEA_B \ #define DoADC_b GetFromEA_B \
bt $C_Flag_Bit, FF_Reg; \ bt $C_Flag_Bit, AF_Reg_X; \
adcb %al, A_Reg; \ adcb %al, A_Reg; \
FlagNVZC FlagNVZC
@ -357,7 +357,7 @@
#define DoADC_d GetFromEA_B \ #define DoADC_d GetFromEA_B \
DebugBCDCheck \ DebugBCDCheck \
bt $C_Flag_Bit, FF_Reg; \ bt $C_Flag_Bit, AF_Reg_X; \
adcb A_Reg, %al; \ adcb A_Reg, %al; \
daa; \ daa; \
movb %al, A_Reg; \ movb %al, A_Reg; \
@ -437,7 +437,7 @@
FlagNZ FlagNZ
#define DoROL GetFromEA_B \ #define DoROL GetFromEA_B \
bt $C_Flag_Bit, FF_Reg; \ bt $C_Flag_Bit, AF_Reg_X; \
adcb %al,%al; \ adcb %al,%al; \
FlagNZC \ FlagNZC \
PutToEA_B PutToEA_B
@ -452,13 +452,13 @@
#define DoSBC_b GetFromEA_B \ #define DoSBC_b GetFromEA_B \
notb %al; \ notb %al; \
bt $C_Flag_Bit, FF_Reg; \ bt $C_Flag_Bit, AF_Reg_X; \
adcb %al, A_Reg; \ adcb %al, A_Reg; \
FlagNVZC FlagNVZC
#define DoSBC_d GetFromEA_B \ #define DoSBC_d GetFromEA_B \
DebugBCDCheck \ DebugBCDCheck \
bt $C_Flag_Bit, FF_Reg; \ bt $C_Flag_Bit, AF_Reg_X; \
cmc; \ cmc; \
xchgb A_Reg, %al; \ xchgb A_Reg, %al; \
sbbb A_Reg, %al; \ sbbb A_Reg, %al; \
@ -1211,10 +1211,10 @@ E(op_JMP_ind) // 0x6c
jmp_special: // see JMP indirect note in _Understanding the Apple IIe_ 4-25 jmp_special: // see JMP indirect note in _Understanding the Apple IIe_ 4-25
movw %ax, PC_Reg movw %ax, PC_Reg
subw $0xff, PC_Reg subw $0xff, PC_Reg
GetFromMem_B(PC_Reg_E) GetFromMem_B(PC_Reg_X)
xchgb %al, %ah xchgb %al, %ah
addw $0xff, PC_Reg addw $0xff, PC_Reg
GetFromMem_B(PC_Reg_E) GetFromMem_B(PC_Reg_X)
movw %ax, PC_Reg movw %ax, PC_Reg
Continue Continue
@ -1224,7 +1224,7 @@ E(op_JMP_abs_ind_x)
movw %ax, EffectiveAddr movw %ax, EffectiveAddr
movzbl X_Reg, %eax movzbl X_Reg, %eax
addw %ax, EffectiveAddr addw %ax, EffectiveAddr
GetFromMem_W(EffectiveAddr_E) GetFromMem_W(EffectiveAddr_X)
movw %ax, PC_Reg movw %ax, PC_Reg
Continue Continue
@ -1529,7 +1529,7 @@ E(op_PLY)
---------------------------------- */ ---------------------------------- */
E(op_ROL_acc) // 0x2a E(op_ROL_acc) // 0x2a
bt $C_Flag_Bit, FF_Reg bt $C_Flag_Bit, AF_Reg_X
adcb A_Reg, A_Reg adcb A_Reg, A_Reg
FlagNZC FlagNZC
Continue Continue
@ -2057,7 +2057,7 @@ ex_irq: testb $I_Flag, F_Reg // Already interrupt
Push(%al) Push(%al)
orb $(B_Flag | I_Flag), F_Reg orb $(B_Flag | I_Flag), F_Reg
//andb $~D_Flag, F_Reg // AppleWin clears Decimal bit? //andb $~D_Flag, F_Reg // AppleWin clears Decimal bit?
andl $0xFFFF, EffectiveAddr_E// HACK FIXME : there is a bug somewhere that is occasionally corrupting EffectiveAddr_E andl $0xFFFF, EffectiveAddr_X// HACK FIXME : there is a bug somewhere that is occasionally corrupting EffectiveAddr_X
movw $0xFFFE, EffectiveAddr // ROM interrupt vector movw $0xFFFE, EffectiveAddr // ROM interrupt vector
GetFromEA_W GetFromEA_W
movw %ax, PC_Reg movw %ax, PC_Reg
@ -2084,7 +2084,7 @@ E(cpu65_run)
xorl %ecx, %ecx xorl %ecx, %ecx
xorl %esi, %esi xorl %esi, %esi
xorl %edi, %edi xorl %edi, %edi
movl $0x1FF, SP_Reg movl $0x1FF, SP_Reg_X
jmp ex_reset jmp ex_reset
exit_cpu65_run: SaveState // Return to timing loop ... exit_cpu65_run: SaveState // Return to timing loop ...
@ -2105,7 +2105,7 @@ E(cpu65_direct_write)
pushl %edi pushl %edi
movl 8(%esp),%edi movl 8(%esp),%edi
movl 12(%esp),%eax movl 12(%esp),%eax
call *SN(cpu65_vmem)+4(,EffectiveAddr_E,8) call *SN(cpu65_vmem)+4(,EffectiveAddr_X,8)
popl %edi popl %edi
ret ret

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@ -20,11 +20,11 @@
#include "cpu-regs.h" #include "cpu-regs.h"
#define GLUE_FIXED_READ(func,address) \ #define GLUE_FIXED_READ(func,address) \
E(func) movb SN(address)(EffectiveAddr_E),%al; \ E(func) movb SN(address)(EffectiveAddr_X),%al; \
ret; ret;
#define GLUE_FIXED_WRITE(func,address) \ #define GLUE_FIXED_WRITE(func,address) \
E(func) movb %al,SN(address)(EffectiveAddr_E); \ E(func) movb %al,SN(address)(EffectiveAddr_X); \
ret; ret;
#define GLUE_BANK_MAYBEREAD(func,pointer) \ #define GLUE_BANK_MAYBEREAD(func,pointer) \
@ -32,68 +32,68 @@ E(func) testl $SS_CXROM, SN(softswitches); \
jnz 1f; \ jnz 1f; \
call *SN(pointer); \ call *SN(pointer); \
ret; \ ret; \
1: addl SN(pointer),EffectiveAddr_E; \ 1: addl SN(pointer),EffectiveAddr_X; \
movb (EffectiveAddr_E),%al; \ movb (EffectiveAddr_X),%al; \
subl SN(pointer),EffectiveAddr_E; \ subl SN(pointer),EffectiveAddr_X; \
ret; ret;
#define GLUE_BANK_READ(func,pointer) \ #define GLUE_BANK_READ(func,pointer) \
E(func) addl SN(pointer),EffectiveAddr_E; \ E(func) addl SN(pointer),EffectiveAddr_X; \
movb (EffectiveAddr_E),%al; \ movb (EffectiveAddr_X),%al; \
subl SN(pointer),EffectiveAddr_E; \ subl SN(pointer),EffectiveAddr_X; \
ret; ret;
#define GLUE_BANK_WRITE(func,pointer) \ #define GLUE_BANK_WRITE(func,pointer) \
E(func) addl SN(pointer),EffectiveAddr_E; \ E(func) addl SN(pointer),EffectiveAddr_X; \
movb %al,(EffectiveAddr_E); \ movb %al,(EffectiveAddr_X); \
subl SN(pointer),EffectiveAddr_E; \ subl SN(pointer),EffectiveAddr_X; \
ret; ret;
#define GLUE_BANK_MAYBEWRITE(func,pointer) \ #define GLUE_BANK_MAYBEWRITE(func,pointer) \
E(func) addl SN(pointer),EffectiveAddr_E; \ E(func) addl SN(pointer),EffectiveAddr_X; \
cmpl $0,SN(pointer); \ cmpl $0,SN(pointer); \
jz 1f; \ jz 1f; \
movb %al,(EffectiveAddr_E); \ movb %al,(EffectiveAddr_X); \
1: ret; 1: ret;
// TODO FIXME : implement CDECL prologue/epilogues... // TODO FIXME : implement CDECL prologue/epilogues...
#define GLUE_C_WRITE(func) \ #define GLUE_C_WRITE(func) \
E(func) pushl %eax; \ E(func) pushl %eax; \
pushl XY_Regs; \ pushl XY_Reg_X; \
pushl FF_Reg; \ pushl AF_Reg_X; \
pushl SP_Reg; \ pushl SP_Reg_X; \
pushl PC_Reg_E; \ pushl PC_Reg_X; \
andl $0xff,%eax; \ andl $0xff,%eax; \
pushl %eax; \ pushl %eax; \
pushl EffectiveAddr_E; \ pushl EffectiveAddr_X; \
call SN(c_##func); \ call SN(c_##func); \
popl %edx; /* dummy */ \ popl %edx; /* dummy */ \
popl %edx; /* dummy */ \ popl %edx; /* dummy */ \
popl PC_Reg_E; \ popl PC_Reg_X; \
popl SP_Reg; \ popl SP_Reg_X; \
popl FF_Reg; \ popl AF_Reg_X; \
popl XY_Regs; \ popl XY_Reg_X; \
popl %eax; \ popl %eax; \
ret; ret;
// TODO FIXME : implement CDECL prologue/epilogues... // TODO FIXME : implement CDECL prologue/epilogues...
#define _GLUE_C_READ(func, ...) \ #define _GLUE_C_READ(func, ...) \
E(func) pushl XY_Regs; \ E(func) pushl XY_Reg_X; \
pushl FF_Reg; \ pushl AF_Reg_X; \
pushl SP_Reg; \ pushl SP_Reg_X; \
pushl PC_Reg_E; \ pushl PC_Reg_X; \
pushl %eax; /* HACK: works around mysterious issue with generated mov(%eax), %eax ... */ \ pushl %eax; /* HACK: works around mysterious issue with generated mov(%eax), %eax ... */ \
pushl EffectiveAddr_E; \ pushl EffectiveAddr_X; \
call SN(c_##func); \ call SN(c_##func); \
popl %edx; /* dummy */ \ popl %edx; /* dummy */ \
movb %al, %dl; \ movb %al, %dl; \
popl %eax; /* ... ugh */ \ popl %eax; /* ... ugh */ \
movb %dl, %al; \ movb %dl, %al; \
popl PC_Reg_E; \ popl PC_Reg_X; \
popl SP_Reg; \ popl SP_Reg_X; \
popl FF_Reg; \ popl AF_Reg_X; \
popl XY_Regs; \ popl XY_Reg_X; \
__VA_ARGS__ \ __VA_ARGS__ \
ret; ret;
@ -102,10 +102,10 @@ E(func) pushl XY_Regs; \
#define GLUE_C_READ_ALTZP(FUNC) _GLUE_C_READ(FUNC, \ #define GLUE_C_READ_ALTZP(FUNC) _GLUE_C_READ(FUNC, \
pushl %eax; \ pushl %eax; \
andl $0xFFFF, SP_Reg; \ andl $0xFFFF, SP_Reg_X; \
movl SN(base_stackzp), %eax; \ movl SN(base_stackzp), %eax; \
subl $SN(apple_ii_64k), %eax; \ subl $SN(apple_ii_64k), %eax; \
orl %eax, SP_Reg; \ orl %eax, SP_Reg_X; \
popl %eax; \ popl %eax; \
) )