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WARNING : changes test to accommodate CPU implementation

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- TODO : check the Apple //e Bible for this ...
    - Calculates 2-byte branch instructions (Bxx +OFF)--that sit right at page boundary (at 0x..fe 0x..ff)--as 3 cycles
      rather than 4, since PC has already advanced to the new page (matches logic currently in x86/cpu.S
This commit is contained in:
Aaron Culliney 2015-02-16 11:57:33 -08:00
parent 15dd90902c
commit d8ae71ddb0
1 changed files with 45 additions and 51 deletions
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96
src/test/testcpu.c
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@ -1137,15 +1137,14 @@ TEST test_BCC(int8_t off, bool flag, uint16_t addrs) {
flags |= flag ? fC : 0;
uint8_t cycle_count = 2;
uint16_t newpc = 0xffff;
if (flag) {
newpc = addrs+2;
} else {
newpc = addrs+2+off;
uint16_t newpc = addrs+2;
if (!flag) {
uint16_t prebranch = newpc;
newpc += off;
++cycle_count;
if ((newpc&0xFF00) != (addrs&0xFF00)) {
if ((newpc&0xFF00) != (prebranch&0xFF00)) {
++cycle_count;
}
}
}
apple_ii_64k[0][addrs+0] = 0x90;
@ -1183,13 +1182,12 @@ TEST test_BCS(int8_t off, bool flag, uint16_t addrs) {
flags |= flag ? fC : 0;
uint8_t cycle_count = 2;
uint16_t newpc = 0xffff;
if (!flag) {
newpc = addrs+2;
} else {
newpc = addrs+2+off;
uint16_t newpc = addrs+2;
if (flag) {
uint16_t prebranch = newpc;
newpc += off;
++cycle_count;
if ((newpc&0xFF00) != (addrs&0xFF00)) {
if ((newpc&0xFF00) != (prebranch&0xFF00)) {
++cycle_count;
}
}
@ -1229,13 +1227,12 @@ TEST test_BEQ(int8_t off, bool flag, uint16_t addrs) {
flags |= flag ? fZ : 0;
uint8_t cycle_count = 2;
uint16_t newpc = 0xffff;
if (!flag) {
newpc = addrs+2;
} else {
newpc = addrs+2+off;
uint16_t newpc = addrs+2;
if (flag) {
uint16_t prebranch = newpc;
newpc += off;
++cycle_count;
if ((newpc&0xFF00) != (addrs&0xFF00)) {
if ((newpc&0xFF00) != (prebranch&0xFF00)) {
++cycle_count;
}
}
@ -1275,13 +1272,12 @@ TEST test_BNE(int8_t off, bool flag, uint16_t addrs) {
flags |= flag ? fZ : 0;
uint8_t cycle_count = 2;
uint16_t newpc = 0xffff;
if (flag) {
newpc = addrs+2;
} else {
newpc = addrs+2+off;
uint16_t newpc = addrs+2;
if (!flag) {
uint16_t prebranch = newpc;
newpc += off;
++cycle_count;
if ((newpc&0xFF00) != (addrs&0xFF00)) {
if ((newpc&0xFF00) != (prebranch&0xFF00)) {
++cycle_count;
}
}
@ -1321,13 +1317,12 @@ TEST test_BMI(int8_t off, bool flag, uint16_t addrs) {
flags |= flag ? fN : 0;
uint8_t cycle_count = 2;
uint16_t newpc = 0xffff;
if (!flag) {
newpc = addrs+2;
} else {
newpc = addrs+2+off;
uint16_t newpc = addrs+2;
if (flag) {
uint16_t prebranch = newpc;
newpc += off;
++cycle_count;
if ((newpc&0xFF00) != (addrs&0xFF00)) {
if ((newpc&0xFF00) != (prebranch&0xFF00)) {
++cycle_count;
}
}
@ -1367,13 +1362,12 @@ TEST test_BPL(int8_t off, bool flag, uint16_t addrs) {
flags |= flag ? fN : 0;
uint8_t cycle_count = 2;
uint16_t newpc = 0xffff;
if (flag) {
newpc = addrs+2;
} else {
newpc = addrs+2+off;
uint16_t newpc = addrs+2;
if (!flag) {
uint16_t prebranch = newpc;
newpc += off;
++cycle_count;
if ((newpc&0xFF00) != (addrs&0xFF00)) {
if ((newpc&0xFF00) != (prebranch&0xFF00)) {
++cycle_count;
}
}
@ -1413,8 +1407,10 @@ TEST test_BRA(volatile int8_t off, volatile bool flag, volatile uint16_t addrs)
flags |= flag ? fN : 0;
uint8_t cycle_count = 3;
uint16_t newpc = addrs+2+off;
if ((newpc&0xFF00) != (addrs&0xFF00)) {
uint16_t newpc = addrs+2;
uint16_t prebranch = newpc;
newpc += off;
if ((newpc&0xFF00) != (prebranch&0xFF00)) {
++cycle_count;
}
@ -1453,13 +1449,12 @@ TEST test_BVC(int8_t off, bool flag, uint16_t addrs) {
flags |= flag ? fV : 0;
uint8_t cycle_count = 2;
uint16_t newpc = 0xffff;
if (flag) {
newpc = addrs+2;
} else {
newpc = addrs+2+off;
uint16_t newpc = addrs+2;
if (!flag) {
uint16_t prebranch = newpc;
newpc += off;
++cycle_count;
if ((newpc&0xFF00) != (addrs&0xFF00)) {
if ((newpc&0xFF00) != (prebranch&0xFF00)) {
++cycle_count;
}
}
@ -1499,13 +1494,12 @@ TEST test_BVS(int8_t off, bool flag, uint16_t addrs) {
flags |= flag ? fV : 0;
uint8_t cycle_count = 2;
uint16_t newpc = 0xffff;
if (!flag) {
newpc = addrs+2;
} else {
newpc = addrs+2+off;
uint16_t newpc = addrs+2;
if (flag) {
uint16_t prebranch = newpc;
newpc += off;
++cycle_count;
if ((newpc&0xFF00) != (addrs&0xFF00)) {
if ((newpc&0xFF00) != (prebranch&0xFF00)) {
++cycle_count;
}
}