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Re-arrange distribution files, merge a2serclk into a2pid
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aa4c9e9a2e
commit
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@ -31,10 +31,11 @@
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#define CM_GP0CTL (0x7E101070)
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#define CM_GP0CTL (0x7E101070)
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#define CM_GP0DIV (0x7E101074)
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#define CM_GP0DIV (0x7E101074)
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#define IOMAP_LEN 4096
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//
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//
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// Set up a memory regions to access GPIO
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// Set up a memory regions to access GPIO
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//
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//
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volatile unsigned int *setup_io(reg_base)
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volatile unsigned int *setup_io(int reg_base)
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{
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{
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int mem_fd;
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int mem_fd;
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void *io_map;
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void *io_map;
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@ -47,7 +48,7 @@ volatile unsigned int *setup_io(reg_base)
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}
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}
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// mmap IO
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// mmap IO
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io_map = mmap(NULL, //Any adddress in our space will do
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io_map = mmap(NULL, //Any adddress in our space will do
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4096, //Map length
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IOMAP_LEN, //Map length
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PROT_READ|PROT_WRITE,// Enable reading & writting to mapped memory
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PROT_READ|PROT_WRITE,// Enable reading & writting to mapped memory
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MAP_SHARED, //Shared with other processes
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MAP_SHARED, //Shared with other processes
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mem_fd, //File to map
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mem_fd, //File to map
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@ -59,13 +60,17 @@ volatile unsigned int *setup_io(reg_base)
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exit(-1);
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exit(-1);
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}
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}
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return (volatile unsigned *)io_map;
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return (volatile unsigned *)io_map;
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}
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}
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// I/O access
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void release_io(volatile unsigned int *io_map)
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volatile unsigned *gpio, *cmgp;
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int main(int argc, char **argv)
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{
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{
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munmap((void *)io_map, IOMAP_LEN);
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}
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void setserclk(void)
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{
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// I/O access
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volatile unsigned *gpio, *cmgp;
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int g,rep;
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int g,rep;
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// Set up gpi pointer for direct register access
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// Set up gpi pointer for direct register access
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@ -90,7 +95,8 @@ int main(int argc, char **argv)
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// Set GCLK function (ALT0) for GPIO 4 (header pin #7)
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// Set GCLK function (ALT0) for GPIO 4 (header pin #7)
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INP_GPIO(4);
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INP_GPIO(4);
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SET_GPIO_ALT(4, 0x00);
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SET_GPIO_ALT(4, 0x00);
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// Release I/O space
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return 0;
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release_io(gpio);
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release_io(cmgp);
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}
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}
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