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worked out why STA seemed an exception

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This commit is contained in:
James Tauber 2011-08-14 21:37:34 -04:00
parent 2caed7b36d
commit 12671d81cb
1 changed files with 11 additions and 28 deletions
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39
cycle_notes.txt
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@ -17,43 +17,28 @@ given on http://www.6502.org/tutorials/6502opcodes.html )
NOTE: there appears to be an error in AND and ORA zero page timings on that
webpage given above. I've now corrected this below.
There are 11 classes of instructions when it comes to cycle times:
There are 10 classes of instructions when it comes to cycle times:
Class Ia
(followed by ADC, AND, BIT, CMP, CPX, CPY, EOR, LDA, LDX, LDY, ORA, SBC, STX,
STY)
Class I
(followed by ADC, AND, BIT, CMP, CPX, CPY, EOR, LDA, LDX, LDY, ORA, SBC, STA,
STX, STY)
immediate 2
zero page 3
zero page, x 4
zero page, y 4
absolute 4
absolute, x 4 (+1 if page crossed)
absolute, y 4 (+1 if page crossed)
absolute, x 4 (+1 if page crossed or writing)
absolute, y 4 (+1 if page crossed or writing)
indirect, x 6
indirect, y 5 (+1 if page crossed)
indirect, y 5 (+1 if page crossed or writing)
Note 1: the zero page indexed and x-index indirect don't have the page cross
addition because they wrap.
Class Ib
(followed by STA)
zero page 3
zero page, x 4
zero page, y 4
absolute 4
absolute, x 5
absolute, y 5
indirect, x 6
indirect, y 6
Note 2: just like Class Ia BUT takes the cycles it would take if there's a
page cross even if there isn't.
Question 1: why is this?
Note 2: writes to indexed non-zero-page memory (e.g. STA) have the +1 even
if not page crossing.
Class II
@ -65,10 +50,8 @@ zero page, x 6
absolute 6
absolute, x 7
Note 4: looks like class Ib + 2 in the non-implied cases
Question 2: why does absolute, x not have a page crossing addition? same
reason as for Ib?
Note 3: looks like class I +2 (with the absolute, x +1 even if not page
crossing)
Class IIIa