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https://github.com/jtauber/applepy.git
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initial slot support and disk controller implementation (although doesn't do anything but debug output yet)
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93
applepy.py
93
applepy.py
@ -316,10 +316,24 @@ class IO:
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self.display = display
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self.speaker = speaker
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self.cassette = cassette
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self.slots = [None] * 8
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def add_card(self, slot, card):
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assert 0 < slot < 8
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self.slots[slot] = card
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def read_byte(self, cycle, address):
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assert 0xC000 <= address <= 0xCFFF
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if address == 0xC000:
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if 0xC080 <= address <= 0xC0FF:
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slot, switch = divmod(address - 0xC080, 0x10)
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if self.slots[slot] is not None:
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return self.slots[slot].switch(cycle, switch)
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elif 0xC100 <= address <= 0xC7FF:
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hi, lo = divmod(address, 0x100)
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slot = hi - 0xC0
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if self.slots[slot] is not None:
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return self.slots[slot].read_byte(lo)
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elif address == 0xC000:
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return self.kbd
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elif address == 0xC010:
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self.kbd = self.kbd & 0x7F
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@ -346,16 +360,91 @@ class IO:
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if self.cassette:
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return self.cassette.read_byte(cycle)
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else:
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print "%04X" % address
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pass # print "%04X" % address
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return 0x00
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class DiskController:
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# 16-sector controller
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ROM = [
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0xa2, 0x20, 0xa0, 0x00, 0xa2, 0x03, 0x86, 0x3c,
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0x8a, 0x0a, 0x24, 0x3c, 0xf0, 0x10, 0x05, 0x3c,
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0x49, 0xff, 0x29, 0x7e, 0xb0, 0x08, 0x4a, 0xd0,
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0xfb, 0x98, 0x9d, 0x56, 0x03, 0xc8, 0xe8, 0x10,
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0xe5, 0x20, 0x58, 0xff, 0xba, 0xbd, 0x00, 0x01,
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0x0a, 0x0a, 0x0a, 0x0a, 0x85, 0x2b, 0xaa, 0xbd,
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0x8e, 0xc0, 0xbd, 0x8c, 0xc0, 0xbd, 0x8a, 0xc0,
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0xbd, 0x89, 0xc0, 0xa0, 0x50, 0xbd, 0x80, 0xc0,
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0x98, 0x29, 0x03, 0x0a, 0x05, 0x2b, 0xaa, 0xbd,
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0x81, 0xc0, 0xa9, 0x56, 0x20, 0xa8, 0xfc, 0x88,
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0x10, 0xeb, 0x85, 0x26, 0x85, 0x3d, 0x85, 0x41,
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0xa9, 0x08, 0x85, 0x27, 0x18, 0x08, 0xbd, 0x8c,
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0xc0, 0x10, 0xfb, 0x49, 0xd5, 0xd0, 0xf7, 0xbd,
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0x8c, 0xc0, 0x10, 0xfb, 0xc9, 0xaa, 0xd0, 0xf3,
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0xea, 0xbd, 0x8c, 0xc0, 0x10, 0xfb, 0xc9, 0x96,
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0xf0, 0x09, 0x28, 0x90, 0xdf, 0x49, 0xad, 0xf0,
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0x25, 0xd0, 0xd9, 0xa0, 0x03, 0x85, 0x40, 0xbd,
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0x8c, 0xc0, 0x10, 0xfb, 0x2a, 0x85, 0x3c, 0xbd,
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0x8c, 0xc0, 0x10, 0xfb, 0x25, 0x3c, 0x88, 0xd0,
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0xec, 0x28, 0xc5, 0x3d, 0xd0, 0xbe, 0xa5, 0x40,
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0xc5, 0x41, 0xd0, 0xb8, 0xb0, 0xb7, 0xa0, 0x56,
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0x84, 0x3c, 0xbc, 0x8c, 0xc0, 0x10, 0xfb, 0x59,
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0xd6, 0x02, 0xa4, 0x3c, 0x88, 0x99, 0x00, 0x03,
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0xd0, 0xee, 0x84, 0x3c, 0xbc, 0x8c, 0xc0, 0x10,
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0xfb, 0x59, 0xd6, 0x02, 0xa4, 0x3c, 0x91, 0x26,
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0xc8, 0xd0, 0xef, 0xbc, 0x8c, 0xc0, 0x10, 0xfb,
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0x59, 0xd6, 0x02, 0xd0, 0x87, 0xa0, 0x00, 0xa2,
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0x56, 0xca, 0x30, 0xfb, 0xb1, 0x26, 0x5e, 0x00,
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0x03, 0x2a, 0x5e, 0x00, 0x03, 0x2a, 0x91, 0x26,
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0xc8, 0xd0, 0xee, 0xe6, 0x27, 0xe6, 0x3d, 0xa5,
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0x3d, 0xcd, 0x00, 0x08, 0xa6, 0x2b, 0x90, 0xdb,
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0x4c, 0x01, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00,
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]
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def switch(self, cycle, address):
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assert 0x00 <= address <= 0x0F
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if address == 0x00:
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print "phase 0 off"
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elif address == 0x01:
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print "phase 0 on"
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elif address == 0x02:
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print "phase 1 off"
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elif address == 0x03:
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print "phase 1 off"
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elif address == 0x04:
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print "phase 2 off"
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elif address == 0x05:
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print "phase 2 on"
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elif address == 0x06:
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print "phase 3 off"
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elif address == 0x07:
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print "phase 3 on"
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elif address == 0x09:
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print "motor on"
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elif address == 0x0A:
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print "select drive 1"
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elif address == 0x0C:
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print "read data"
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elif address == 0x0E:
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print "set read"
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else:
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print "%d %04X" % (cycle, 0xC080 + address)
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raw_input("pause")
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return 0x00
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def read_byte(self, address):
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assert 0x00 <= address <= 0xFF
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return DiskController.ROM[address]
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class Apple2:
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def __init__(self, options, display, speaker, cassette):
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self.display = display
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self.speaker = speaker
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self.io = IO(display, speaker, cassette)
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self.io.add_card(6, DiskController())
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args = [
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sys.executable,
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