mirror of
https://github.com/bradgrantham/apple2e.git
synced 2024-06-01 18:41:30 +00:00
lots of instructions
This commit is contained in:
Brad Grantham
parent
45cc6caa5d
commit
25d03dc960
406
apple2e.cpp
406
apple2e.cpp
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@ -1,4 +1,8 @@
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#include <cstdlib>
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#include <string>
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#include <set>
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using namespace std;
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#include "emulator.h"
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@ -8,6 +12,70 @@ const unsigned int DEBUG_STATE = 0x04;
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const unsigned int DEBUG_ERROR = 0x08;
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unsigned int debug = DEBUG_ERROR | DEBUG_DECODE | DEBUG_STATE;
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struct SoftSwitch
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{
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string name;
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int clear_address;
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int set_address;
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int read_address;
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bool read_also_changes;
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bool sw = false;
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SoftSwitch(const char* name_, int clear, int on, int read, bool read_changes, vector<SoftSwitch*>& s) :
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name(name_),
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clear_address(clear),
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set_address(on),
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read_address(read),
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read_also_changes(read_changes)
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{
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s.push_back(this);
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}
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operator bool() const
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{
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return sw;
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}
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};
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const int textport_row_base_addresses[] =
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{
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0x400,
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0x480,
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0x500,
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0x580,
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0x600,
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0x680,
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0x700,
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0x780,
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0x428,
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0x4A8,
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0x528,
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0x5A8,
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0x628,
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0x6A8,
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0x728,
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0x7A8,
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0x450,
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0x4D0,
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0x550,
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0x5D0,
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0x650,
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0x6D0,
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0x750,
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0x7D0,
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};
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void textport_change(unsigned char *port)
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{
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printf("TEXTPORT:\n");
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printf("------------------------------------------\n");
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for(int row = 0; row < 24; row++) {
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printf("|");
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for(int col = 0; col < 40; col++) {
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int addr = textport_row_base_addresses[row] + col;
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printf("%c", isprint(port[addr]) ? port[addr] : ' ');
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}
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printf("|\n");
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}
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printf("------------------------------------------\n");
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}
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struct MAINboard : board_base
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{
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static const int text1_base = 0x400;
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@ -23,52 +91,73 @@ struct MAINboard : board_base
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unsigned char rom_bytes[rom_size];
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unsigned char irom_bytes[irom_size];
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unsigned char ram_bytes[65536];
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bool ROM_is_active;
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bool CXROM_is_active;
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MAINboard(unsigned char rom[32768]) :
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ROM_is_active(true),
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CXROM_is_active(true)
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vector<SoftSwitch*> switches;
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SoftSwitch CXROM {"CXROM", 0xC006, 0xC007, 0xC015, false, switches};
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SoftSwitch STORE80 {"STORE80", 0xC000, 0xC001, 0xC018, false, switches};
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SoftSwitch RAMRD {"RAMRD", 0xC002, 0xC003, 0xC013, false, switches};
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SoftSwitch RAMWRT {"RAMWRT", 0xC004, 0xC005, 0xC014, false, switches};
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SoftSwitch ALTZP {"ALTZP", 0xC008, 0xC009, 0xC016, false, switches};
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SoftSwitch C3ROM {"C3ROM", 0xC00A, 0xC00B, 0xC017, false, switches};
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SoftSwitch ALTCHAR {"ALTCHAR", 0xC00E, 0xC00F, 0xC01E, false, switches};
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SoftSwitch VID80 {"VID80", 0xC00C, 0xC00D, 0xC01F, false, switches};
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SoftSwitch TEXT {"TEXT", 0xC050, 0xC051, 0xC01A, true, switches};
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SoftSwitch MIXED {"MIXED", 0xC052, 0xC053, 0xC01B, true, switches};
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SoftSwitch PAGE2 {"PAGE2", 0xC054, 0xC055, 0xC01C, true, switches};
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SoftSwitch HIRES {"HIRES", 0xC056, 0xC057, 0xC01D, true, switches};
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set<int> ignore_mmio = {0xC058, 0xC05A, 0xC05D, 0xC05F, 0xC061, 0xC062};
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MAINboard(unsigned char rom[32768])
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{
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memcpy(rom_bytes, rom + rom_base - 0x8000 , sizeof(rom_bytes));
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memcpy(irom_bytes, rom + irom_base - 0x8000 , sizeof(irom_bytes));
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memset(ram_bytes, 0x76, sizeof(ram_bytes));
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memset(ram_bytes, 0x00, sizeof(ram_bytes));
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}
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static const int RDCXROM = 0xC015;
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static const int SETINTCXROM = 0xC007;
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static const int TXTSET = 0xC051;
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static const int TXTPAGE1 = 0xC054;
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static const int LORES = 0xC056;
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virtual bool read(int addr, unsigned char &data)
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{
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if(debug & DEBUG_RW) printf("MAIN board read\n");
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if(addr >= io_base && addr < io_base + io_size) {
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switch(addr) {
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case RDCXROM:
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printf("RD CXROM\n");
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data = CXROM_is_active ? 0x80 : 0x00;
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for(auto it = switches.begin(); it != switches.end(); it++) {
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SoftSwitch* sw = *it;
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if(addr == sw->read_address) {
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data = sw->sw ? 0x80 : 0x00;
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printf("Read status of %s = %02X\n", sw->name.c_str(), data);
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return true;
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break;
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case TXTSET:
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printf("RD TXTSET\n");
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break;
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case TXTPAGE1:
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printf("RD TXTPAGE1\n");
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break;
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case LORES:
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printf("RD LORES\n");
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break;
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default:
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printf("unhandled MMIO RD %04X\n", addr);
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exit(0);
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break;
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} else if(sw->read_also_changes && addr == sw->set_address) {
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data = 0xff;
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sw->sw = true;
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printf("Set %s\n", sw->name.c_str());
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return true;
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} else if(sw->read_also_changes && addr == sw->clear_address) {
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data = 0xff;
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sw->sw = false;
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printf("Clear %s\n", sw->name.c_str());
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return true;
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}
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}
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if(ignore_mmio.find(addr) != ignore_mmio.end()) {
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printf("read %04X, ignored, return 0x00\n", addr);
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data = 0x00;
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return true;
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}
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if(addr == 0xC000) {
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printf("read KBD, force 0x00\n");
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data = 0x00;
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return true;
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}
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if(addr == 0xC010) {
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printf("read KBDSTRB, force 0x00\n");
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// reset keyboard latch
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data = 0x00;
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return true;
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}
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printf("unhandled MMIO Read at %04X\n", addr);
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exit(0);
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}
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if(ROM_is_active && addr >= irom_base && addr < irom_base + sizeof(irom_bytes)) {
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if(CXROM && addr >= irom_base && addr < irom_base + sizeof(irom_bytes)) {
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data = irom_bytes[addr - irom_base];
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if(debug & DEBUG_RW) printf("read 0x%04X -> 0x%02X from internal ROM\n", addr, data);
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return true;
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}
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if(ROM_is_active && addr >= rom_base && addr < rom_base + sizeof(rom_bytes)) {
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if(addr >= rom_base && addr < rom_base + sizeof(rom_bytes)) {
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data = rom_bytes[addr - rom_base];
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if(debug & DEBUG_RW) printf("read 0x%04X -> 0x%02X from ROM\n", addr, data);
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return true;
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@ -84,35 +173,39 @@ struct MAINboard : board_base
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{
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if(addr >= text1_base && addr < text1_base + text1_size) {
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printf("TEXT1 WRITE!\n");
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exit(0);
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textport_change(ram_bytes);
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}
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if(addr >= text2_base && addr < text2_base + text2_size) {
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printf("TEXT2 WRITE!\n");
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exit(0);
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}
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if(addr >= io_base && addr < io_base + io_size) {
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switch(addr) {
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case SETINTCXROM:
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printf("WR SETINTCXROM\n");
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CXROM_is_active = true;
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case TXTSET:
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printf("WR TXTSET\n");
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break;
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case TXTPAGE1:
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printf("WR TXTPAGE1\n");
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break;
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case LORES:
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printf("WR LORES\n");
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break;
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default:
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printf("unhandled MMIO %04X write\n", addr);
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exit(0);
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for(auto it = switches.begin(); it != switches.end(); it++) {
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SoftSwitch* sw = *it;
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if(addr == sw->set_address) {
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data = 0xff;
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sw->sw = true;
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printf("Set %s\n", sw->name.c_str());
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return true;
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} else if(addr == sw->clear_address) {
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data = 0xff;
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sw->sw = false;
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printf("Clear %s\n", sw->name.c_str());
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return true;
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}
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}
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if(addr == 0xC010) {
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printf("write KBDSTRB\n");
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// reset keyboard latch
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return true;
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}
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printf("unhandled MMIO Write at %04X\n", addr);
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exit(0);
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}
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if(ROM_is_active && addr >= rom_base && addr < rom_base + sizeof(rom_bytes)) {
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if(addr >= rom_base && addr < rom_base + sizeof(rom_bytes)) {
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return false;
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}
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if(ROM_is_active && addr >= irom_base && addr < irom_base + sizeof(irom_bytes)) {
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if(CXROM && addr >= irom_base && addr < irom_base + sizeof(irom_bytes)) {
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return false;
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}
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if(addr >= 0 && addr < sizeof(ram_bytes)) {
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@ -259,15 +352,76 @@ struct CPU6502
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unsigned char inst = read_pc_inc(bus);
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switch(inst) {
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case 0xEA: {
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if(debug & DEBUG_DECODE) printf("NOP\n");
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break;
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}
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case 0x8A: {
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if(debug & DEBUG_DECODE) printf("TXA\n");
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a = x;
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flag_change(Z, a == 0x00);
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flag_change(N, a & 0x80);
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break;
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}
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case 0xAA: {
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if(debug & DEBUG_DECODE) printf("TAX\n");
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x = a;
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flag_change(Z, x == 0x00);
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flag_change(N, x & 0x80);
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break;
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}
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case 0xA8: {
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if(debug & DEBUG_DECODE) printf("TAY\n");
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y = a;
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flag_change(Z, y == 0x00);
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flag_change(N, y & 0x80);
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break;
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}
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case 0x98: {
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if(debug & DEBUG_DECODE) printf("TYA\n");
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a = y;
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flag_change(Z, a == 0x00);
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flag_change(N, a & 0x80);
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break;
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}
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case 0x18: {
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if(debug & DEBUG_DECODE) printf("CLC\n");
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flag_clear(C);
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break;
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}
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case 0x38: {
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if(debug & DEBUG_DECODE) printf("SEC\n");
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flag_set(C);
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break;
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}
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case 0xD8: {
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if(debug & DEBUG_DECODE) printf("CLD\n");
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flag_clear(D);
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break;
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}
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case 0x58: {
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if(debug & DEBUG_DECODE) printf("CLI\n");
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flag_clear(I);
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break;
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}
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case 0x78: {
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if(debug & DEBUG_DECODE) printf("SEI\n");
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flag_set(I);
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break;
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}
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case 0xCE: {
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int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
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if(debug & DEBUG_DECODE) printf("DEC %02X, Y\n", addr);
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if(debug & DEBUG_DECODE) printf("DEC %02X\n", addr);
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unsigned char m = bus.read(addr) - 1;
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flag_change(Z, m == 0);
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flag_change(N, m & 0x80);
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@ -275,6 +429,14 @@ struct CPU6502
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break;
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}
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case 0x10: {
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int rel = (read_pc_inc(bus) + 128) % 256 - 128;
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if(debug & DEBUG_DECODE) printf("BPL %02X\n", rel);
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if(!isset(N))
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pc += rel;
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break;
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}
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case 0x30: {
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int rel = (read_pc_inc(bus) + 128) % 256 - 128;
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if(debug & DEBUG_DECODE) printf("BMI %02X\n", rel);
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@ -283,15 +445,49 @@ struct CPU6502
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break;
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}
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case 0xA5: {
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unsigned char zpg = read_pc_inc(bus);
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if(debug & DEBUG_DECODE) printf("LDA %02X\n", zpg);
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a = bus.read(zpg);
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flag_change(Z, a == 0x00);
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flag_change(N, a & 0x80);
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break;
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}
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case 0xB9: {
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int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
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if(debug & DEBUG_DECODE) printf("LDA %02X, Y\n", addr);
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if(debug & DEBUG_DECODE) printf("LDA %04X, Y\n", addr);
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a = bus.read(addr + y);
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flag_change(Z, a == 0x00);
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flag_change(N, a & 0x80);
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break;
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}
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case 0x65: {
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unsigned char zpg = read_pc_inc(bus);
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if(debug & DEBUG_DECODE) printf("ADC %02X\n", zpg);
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unsigned char m = bus.read(zpg);
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int carry = isset(C) ? 1 : 0;
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flag_change(C, (int)(a + m + carry) > 0xFF);
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a = a + m + carry;
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flag_change(N, a & 0x80);
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flag_change(V, isset(C) != isset(N));
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flag_change(Z, a == 0);
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break;
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}
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case 0xE9: {
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unsigned char imm = read_pc_inc(bus);
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if(debug & DEBUG_DECODE) printf("SBC %02X\n", imm);
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int borrow = isset(C) ? 0 : 1;
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flag_change(C, !(a < imm - borrow));
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a = a - imm - borrow;
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flag_change(N, a & 0x80);
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flag_change(V, isset(C) != isset(N));
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flag_change(Z, a == 0);
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break;
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}
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case 0x69: {
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unsigned char imm = read_pc_inc(bus);
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if(debug & DEBUG_DECODE) printf("ADC %02X\n", imm);
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@ -304,8 +500,17 @@ struct CPU6502
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break;
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}
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case 0x0A: {
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if(debug & DEBUG_DECODE) printf("ASL A\n");
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flag_change(C, a & 0x80);
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a = a << 1;
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flag_change(N, a & 0x80);
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flag_change(Z, a == 0);
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break;
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}
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case 0x4A: {
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if(debug & DEBUG_DECODE) printf("LSR\n");
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if(debug & DEBUG_DECODE) printf("LSR A\n");
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flag_change(C, a & 0x01);
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a = a >> 1;
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flag_change(N, a & 0x80);
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|
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@ -327,9 +532,19 @@ struct CPU6502
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break;
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}
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case 0x05: {
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unsigned char zpg = read_pc_inc(bus);
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if(debug & DEBUG_DECODE) printf("ORA %02X\n", zpg);
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unsigned char m = bus.read(zpg);
|
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a = a | m;
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flag_change(Z, a == 0x00);
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flag_change(N, a & 0x80);
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break;
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}
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|
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case 0x09: {
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unsigned char imm = read_pc_inc(bus);
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if(debug & DEBUG_DECODE) printf("OR %02X\n", imm);
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if(debug & DEBUG_DECODE) printf("ORA %02X\n", imm);
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a = a | imm;
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flag_change(Z, a == 0x00);
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flag_change(N, a & 0x80);
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|
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@ -373,6 +588,16 @@ struct CPU6502
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break;
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}
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|
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case 0x6C: {
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int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
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unsigned char addrl = bus.read(addr);
|
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unsigned char addrh = bus.read(addr + 1);
|
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addr = addrl + addrh * 256;
|
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if(debug & DEBUG_DECODE) printf("JMP %04X\n", addr);
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pc = addr;
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break;
|
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}
|
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|
||||
case 0x8D: {
|
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int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
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if(debug & DEBUG_DECODE) printf("STA %04X\n", addr);
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|
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@ -386,6 +611,12 @@ struct CPU6502
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break;
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}
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|
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case 0x28: {
|
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if(debug & DEBUG_DECODE) printf("PLP\n");
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p = stack_pull(bus);
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break;
|
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}
|
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|
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case 0x2C: {
|
||||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||||
if(debug & DEBUG_DECODE) printf("BIT #%04X\n", addr);
|
||||
|
|
@ -396,6 +627,24 @@ struct CPU6502
|
|||
break;
|
||||
}
|
||||
|
||||
case 0xAC: {
|
||||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||||
if(debug & DEBUG_DECODE) printf("LDY %04X\n", addr);
|
||||
y = bus.read(addr);
|
||||
flag_change(N, y & 0x80);
|
||||
flag_change(Z, y == 0);
|
||||
break;
|
||||
}
|
||||
|
||||
case 0xA2: {
|
||||
unsigned char imm = read_pc_inc(bus);
|
||||
if(debug & DEBUG_DECODE) printf("LDX #%02X\n", imm);
|
||||
x = imm;
|
||||
flag_change(N, x & 0x80);
|
||||
flag_change(Z, x == 0);
|
||||
break;
|
||||
}
|
||||
|
||||
case 0xA0: {
|
||||
unsigned char imm = read_pc_inc(bus);
|
||||
if(debug & DEBUG_DECODE) printf("LDY #%02X\n", imm);
|
||||
|
|
@ -423,11 +672,31 @@ struct CPU6502
|
|||
break;
|
||||
}
|
||||
|
||||
case 0xC0: {
|
||||
unsigned char imm = read_pc_inc(bus);
|
||||
if(debug & DEBUG_DECODE) printf("CPY %02X\n", imm);
|
||||
flag_change(C, imm <= a);
|
||||
imm = a - imm;
|
||||
flag_change(N, imm & 0x80);
|
||||
flag_change(Z, imm == 0);
|
||||
break;
|
||||
}
|
||||
|
||||
case 0xC9: {
|
||||
unsigned char imm = read_pc_inc(bus);
|
||||
if(debug & DEBUG_DECODE) printf("CMP #%02X\n", imm);
|
||||
flag_change(C, imm <= a);
|
||||
imm = a - imm;
|
||||
flag_change(N, imm & 0x80);
|
||||
flag_change(Z, imm == 0);
|
||||
break;
|
||||
}
|
||||
|
||||
case 0xD5: {
|
||||
unsigned char zpg = read_pc_inc(bus) + x;
|
||||
if(debug & DEBUG_DECODE) printf("CMP %02X\n", zpg);
|
||||
unsigned char m = bus.read(zpg);
|
||||
flag_change(N, m < a);
|
||||
flag_change(C, m <= a);
|
||||
m = a - m;
|
||||
flag_change(N, m & 0x80);
|
||||
flag_change(Z, m == 0);
|
||||
|
|
@ -477,7 +746,21 @@ struct CPU6502
|
|||
if(debug & DEBUG_DECODE) printf("RTS\n");
|
||||
unsigned char pcl = stack_pull(bus);
|
||||
unsigned char pch = stack_pull(bus);
|
||||
pc = pcl + pch * 256;
|
||||
pc = pcl + pch * 256 + 1;
|
||||
break;
|
||||
}
|
||||
|
||||
case 0x95: {
|
||||
unsigned char zpg = read_pc_inc(bus);
|
||||
if(debug & DEBUG_DECODE) printf("STA %02X,X\n", zpg);
|
||||
bus.write((zpg + x) % 0x100, a);
|
||||
break;
|
||||
}
|
||||
|
||||
case 0x94: {
|
||||
unsigned char zpg = read_pc_inc(bus);
|
||||
if(debug & DEBUG_DECODE) printf("STY %02X,X\n", zpg);
|
||||
bus.write((zpg + x) % 0x100, y);
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -488,9 +771,16 @@ struct CPU6502
|
|||
break;
|
||||
}
|
||||
|
||||
case 0x8C: {
|
||||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||||
if(debug & DEBUG_DECODE) printf("STY %04X\n", addr);
|
||||
bus.write(addr, y);
|
||||
break;
|
||||
}
|
||||
|
||||
case 0x20: {
|
||||
stack_push(bus, (pc + 2) >> 8);
|
||||
stack_push(bus, (pc + 2) & 0xFF);
|
||||
stack_push(bus, (pc + 1) >> 8);
|
||||
stack_push(bus, (pc + 1) & 0xFF);
|
||||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||||
if(debug & DEBUG_DECODE) printf("JSR %04X\n", addr);
|
||||
pc = addr;
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user