mirror of
https://github.com/bradgrantham/apple2e.git
synced 2024-12-29 14:29:53 +00:00
make some consts constexpr and int for warnings
This commit is contained in:
parent
2022b375bd
commit
ca58c87abf
158
apple2e.cpp
158
apple2e.cpp
@ -2,6 +2,7 @@
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#include <cassert>
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#include <cmath>
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#include <cstring>
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#include <array>
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#include <string>
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#include <set>
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#include <chrono>
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@ -200,7 +201,7 @@ struct region
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int size;
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bool contains(int addr) const
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{
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return addr >= base && addr < base + size;
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return (addr >= base) && (addr < base + size);
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}
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};
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@ -241,7 +242,7 @@ struct backed_region : region
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bool contains(int addr) const
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{
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return addr >= base && addr < base + size;
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return (addr >= base) && (addr < base + size);
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}
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bool read(int addr, unsigned char& data)
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@ -365,16 +366,16 @@ void floppy_NybblizeImage(const unsigned char *image, unsigned char *nybblized,
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// XXX readonly at this time
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struct DISKIIboard : board_base
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{
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const unsigned int CA0 = 0xC0E0; // stepper phase 0 / control line 0
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const unsigned int CA1 = 0xC0E2; // stepper phase 1 / control line 1
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const unsigned int CA2 = 0xC0E4; // stepper phase 2 / control line 2
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const unsigned int CA3 = 0xC0E6; // stepper phase 3 / control strobe
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const unsigned int ENABLE = 0xC0E8; // disk drive off/on
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const unsigned int SELECT = 0xC0EA; // select drive 1/2
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const unsigned int Q6L = 0xC0EC; // IO strobe for read
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const unsigned int Q6H = 0xC0ED; // IO strobe for write
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const unsigned int Q7L = 0xC0EE; // IO strobe for clear
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const unsigned int Q7H = 0xC0EF; // IO strobe for shift
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static constexpr int CA0 = 0xC0E0; // stepper phase 0 / control line 0
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static constexpr int CA1 = 0xC0E2; // stepper phase 1 / control line 1
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static constexpr int CA2 = 0xC0E4; // stepper phase 2 / control line 2
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static constexpr int CA3 = 0xC0E6; // stepper phase 3 / control strobe
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static constexpr int ENABLE = 0xC0E8; // disk drive off/on
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static constexpr int SELECT = 0xC0EA; // select drive 1/2
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static constexpr int Q6L = 0xC0EC; // IO strobe for read
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static constexpr int Q6H = 0xC0ED; // IO strobe for write
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static constexpr int Q7L = 0xC0EE; // IO strobe for clear
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static constexpr int Q7H = 0xC0EF; // IO strobe for shift
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map<unsigned int, string> io = {
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{0xC0E0, "CA0OFF"},
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@ -397,8 +398,8 @@ struct DISKIIboard : board_base
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backed_region rom_C600 = {"rom_C600", 0xC600, 0x0100, ROM, nullptr, [&]{return true;}};
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unsigned char floppy_image[2][143360];
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unsigned char floppy_nybblized[2][232960];
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unsigned char *floppy_image[2]; // [143360];
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unsigned char *floppy_nybblized[2]; // [232960];
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const unsigned int bytes_per_nybblized_track = 6656;
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bool floppy_present[2];
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@ -415,7 +416,7 @@ struct DISKIIboard : board_base
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{
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floppy_present[number] = false;
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if(name) {
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if(!read_blob(name, floppy_image[number], sizeof(floppy_image[0])))
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if(!read_blob(name, floppy_image[number], 143360 /*sizeof(floppy_image[0])*/))
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throw "Couldn't read floppy";
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floppy_present[number] = true;
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@ -437,9 +438,29 @@ struct DISKIIboard : board_base
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floppy_activity(floppy_activity_)
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{
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std::copy(diskII_rom, diskII_rom + 0x100, rom_C600.memory.begin());
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if(floppy0_name) {
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floppy_image[0] = new unsigned char[143360];
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if(!floppy_image[0]) {
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throw "failed to allocate floppy_image[0]";
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}
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floppy_nybblized[0] = new unsigned char[232960];
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if(!floppy_nybblized[0]) {
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throw "failed to allocate floppy_nybblized[0]";
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}
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set_floppy(0, floppy0_name);
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}
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if(floppy1_name) {
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floppy_image[1] = new unsigned char[143360];
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if(!floppy_image[1]) {
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throw "failed to allocate floppy_image[1]";
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}
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floppy_nybblized[1] = new unsigned char[232960];
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if(!floppy_nybblized[1]) {
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throw "failed to allocate floppy_nybblized[1]";
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}
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set_floppy(1, floppy1_name);
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}
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}
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unsigned char read_next_nybblized_byte()
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{
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@ -707,6 +728,7 @@ struct MAINboard : board_base
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vector<SoftSwitch*> switches;
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SoftSwitch* switches_by_address[256];
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// SoftSwitch(const char* name_, int clear, int on, int read, bool read_changes, vector<SoftSwitch*>& s, bool implemented_ = false) :
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// Inside the Apple //e, page 379
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SoftSwitch CXROM {"CXROM", 0xC006, 0xC007, 0xC015, false, switches, true};
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SoftSwitch STORE80 {"STORE80", 0xC000, 0xC001, 0xC018, false, switches, true};
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SoftSwitch RAMRD {"RAMRD", 0xC002, 0xC003, 0xC013, false, switches, true};
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@ -721,17 +743,50 @@ struct MAINboard : board_base
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SoftSwitch HIRES {"HIRES", 0xC056, 0xC057, 0xC01D, true, switches, true};
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vector<backed_region*> regions;
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vector<backed_region*> regions_by_page[256];
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std::array<backed_region*,256> read_regions_by_page;
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std::array<backed_region*,256> write_regions_by_page;
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void repage_regions(const char *reason)
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{
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std::fill(read_regions_by_page.begin(), read_regions_by_page.end(), nullptr);
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std::fill(write_regions_by_page.begin(), write_regions_by_page.end(), nullptr);
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for(auto* r : regions) {
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int firstpage = r->base / 256;
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int lastpage = (r->base + r->size - 1) / 256;
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if((r->type == RAM) && r->write_enabled()) {
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for(int i = firstpage; i <= lastpage; i++) {
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if(write_regions_by_page[i] != nullptr) {
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if(0)printf("warning, write region for 0x%02X00 setting for \"%s\" but was already filled by \"%s\"; repaged because \"%s\"\n",
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i, r->name.c_str(), write_regions_by_page[i]->name.c_str(), reason);
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} else {
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write_regions_by_page[i] = r;
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}
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}
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}
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if(r->read_enabled()) {
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for(int i = firstpage; i <= lastpage; i++) {
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if(read_regions_by_page[i] != nullptr) {
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if(0)printf("warning, read region for 0x%02X00 setting for \"%s\" but was already filled by \"%s\"; repaged because \"%s\"\n",
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i, r->name.c_str(), read_regions_by_page[i]->name.c_str(), reason);
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} else {
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read_regions_by_page[i] = r;
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}
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}
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}
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}
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}
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backed_region szp = {"szp", 0x0000, 0x0200, RAM, ®ions, [&](){return !ALTZP;}}; // stack and zero page
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backed_region aszp = {"aszp", 0x0000, 0x0200, RAM, ®ions, [&](){return ALTZP;}}; // alternate stack and zero page
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enabled_func always_disabled = []{return false;};
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bool internal_C800_ROM_selected;
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backed_region rom_C100 = {"rom_C100", 0xC100, 0x0200, ROM, ®ions, [&]{return CXROM;}};
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backed_region rom_C300 = {"rom_C300", 0xC300, 0x0100, ROM, ®ions, [&]{return CXROM || (!CXROM && !C3ROM);}};
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backed_region rom_C400 = {"rom_C400", 0xC300, 0x0400, ROM, ®ions, [&]{return CXROM;}};
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backed_region rom_C800 = {"rom_C800", 0xC800, 0x0800, ROM, ®ions, [&]{return CXROM || (!CXROM && !C3ROM && internal_C800_ROM_selected);}};
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backed_region rom_CXXX_default = {"rom_CXXX_default", 0xC100, 0x0F00, ROM, ®ions, [&]{return true;}};
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backed_region rom_C100 = {"rom_C100", 0xC100, 0x0200, ROM, ®ions, [&]{return CXROM;}, always_disabled};
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backed_region rom_C300 = {"rom_C300", 0xC300, 0x0100, ROM, ®ions, [&]{return CXROM || (!CXROM && !C3ROM);}, always_disabled};
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backed_region rom_C400 = {"rom_C400", 0xC400, 0x0400, ROM, ®ions, [&]{return CXROM;}, always_disabled};
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backed_region rom_C800 = {"rom_C800", 0xC800, 0x0800, ROM, ®ions, [&]{return CXROM || (!CXROM && !C3ROM && internal_C800_ROM_selected);}, always_disabled};
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backed_region rom_CXXX_default = {"rom_CXXX_default", 0xC100, 0x0F00, ROM, ®ions, [&]{return true;}, always_disabled};
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enabled_func read_from_aux_ram = [&]{return RAMRD;};
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enabled_func write_to_aux_ram = [&]{return RAMWRT;};
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@ -749,8 +804,8 @@ struct MAINboard : board_base
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bool C08X_write_RAM;
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enum {BANK1, BANK2} C08X_bank;
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backed_region rom_D000 = {"rom_D000", 0xD000, 0x1000, ROM, ®ions, [&]{return !C08X_read_RAM;}};
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backed_region rom_E000 = {"rom_E000", 0xE000, 0x2000, ROM, ®ions, [&]{return !C08X_read_RAM;}};
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backed_region rom_D000 = {"rom_D000", 0xD000, 0x1000, ROM, ®ions, [&]{return !C08X_read_RAM;}, always_disabled};
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backed_region rom_E000 = {"rom_E000", 0xE000, 0x2000, ROM, ®ions, [&]{return !C08X_read_RAM;}, always_disabled};
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backed_region ram1_main_D000 = {"ram1_main_D000", 0xD000, 0x1000, RAM, ®ions, [&]{return !ALTZP && C08X_read_RAM && (C08X_bank == BANK1);}, [&]{return !ALTZP && C08X_write_RAM && (C08X_bank == BANK1);}};
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backed_region ram2_main_D000 = {"ram2_main_D000", 0xD000, 0x1000, RAM, ®ions, [&]{return !ALTZP && C08X_read_RAM && (C08X_bank == BANK2);}, [&]{return !ALTZP && C08X_write_RAM && (C08X_bank == BANK2);}};
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@ -895,13 +950,8 @@ struct MAINboard : board_base
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std::copy(rom_image + rom_C400.base - 0x8000, rom_image + rom_C400.base - 0x8000 + rom_C400.size, rom_C400.memory.begin());
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std::copy(rom_image + rom_C800.base - 0x8000, rom_image + rom_C800.base - 0x8000 + rom_C800.size, rom_C800.memory.begin());
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for(auto r : regions) {
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int firstpage = r->base / 256;
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int lastpage = (r->base + r->size + 255) / 256 - 1;
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for(int i = firstpage; i <= lastpage; i++) {
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regions_by_page[i].push_back(r);
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}
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}
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repage_regions("init");
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for(int i = 0; i < 256; i++)
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switches_by_address[i] = NULL;
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for(auto sw : switches) {
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@ -931,6 +981,7 @@ struct MAINboard : board_base
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C08X_read_RAM = false;
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C08X_write_RAM = true;
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internal_C800_ROM_selected = true;
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repage_regions("reset");
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}
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bool read(int addr, unsigned char &data)
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@ -941,19 +992,19 @@ struct MAINboard : board_base
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return true;
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}
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}
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for(auto r : regions_by_page[addr / 256]) {
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if(r->read(addr, data)) {
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if(debug & DEBUG_RW) printf("read 0x%04X -> 0x%02X from %s\n", addr, data, r->name.c_str());
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auto* r = read_regions_by_page[addr / 256];
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if(r) {
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data = r->memory[addr - r->base];
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if(debug & DEBUG_RW) printf("read %02X from 0x%04X in %s\n", addr, data, r->name.c_str());
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return true;
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}
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}
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if(io_region.contains(addr)) {
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if(exit_on_banking && (banking_read_switches.find(addr) != banking_read_switches.end())) {
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printf("bank switch control %04X, aborting\n", addr);
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exit(1);
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}
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SoftSwitch* sw = switches_by_address[addr - 0xC000];
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if(sw != NULL) {
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if(sw != nullptr) {
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unsigned char result = 0xFF;
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@ -1032,6 +1083,7 @@ struct MAINboard : board_base
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C08X_read_RAM = !read_ROM;
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if(debug & DEBUG_SWITCH) printf("write %04X switch, %s, %d write_RAM, %d read_RAM\n", addr, (C08X_bank == BANK1) ? "BANK1" : "BANK2", C08X_write_RAM, C08X_read_RAM);
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data = 0x00;
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repage_regions("C08x write");
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return true;
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} else if(addr == 0xC011) {
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data = (C08X_bank == BANK2) ? 0x80 : 0x0;
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@ -1105,11 +1157,17 @@ struct MAINboard : board_base
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}
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if((addr & 0xFF00) == 0xC300) {
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if(debug & DEBUG_SWITCH) printf("read 0x%04X, enabling internal C800 ROM\n", addr);
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if(!internal_C800_ROM_selected) {
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internal_C800_ROM_selected = true;
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repage_regions("C3xx write");
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}
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}
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if(addr == 0xCFFF) {
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if(debug & DEBUG_SWITCH) printf("read 0xCFFF, disabling internal C800 ROM\n");
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if(internal_C800_ROM_selected) {
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internal_C800_ROM_selected = false;
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repage_regions("C3FF write");
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}
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}
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if(debug & DEBUG_WARN) printf("unhandled memory read at %04X\n", addr);
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if(exit_on_memory_fallthrough) {
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@ -1214,30 +1272,20 @@ struct MAINboard : board_base
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#endif
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{
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display_write(addr, write_to_aux_text1(), data);
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if(false && (addr >= 0x2000) && (addr <= 0x3FFF)) {
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static FILE* memoryWritesFile = NULL;
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if(memoryWritesFile == NULL) {
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memoryWritesFile = fopen("memorydump.bin", "wb");
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}
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unsigned long long c = clk * 1000000 / 14318;
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uint16_t a = addr;
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uint16_t d = data;
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fwrite(&c, sizeof(c), 1, memoryWritesFile);
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fwrite(&a, sizeof(a), 1, memoryWritesFile);
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fwrite(&d, sizeof(d), 1, memoryWritesFile);
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// printf(" { %lld, 0x%04X, 0x%02X }\n", clk * 1000000 / 14318, addr, data);
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}
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}
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for(auto b : boards) {
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if(b->write(addr, data)) {
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return true;
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}
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}
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for(auto r : regions_by_page[addr / 256]) {
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if(r->write(addr, data)) {
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auto* r = write_regions_by_page[addr / 256];
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if(r) {
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if(debug & DEBUG_RW) printf("wrote %02X to 0x%04X in %s\n", addr, data, r->name.c_str());
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return true;
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if((addr - r->base < 0) || (addr - r->base > r->size)) {
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printf("write to %d outside region \"%s\", base %d, size %d\n", addr, r->name.c_str(), r->base, r->size);
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}
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r->memory[addr - r->base] = data;
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return true;
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}
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if(io_region.contains(addr)) {
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if(exit_on_banking && (banking_write_switches.find(addr) != banking_write_switches.end())) {
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@ -1253,6 +1301,8 @@ struct MAINboard : board_base
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sw->enabled = true;
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if(debug & DEBUG_SWITCH) printf("Set %s\n", sw->name.c_str());
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post_soft_switch_mode_change();
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static char reason[512]; sprintf(reason, "set %s", sw->name.c_str());
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repage_regions(reason);
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}
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return true;
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} else if(addr == sw->clear_address) {
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@ -1262,6 +1312,8 @@ struct MAINboard : board_base
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sw->enabled = false;
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if(debug & DEBUG_SWITCH) printf("Clear %s\n", sw->name.c_str());
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post_soft_switch_mode_change();
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static char reason[512]; sprintf(reason, "clear %s", sw->name.c_str());
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repage_regions(reason);
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}
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return true;
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}
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@ -1273,6 +1325,7 @@ struct MAINboard : board_base
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C08X_read_RAM = !read_ROM;
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if(debug & DEBUG_SWITCH) printf("write %04X switch, %s, %d write_RAM, %d read_RAM\n", addr, (C08X_bank == BANK1) ? "BANK1" : "BANK2", C08X_write_RAM, C08X_read_RAM);
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data = 0x00;
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repage_regions("C08x write");
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return true;
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}
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if(addr == 0xC010) {
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@ -1706,8 +1759,9 @@ int main(int argc, char **argv)
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const char *romname = argv[0];
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unsigned char b[32768];
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if(!read_blob(romname, b, sizeof(b)))
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if(!read_blob(romname, b, sizeof(b))) {
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exit(EXIT_FAILURE);
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}
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unsigned char diskII_rom[256];
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if(diskII_rom_name != NULL) {
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