Files
Stefan ArentzandClaude Fable 5 235da01007 Phase 5: headless Apple ][+ machine
Ports the machine half of two.c and the language card:

- two.rs: Two implements Bus with the ewm_two_init memory map — 48K
  RAM, the six AppleSoft/Autostart ROMs at $D000-$FFFF (embedded),
  and the full $C000-$C07F soft-switch dispatch: keyboard latch and
  strobe, TEXT/GRAPHICS, LGR/HGR, FULL/MIXED, PAGE1/PAGE2, speaker
  toggle recording at $C030, annunciators, buttons $C060-$C063,
  and the paddle trigger/timers at $C070/$C064-$C065 (including
  two.c's PADL1 never clearing its timer). apple2 and apple2e return
  an error, per quirk #4. Speaker and paddle timestamps come from a
  cycles field the run loop mirrors from cpu.counter, since the C
  handlers read cpu->counter and the Bus trait has no CPU access.
- two.rs: Two::text_screen() decodes the interleaved $0400 text page
  — the workhorse assertion helper for all later headless gates.
- alc.rs: the language card from alc.c as plain state consulted by
  Two's bus dispatch: bank select on bit 3, write-enable only after
  two consecutive switch reads (writes reset the count and the
  $C081/$C083 read cases preserve a previously enabled write flag),
  reads falling through to ROM when read-disabled, and writes
  swallowed when write-disabled.
- tests/two_boot.rs: boots to the APPLE ][ banner and ] prompt with
  no disk card, types PRINT 2+2 through the key latch and asserts 4;
  plus language-card tests for initial state, double-read write
  enable, count reset on switch write, bank separation and shared
  $E000 RAM, cycle-stamped speaker toggles, and the apple2/apple2e
  error.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
2026-07-05 10:13:47 -04:00
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