398 lines
9.2 KiB
Go
398 lines
9.2 KiB
Go
package goapple2
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import (
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"fmt"
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"io/ioutil"
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"log"
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"path/filepath"
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"strconv"
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"github.com/zellyn/go6502/cpu"
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"github.com/zellyn/goapple2/cards"
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"github.com/zellyn/goapple2/videoscan"
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)
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type PCActionType int
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const (
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ActionDumpMem PCActionType = iota + 1
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ActionLogRegisters
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ActionTrace
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ActionSetLimit
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ActionHere
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ActionDiskStatus
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ActionCallback
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)
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type PCAction struct {
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Type PCActionType
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String string
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Mask byte
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Masked byte
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Delay uint64
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Callback func()
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}
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// Apple II struct
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type Apple2 struct {
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mem [65536]byte
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cpu cpu.Cpu
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key byte // BUG(zellyn): make reads/writes atomic
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keys chan byte
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plotter videoscan.Plotter
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scanner *videoscan.Scanner
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Done bool
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lastRead byte
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cards [8]cards.Card "Peripheral cards"
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cardMask byte
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cardRomMask byte
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cardRomConflict bool "True if more than one card is handling the 2k ROM area"
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cardRomHandler byte
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card12kMask byte
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card12kConflict bool "True if more than one card is handling the 12k ROM area"
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card12kHandler byte
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cardTickerMask byte
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pcActions map[uint16][]*PCAction
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limit int
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cycle uint64
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}
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// Option is an optional param to NewApple2.
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type Option func(*Apple2)
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func WithRAM(address uint16, bytes []byte) Option {
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return func(a2 *Apple2) {
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copy(a2.mem[address:], bytes)
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}
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}
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func NewApple2(p videoscan.Plotter, rom []byte, charRom [2048]byte, options ...Option) *Apple2 {
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a2 := &Apple2{
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// BUG(zellyn): this is not how the apple2 keyboard actually works
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keys: make(chan byte, 16),
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pcActions: make(map[uint16][]*PCAction),
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}
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copy(a2.mem[len(a2.mem)-len(rom):len(a2.mem)], rom)
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a2.scanner = videoscan.NewScanner(a2, p, charRom)
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a2.cpu = cpu.NewCPU(a2, a2.Tick, cpu.VERSION_6502)
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for _, o := range options {
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o(a2)
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}
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a2.cpu.Reset()
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return a2
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}
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func (a2 *Apple2) AddCard(card cards.Card) error {
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slot := card.Slot()
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slotbit := byte(1 << slot)
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if slotbit&a2.cardMask > 0 {
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return fmt.Errorf("Slot %d already has a card: %s", slot, a2.cards[slot])
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}
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a2.cardMask |= slotbit
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if card.WantTicker() {
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a2.cardTickerMask |= slotbit
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}
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a2.cards[slot] = card
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card.Init()
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return nil
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}
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func (a2 *Apple2) handleCardRom(address uint16, value byte, write bool) byte {
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return a2.EmptyRead()
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}
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func (a2 *Apple2) handleC00X(address uint16, value byte, write bool) byte {
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if address < 0xC080 {
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switch address & 0xC0F0 {
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// $C00X: Read keyboard
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case 0xC000:
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if a2.key&0x80 == 0 {
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select {
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case key := <-a2.keys:
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a2.key = key
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default:
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}
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}
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return a2.key
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// $C01X: Reset keyboard
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case 0xC010:
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a2.key &= 0x7F
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return a2.EmptyRead()
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}
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switch address {
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case 0xC050: // GRAPHICS
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// fmt.Printf("$%04X: GRAPHICS\n", a2.cpu.PC())
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a2.scanner.SetGraphics(true)
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case 0xC051: // TEXT
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// fmt.Printf("$%04X: NO GRAPHICS\n", a2.cpu.PC())
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a2.scanner.SetGraphics(false)
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case 0xC052: // NOMIX
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// fmt.Printf("$%04X: NOMIX\n", a2.cpu.PC())
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a2.scanner.SetMix(false)
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case 0xC053: // MIX
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// fmt.Printf("$%04X: MIX\n", a2.cpu.PC())
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a2.scanner.SetMix(true)
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case 0xC054: // PAGE 1
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// fmt.Printf("$%04X: PAGE1\n", a2.cpu.PC())
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a2.scanner.SetPage(1)
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case 0xC055: // PAGE 2
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// fmt.Printf("$%04X: PAGE2\n", a2.cpu.PC())
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a2.scanner.SetPage(2)
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case 0xC056: // LORES
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// fmt.Printf("$%04X: LORES\n", a2.cpu.PC())
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a2.scanner.SetHires(false)
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case 0xC057: // HIRES
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// fmt.Printf("$%04X: HIRES\n", a2.cpu.PC())
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a2.scanner.SetHires(true)
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}
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}
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if address < 0xC080 {
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return a2.EmptyRead()
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}
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if address < 0xC100 {
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slot := byte((address - 0xC080) >> 4)
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if a2.cards[slot] != nil {
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if write {
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a2.cards[slot].Write16(byte(address&0xF), value)
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return 0
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} else {
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return a2.cards[slot].Read16(byte(address & 0xF))
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}
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}
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return a2.EmptyRead()
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}
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if address < 0xC800 {
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slot := byte((address - 0xC000) >> 8)
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if a2.cards[slot] != nil {
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if write {
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a2.cards[slot].Write256(byte(address&0xFF), value)
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return 0
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} else {
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return a2.cards[slot].Read256(byte(address & 0xFF))
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}
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}
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return a2.EmptyRead()
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}
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// 0xCFFF disables 2k on all cards
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if address == 0xCFFF {
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for i := 0; a2.cardMask > 0; a2.cardMask >>= 1 {
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if a2.cardMask&1 > 0 {
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a2.cards[i].ROMDisabled()
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}
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i++
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}
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return a2.EmptyRead()
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}
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// Only addresses left are 0xC800-0xCFFE
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if a2.cardRomMask == 0 {
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return a2.EmptyRead()
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}
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if a2.cardRomConflict {
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panic(fmt.Sprintf("More than one card trying to provide 2K ROM: Mask=$%02X", a2.cardRomMask))
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}
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if write {
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a2.cards[a2.cardRomHandler].Write(address, value)
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return 0
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}
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return a2.cards[a2.cardRomHandler].Read(address)
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}
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// EmptyRead returns the value last read from RAM, lingering on the bus.
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func (a2 *Apple2) EmptyRead() byte {
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return a2.lastRead
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}
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func (a2 *Apple2) Read(address uint16) byte {
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if address&0xF000 == 0xC000 {
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return a2.handleC00X(address, 0, false)
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}
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if address >= 0xD000 && a2.card12kMask > 0 {
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if a2.card12kConflict {
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panic(fmt.Sprintf("More than one card trying to provide 12K ROM: Mask=$%02X", a2.card12kMask))
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}
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a2.lastRead = a2.cards[a2.card12kHandler].Read(address)
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return a2.lastRead
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}
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a2.lastRead = a2.mem[address]
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return a2.lastRead
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}
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func (a2 *Apple2) RamRead(address uint16) byte {
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a2.lastRead = a2.mem[address]
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return a2.lastRead
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}
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func (a2 *Apple2) Write(address uint16, value byte) {
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// if address == 0x46 {
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// fmt.Printf("Write to 0x46: PC==$%04X\n", a2.cpu.PC())
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// }
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if address >= 0xD000 {
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if a2.card12kMask > 0 {
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if a2.card12kConflict {
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panic(fmt.Sprintf("More than one card trying to provide 12K ROM: Mask=$%02X", a2.card12kMask))
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}
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a2.cards[a2.card12kHandler].Write(address, value)
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}
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return
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}
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if address&0xF000 == 0xC000 {
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a2.handleC00X(address, value, true)
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return
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}
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a2.mem[address] = value
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}
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func (a2 *Apple2) Keypress(key byte) {
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a2.keys <- key | 0x80
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}
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func (a2 *Apple2) AddPCAction(address uint16, action PCAction) {
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a2.pcActions[address] = append(a2.pcActions[address], &action)
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}
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func (a2 *Apple2) Step() error {
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p := a2.cpu.P()
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if actions, ok := a2.pcActions[a2.cpu.PC()]; ok {
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for _, action := range actions {
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if p&action.Mask != action.Masked {
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continue
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}
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if action.Delay > 0 {
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fmt.Printf("Delaying %v: %d\n", action.Type, action.Delay)
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action.Delay--
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continue
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}
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switch action.Type {
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case ActionDumpMem:
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a2.DumpRAM(action.String)
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case ActionLogRegisters:
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a2.LogRegisters()
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case ActionTrace:
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a2.cpu.Print(action.String == "on" || action.String == "true")
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case ActionSetLimit:
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if i, err := strconv.Atoi(action.String); err == nil {
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a2.limit = i
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} else {
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panic(err)
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}
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case ActionHere:
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fmt.Printf("$%04X: (%d) %s - A=$%02X X=$%02X Y=$%02X SP=$%02X P=$%08b\n",
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a2.cpu.PC(), a2.cycle, action.String,
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a2.cpu.A(), a2.cpu.X(), a2.cpu.Y(), a2.cpu.SP(), a2.cpu.P())
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case ActionDiskStatus:
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fmt.Printf("$%04X: %v\n",
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a2.cpu.PC(), a2.cards[6])
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case ActionCallback:
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action.Callback()
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}
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}
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}
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err := a2.cpu.Step()
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if a2.limit > 0 {
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a2.limit--
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if a2.limit == 0 {
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a2.DumpRAM("limit-goa2.bin")
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panic("Limit reached")
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}
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}
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a2.cycle++
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return err
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}
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func (a2 *Apple2) Tick() {
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a2.scanner.Scan1()
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tickerMask := a2.cardTickerMask
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for i := 0; i < 8 && tickerMask > 0; i++ {
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if tickerMask&1 == 1 {
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a2.cards[i].Tick()
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}
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tickerMask >>= 1
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}
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}
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func (a2 *Apple2) Quit() {
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a2.Done = true
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}
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func (a2 *Apple2) HandleROM(onOff bool, slot byte) {
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if onOff {
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a2.cardRomMask |= (1 << slot)
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a2.cardRomHandler = slot
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} else {
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a2.cardRomMask &^= (1 << slot)
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}
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a2.cardRomConflict = a2.cardRomMask&(a2.cardRomMask-1) > 0
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if !onOff && !a2.cardRomConflict && a2.cardRomMask > 0 {
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// Removed a card: figure out new handler
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for i := byte(0); i < 7; i++ {
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if 1<<i == a2.cardRomMask {
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a2.cardRomHandler = i
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return
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}
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}
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}
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}
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func (a2 *Apple2) Handle12k(onOff bool, slot byte) {
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if onOff {
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a2.card12kMask |= (1 << slot)
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} else {
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a2.card12kMask &^= (1 << slot)
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}
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a2.card12kConflict = a2.card12kMask&(a2.card12kMask-1) > 0
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if !onOff && !a2.card12kConflict && a2.card12kMask > 0 {
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// Removed a card: figure out new handler
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for i := byte(0); i < 7; i++ {
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if 1<<i == a2.card12kMask {
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a2.card12kHandler = i
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return
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}
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}
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}
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}
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func (a2 *Apple2) LogRegisters() {
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c := a2.cpu
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log.Printf("Registers: PC=$%04X A=$%02X X=$%02X Y=$%02X SP=$%02X P=$%02X=$%08b",
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c.PC(), c.A(), c.X(), c.Y(), c.SP(), c.P(), c.P())
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}
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var dumpCount = 0
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func (a2 *Apple2) DumpRAM(filename string) error {
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f := filename
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dumpCount++
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ts := "-" + fmt.Sprintf("%05d", dumpCount)
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if ext := filepath.Ext(filename); ext == "" {
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f = filename + ts
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} else {
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dir, file := filepath.Split(filename[:len(filename)-len(ext)])
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f = dir + file + ts + ext
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}
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log.Printf("Dumping RAM to %s", f)
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a2.LogRegisters()
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buf := make([]byte, 0xC000, 0xC000+20)
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copy(buf, a2.mem[:0xC000])
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// LDA $A
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// LDX $X
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// LDY $Y
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buf = append(buf, 0xA9, a2.cpu.A(), 0xA2, a2.cpu.X(), 0xA0, a2.cpu.Y())
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// PHP, PLA, CMP $P
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buf = append(buf, 0x08, 0x68, 0xC9, a2.cpu.P())
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// TSX, CPX $SP
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buf = append(buf, 0xBA, 0xE0, a2.cpu.SP())
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// JMP $PC
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buf = append(buf, 0x4C, byte(a2.cpu.PC()&0xFF), byte(a2.cpu.PC()>>8))
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return ioutil.WriteFile(f, buf, 0644)
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}
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