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240 lines
11 KiB
Plaintext
240 lines
11 KiB
Plaintext
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KEGS's Apple //gs IWM emulation routines.
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The IWM code does 5.25" and 3.5" reads & writes, and updates the Unix disk
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image on writes. It is also nearly cycle-accurate--Let me know if you
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have a program which can detect it's not a real Apple II. There are
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a few 5.25" features missing (No 1/4 or 1/2 tracks, no support for Unix nibble
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images, limited disk switching), but what's there is pretty accurate.
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The low-level code support 1/4 and 1/2 tracks--it's the arm movement
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and image-handling routines which don't. And lack of Unix nibble images
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are also due to lack of higher-level routines to make those features work.
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How my disk emulation works: The routines have a nibblized image of each
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track of each drive (two 5.25" and two 3.5" drives are supported) in memory.
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The nibble images are declared as arrays, but it could be made to use
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more dynamic memory allocation.
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Each track's data format is a series of two-byte pairs. The first byte
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of the pair is the number of bits in this disk byte, and the second byte
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is the value. So a size of 8 is normal. A size of 10 means that there
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are 2 sync bits written before this byte on the disk. So for 5.25" disk
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accesses, 40 cycles need to pass in the simulator before providing a
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valid nibble. Partial nibbles are correctly formed if a read happens
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too early (this actually makes things slower, but is required if you
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want to make nibble copiers work). Similarly, writing to the disk
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watches timing carefully to write out the correct number of bits per
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disk byte. These routines will definitely test out your emulator's cycle
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counting ability.
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If a long delay occurs between a read (or a write) the routines skips
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the correct number of bits to return the correctly formed disk byte.
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After a long delay, for efficiency, I always return a full disk byte,
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instead of a partial one, even if the timing would put it in the middle
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of a disk byte.
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The arm stepping is really lame. I will clean it up soon.
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Smartport support is sufficient to claim that there are no smartport
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devices. This is necessary since the ROM tries to see if there are
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smartport devices at power-on.
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I tested my 5.25" drive routines on EDD, which could correctly measure
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drive speed and other disk factors. I also nibble-copied some disks,
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which also worked fine. I tested the 3.5" routines using Copy II+,
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which successfully nibble-copied several disks.
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Code description:
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Most code is in iwm.c, with some defines in iwm.h, and some stuff in
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iwm_35_525.h.
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Code only supports DOS3.3 ordered 5.25" images now, and ProDOS-ordered 3.5"
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images. Well, the code supports ProDOS-order 5.25" also, but has no
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mechanism to tell it an image is prodos-order yet. :-)
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Iwm state is encoded in the Iwm structure.
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drive525[2]: Disk structure for each 5.25" disk
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drive35[2]: Disk structure for each 3.5" disk
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smarport[32]: Disk structure for each "smartport" device emulated
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via slot 7 (this code not included)
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motor_on: True if IWM motor_on signal (c0e9) is asserted. Some
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drive is on.
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motor_off: True if motor has been turned off in software, but the
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1 second timeout has not expired yet.
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motor_on35: True if 3.5" motor is on (controlled differently than
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5.25" c0e9).
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motor_off_vbl_count: VBL count to turn motor off.
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head35, step_direction35: 3.5" controls, useless.
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iwm_phase[4]: Has '1' for each 5.25" phase that is on.
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iwm_mode: IWM mode register.
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drive_select: 0 = drive 1, 1 = drive 2.
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q6, q7: IWM q6, q7 registers.
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enable2: Smartport /ENABLE2 asserted.
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reset: Smartport /RESET asserted.
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previous_write_val: Partial write value.
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previous_write_bits: How many bits are valid in previous_write_val.
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Each disk (3.5" and 5.25") is encoded in the Disk struct:
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fd: Unix file descriptor. If < 0, no disk.
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name_ptr: Unix file name for this disk.
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image_start: offset from beginning of file for this partition.
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image_size: size of this partition.
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smartport: 1 if this is a smartport image, 0 if it is 5.25" or 3.5"
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disk_525: 1 if this is a 5.25" image, 0 if it is 3.5"
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drive: 0 = drive 1, 1 = drive 2.
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cur_qtr_track: Current qtr track. So track 1 == qtr_track 4.
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For 3.5", cur_qtr_track encodes the side also, so track 3
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side 1 would be qtr_track 7.
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prodos_order: True if Unix image is ProDOS order.
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vol_num: DOS3.3 volume number to use. Always 254.
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write_prot: True if disk is write protected.
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write_through_to_unix: True if writes should be passed through to
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the unix image. If this is false, you can write
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to the image in memory, but it won't get reflected
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into the Unix file. If you create a non-DOS3.3
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or ProDOS format image, it automatically sets this
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false.
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disk_dirty: Some track has dirty data that need to be flushed.
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just_ejected: Ejection flag.
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dcycs_last_read: Cycle count of last disk data register access.
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last_phase: Phase number last accessed.
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nib_pos: Nibble offset ptr--points to a byte.
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num_tracks: Number of tracks: 140 for 5.25" and 160 for 3.5"
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track[MAX_TRACKS]: nibble image of all possible tracks.
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Each track is represented by the Track structure:
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track_dirty: Contains data that needs to be written back to
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the Unix image file.
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overflow_size: Count of overflow bits, used in writing.
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track_len: Number of nibbles on this track.
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dsk: Handy pointer to parent Disk structure.
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nib_area[]: ptr to memory containing pairs of [size,data],
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encoding disk data bytes.
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pad1: If the structure is 32 bytes long, some array
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indexing is done better by my compiler.
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Externally callable routines:
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iwm_init(): Init various data structures at simulation start.
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iwm_reset(): Called at Apple //gs reset time.
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iwm_vbl_update(): Called every VBL (60 Hz) period. Used to turn motor
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off, and flush out dirty data.
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g_vbl_count is the count of VBL ticks (so it counts
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at 60 times a second).
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iwm_read_c0ec(double dcycs): Optimized routine to handle reading $C0EC
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faster. Exactly the same as read_iwm(0xc, dcycs);
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read_iwm(loc, dcycs):
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Read from 0xc0e0 + loc. Loc is between 0x0 and 0xf.
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Dcycs is an artifact from my simulator. Dcycs is a
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double holding the number of Apple //gs cycles since the
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emulator started. Dcycs always counts at 1.024MHz. If
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you are running at 2.5MHz, it increments by 0.4 every
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"cycle". This is a very convenient timing strategy. It
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also allows emulating the delay caused by synchronizing
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the fast part of a real Apple //gs with slow memory,
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which means my emulator knows that reading softswitches
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takes longer than reading fast memory.
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write_iwm(int loc, int val, double dcycs):
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Write to 0xc0e0 + loc. Just like read_iwm, but write "val" into
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loc.
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Tricky routines:
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IWM_READ_ROUT(): called by read_iwm() if q6,q7 = 0,0.
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This is actually in the file iwm_35_525.h. This is so I
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write the basic code once for 5.25" and 3.5" disk reads,
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but then include the file with some macros set to create
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the correct function optimized for 5.25" or 3.5"
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accesses. The function for 5.25" is called
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iwm_read_data_525, and iwm_read_data_35 for 3.5".
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Returns next disk byte.
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Takes three arguments: ptr to the Disk structure for
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the active drive, fast_disk_emul, and dcycs. dcycs is
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so that it can see how many cycles have passed since
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the last read (stored in dsk->dcycs_last_read).
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16.0 dcycs need to pass for an 8 bit nibble for 3.5"
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accesses, and 32.0 dcycs for an 8 bit nibble for 5.25".
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Fast_disk_emul == 1 says don't mess around with accuracy,
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and always return the next fully-formed nibble.
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There is a lot of complexity in this routine. All IWM
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routines must skip over nibbles (stored as byte pairs in
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dsk->nib_area[]) which have a size of 0 (special padding
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trick, described later). It then determines how much
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time has passed, and so how many bits are valid.
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If too many bits have gone by (11 cycs is almost 3 5.25"
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bit times, which is about the nibble valid time in
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the Apple //gs IWM hardware latch), it tries to skip
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to the correct position.
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Handles IWM latch mode for 3.5" or 5.25" accesses. If a
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partial read is indicated, it ensures that the high bit
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is clear by shifting the nibble to the right
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appropriately. Again, nib_area[] is an array of bytes,
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which are treated as pairs. Byte 0 = size, byte 1 =
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disk nibble.
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IWM_WRITE_ROUT(): called by write_iwm() if q6,q7 = 1,1.
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Similar to above. Handles async and sync mode writes.
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Handles partial writes. Handles the ROM writing
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0xff, 0x3f, 0xcf, 0xf3, 0xfc to be four 10-bit nibbles.
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Routine disk_nib_out(dsk, val, bits_read) does the
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actual work of merging the bits into the track image.
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disk_nib_out(): called by IWM_WRITE_ROUTE() and iwm_nibblize_track_*().
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Writes byte into nib_area[]. If size > 10, makes it 10.
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If high order bit not set, it sets it (makes certain routines
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in EDD happy).
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overflow_size:
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Writing to the disk creates some problems. I need to
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maintain 2 things at all times on the track:
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1) Constant number of bits for the entire track.
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2) know where each synchronized byte starts on
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the track.
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If the track was just stored as raw bits, then correctly
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simulating a delay of 300*4 cycles is tough, since it has to
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be done by reading through all 300 bits on the track,
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so that we keep in sync with where bytes really start.
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But if you just store the bytes themselves, then sync
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bytes look like every other byte. And if you now add
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the size field, you have a situation where a track could
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gain or lose bits when rewritten. Here's the case:
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Assume the track contains: 10,ff 10,ff 10,ff 10,ff.
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(That is 4 self-sync disk bytes of 10 bits each).
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If we rewrite that area of the track with 'D5 AA 96 FF',
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where each byte is 8 bits, we would have:
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8,D5 8,AA, 8,96, 8,FF.
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Looks OK, but we just lost 8 bits! The original 4 nibbles
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were using 40 bits of space on the disk. Our new 4 nibbles
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are using 32 bits. 8 bits are lost.
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Solution: log these missing bits via overflow_size.
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When writing, if overflow_size gets > 8, force out a 0,0
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nibble. So sync bytes get written as:
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10,FF 10,FF 10,FF 10,FF 0,0 10,FF 10,FF 10,FF 10,FF, 0,0.
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So when they get re-written with 8,xx, we don't lose any
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bytes on the disk.
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Unfortunately, it doesn't quite work that easily, and bits
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can still be lost when sync fields are partially overwritten.
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This happens when all the 0,0's end up in a place on the
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track where few overwrites occur, but other sync bytes
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are being turned into 8,xx. So overflow_size goes negative,
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saying we've got too much on the track.
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The code prints an error when it gains more than 64 bits.
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If someone can come up with a better scheme, I'd love to
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hear it. A partial solution would be to have a routine
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re-space the track to spread the needed 0,0's around
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a little better when overflow_size gets too negative.
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In iwm_nibblize_track_35(), the comments with hex numbers correspond
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to the ROM 01 addresses which I disassembled to determine the checksum
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algorithm. The code is not well written--it's basically hand-translated
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65816 assembly code. I'll clean it up someday.
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Much of the code is not well-optimized. I'll get to that someday, but
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the speed has been adequate for me so far.
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