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Fix II+ with no DiskII card

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This commit is contained in:
Ivan Izaguirre 2020-08-30 18:59:00 +02:00
parent 20808d78c8
commit 3a3c350748
2 changed files with 3 additions and 0 deletions
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2
memoryManager.go
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@ -74,6 +74,8 @@ func newMemoryManager(a *Apple2) *memoryManager {
mmu.apple2 = a mmu.apple2 = a
mmu.physicalMainRAM = newMemoryRange(0, make([]uint8, 0xc000)) mmu.physicalMainRAM = newMemoryRange(0, make([]uint8, 0xc000))
mmu.slotC3ROMActive = true // For II+, this is the default behaviour
return &mmu return &mmu
} }

1
softSwitches2e.go
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@ -23,6 +23,7 @@ func addApple2ESoftSwitches(io *ioC0Page) {
addSoftSwitchesMmu(io, 0x06, 0x07, 0x15, &mmu.intCxROMActive, "INTCXROM") addSoftSwitchesMmu(io, 0x06, 0x07, 0x15, &mmu.intCxROMActive, "INTCXROM")
addSoftSwitchesMmu(io, 0x08, 0x09, 0x16, &mmu.altZeroPage, "ALTZP") addSoftSwitchesMmu(io, 0x08, 0x09, 0x16, &mmu.altZeroPage, "ALTZP")
addSoftSwitchesMmu(io, 0x0a, 0x0b, 0x17, &mmu.slotC3ROMActive, "SLOTC3ROM") addSoftSwitchesMmu(io, 0x0a, 0x0b, 0x17, &mmu.slotC3ROMActive, "SLOTC3ROM")
mmu.slotC3ROMActive = false // Default behavior in II+ was true
addSoftSwitchesMmu(io, 0x00, 0x01, 0x18, &mmu.store80Active, "80STORE") addSoftSwitchesMmu(io, 0x00, 0x01, 0x18, &mmu.store80Active, "80STORE")
// New IOU read softswithes // New IOU read softswithes