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https://github.com/ivanizag/izapple2.git
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Observers on memory pages. Text memory is now regular RAM with an observer
This commit is contained in:
Ivan Izaguirre
parent
590dfb5cec
commit
ac73b8823c
@ -21,12 +21,23 @@ type ansiConsoleFrontend struct {
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mmu *memoryManager
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keyChannel chan uint8
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extraLineFeeds chan int
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textUpdated bool
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}
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func newAnsiConsoleFrontend(mmu *memoryManager) ansiConsoleFrontend {
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func newAnsiConsoleFrontend(mmu *memoryManager) *ansiConsoleFrontend {
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var fe ansiConsoleFrontend
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fe.mmu = mmu
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return fe
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fe.subscribeToTextPages()
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return &fe
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}
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func (fe *ansiConsoleFrontend) subscribeToTextPages() {
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observer := func(_ uint8, _ bool) {
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fe.textUpdated = true
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}
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for i := 0x04; i < 0x08; i++ {
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fe.mmu.physicalMainRAM[i].observer = observer
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}
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}
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const refreshDelayMs = 100
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@ -37,7 +48,8 @@ func (fe *ansiConsoleFrontend) getKey() (key uint8, ok bool) {
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for {
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byte, err := reader.ReadByte()
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if err != nil {
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panic(err)
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fmt.Println(err)
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return
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}
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c <- byte
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}
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@ -67,12 +79,13 @@ func ansiCursorUp(steps int) {
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fmt.Printf("\033[%vA", steps)
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}
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func (fe *ansiConsoleFrontend) textModeGoRoutine(tp *textPages) {
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func (fe *ansiConsoleFrontend) textModeGoRoutine() {
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fe.extraLineFeeds = make(chan int, 100)
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fmt.Printf(strings.Repeat("\n", 26))
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for {
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if tp.strobe() {
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if fe.textUpdated {
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fe.textUpdated = false
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// Go up
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ansiCursorUp(26)
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done := false
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@ -90,16 +103,17 @@ func (fe *ansiConsoleFrontend) textModeGoRoutine(tp *textPages) {
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// See "Understand the Apple II", page 5-10
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// http://www.applelogic.org/files/UNDERSTANDINGTHEAII.pdf
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isAltText := fe.mmu.isApple2e && fe.mmu.ioPage.isSoftSwitchExtActive(ioFlagAltChar)
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var i, j, h uint8
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var i, j, h, c uint8
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// Top, middle and botton screen
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for i = 0; i < 120; i = i + 40 {
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// Memory pages
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for _, p := range tp.pages {
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for j = 0x04; j < 0x08; j++ {
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p := fe.mmu.physicalMainRAM[j]
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// The two half pages
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for _, h = range []uint8{0, 128} {
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line := ""
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for j = i + h; j < i+h+40; j++ {
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line += textMemoryByteToString(p.Peek(j), isAltText)
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for c = i + h; c < i+h+40; c++ {
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line += textMemoryByteToString(p.internalPeek(c), isAltText)
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}
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fmt.Printf("# %v #\n", line)
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}
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@ -10,8 +10,8 @@ func Run(romFile string, log bool) {
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s.Mem = mmu
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fe := newAnsiConsoleFrontend(mmu)
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mmu.ioPage.setKeyboardProvider(&fe)
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go fe.textModeGoRoutine(mmu.textPages1)
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mmu.ioPage.setKeyboardProvider(fe)
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go fe.textModeGoRoutine()
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// Start the processor
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core6502.Reset(&s)
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@ -18,8 +18,7 @@ type memoryManager struct {
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unassignedExpansionROM []unassignedPage // 0xc000 to 0xcfff
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ioPage *ioC0Page // 0xc000 to 0xc080
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isApple2e bool
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textPages1 *textPages // 0x0400 to 0x07ff
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activeSlow int // Slot that has the addressing 0xc800 to 0ccfff
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activeSlot int // Slot that has the addressing 0xc800 to 0ccfff
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}
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const (
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@ -87,14 +86,6 @@ func newAddressSpace(romImage string) *memoryManager {
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m.SetPage(page, p)
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}
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// Replace RAM in the TEXT1 area.
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// TODO: treat as normal ram. Add is dirty in all RAM pages
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var t textPages
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mmu.textPages1 = &t
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for i := 0; i < 4; i++ {
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m.SetPage(uint8(4+i), &(t.pages[i]))
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}
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return &mmu
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}
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@ -1,23 +1,36 @@
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package apple2
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type rxmPage struct {
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data [256]uint8
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observer func(address uint8, isWrite bool)
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}
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type ramPage struct {
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data [256]uint8
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rxmPage
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}
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type romPage struct {
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data [256]uint8
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rxmPage
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}
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func (p *ramPage) Peek(address uint8) uint8 {
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func (p *rxmPage) Peek(address uint8) uint8 {
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p.touch(address, false)
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return p.data[address]
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}
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func (p *ramPage) Poke(address uint8, value uint8) {
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func (p *rxmPage) internalPeek(address uint8) uint8 {
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return p.data[address]
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}
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func (p *rxmPage) Poke(address uint8, value uint8) {
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p.touch(address, true)
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p.data[address] = value
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}
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func (p *romPage) Peek(address uint8) uint8 {
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return p.data[address]
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func (p *rxmPage) touch(address uint8, isWrite bool) {
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if p.observer != nil {
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p.observer(address, isWrite)
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}
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}
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func (p *romPage) Poke(address uint8, value uint8) {
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@ -1,48 +0,0 @@
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package apple2
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type textPages struct {
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pages [4]textPage
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}
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type textPage struct {
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dirty bool
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data [256]uint8
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}
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func (p *textPage) Peek(address uint8) uint8 {
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return p.data[address]
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}
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func (p *textPage) Poke(address uint8, value uint8) {
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p.data[address] = value
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// Note: we could avoid setting dirty on the 16 blocks of 8 hidden bytes
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p.dirty = true
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}
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func (tp *textPages) read(column uint8, line uint8) uint8 {
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page, address := tp.charAddress(column, line)
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return tp.pages[page].Peek(address)
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}
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func (tp *textPages) write(column uint8, line uint8, value uint8) {
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page, address := tp.charAddress(column, line)
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tp.pages[page].Poke(address, value)
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}
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func (tp *textPages) charAddress(column uint8, line uint8) (page uint8, address uint8) {
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page = (line % 8) / 2
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address = column + (line/8)*40 + (line%2)*128
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return
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}
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func (tp *textPages) strobe() bool {
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// Thread safe. May just mark more dirties than needed.
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dirty := false
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for i := 0; i < 4; i++ {
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if tp.pages[i].dirty {
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dirty = true
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tp.pages[i].dirty = false
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}
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}
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return dirty
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}
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@ -1,23 +0,0 @@
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package apple2
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import "testing"
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func TestCharAddress(t *testing.T) {
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var tp textPages
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mappings := [][]uint8{
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// column, line, page, address
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{0, 0, 0, 0},
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{0, 1, 0, 0x80},
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{0, 2, 1, 0x00},
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{0, 23, 3, 0xD0},
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}
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for _, v := range mappings {
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page, address := tp.charAddress(v[0], v[1])
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if page != v[2] || address != v[3] {
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t.Errorf("Error on charAddress for (%v, %v) (%v:%02x) <> (%v:%02x)",
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v[0], v[1], v[2], v[3], page, address)
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}
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}
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}
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4
main.go
4
main.go
@ -4,8 +4,8 @@ import "go6502/apple2"
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func main() {
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//romFile := "apple2/romdumps/Apple2.rom"
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//romFile := "apple2/romdumps/Apple2_Plus.rom"
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romFile := "apple2/romdumps/Apple2e.rom"
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romFile := "apple2/romdumps/Apple2_Plus.rom"
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//romFile := "apple2/romdumps/Apple2e.rom"
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log := false
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apple2.Run(romFile, log)
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