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mirror of https://github.com/ivanizag/izapple2.git synced 2024-12-29 23:29:57 +00:00
Commit Graph

43 Commits

Author SHA1 Message Date
Ivan Izaguirre
922ae7839e Abstract Memory with FlatMemory and PagedMemory implementations 2019-02-22 18:00:53 +01:00
Ivan Izaguirre
49ea32b84d Support for FLASH and INVERSE. Extract text display code to the ANSI frontend 2019-02-22 00:21:17 +01:00
Ivan Izaguirre
5172919649 Extract stdin keyboard implementation from the io page simulator 2019-02-20 23:51:47 +01:00
Ivan Izaguirre
5f336810aa Keyboard support using STDIN lines 2019-02-18 00:01:48 +01:00
Ivan Izaguirre
3fca4ed170 Set minimum screen refresh time as 100ms 2019-02-18 00:00:39 +01:00
Iván Izaguirre
09da9056f9
Create LICENSE 2019-02-16 21:03:59 +01:00
Ivan Izaguirre
819c9f7eb9 Improved console output redrawing the screen in place 2019-02-16 20:32:50 +01:00
Ivan Izaguirre
33ccf5e4c3 Project files organization. Second commit wuth the file changes 2019-02-16 20:15:41 +01:00
Ivan Izaguirre
a3ca5439a0 Project files organization. First commit with only moves 2019-02-16 20:12:55 +01:00
Ivan Izaguirre
9f783e53d8 Fixed text mode. Some softswitches implemented. Boots Apple 2+ to prompt. 2019-02-16 17:32:06 +01:00
Ivan Izaguirre
1a6e9e006a Loads ROM, shows APPLE ][ logo. Freezes on . Next to implement the soft switches in page 2019-02-15 00:41:56 +01:00
Ivan Izaguirre
49f2436c7b Refactor memory in pages. Addes text, ram and rom pages 2019-02-13 00:03:43 +01:00
Ivan Izaguirre
139597b0d5 Functional tests 2019-02-12 22:30:35 +01:00
Ivan Izaguirre
8bd489522f Fixed ADC and SBC in decimal mode. All tests pass. 2019-02-10 23:47:54 +01:00
Ivan Izaguirre
f43150c93c Fixed ADC and SBC non BCD. Passing tests up to 41 2019-02-10 17:49:11 +01:00
Ivan Izaguirre
6e524093c1 Fixed JSR and BRK. Added disassemble. 2019-02-10 16:25:03 +01:00
Ivan Izaguirre
ff0d3d10c9 Move addressMode as porperty of every opcode 2019-02-10 14:01:57 +01:00
Ivan Izaguirre
3aa0f413db Passing tests up to 9 2019-02-10 00:15:14 +01:00
Ivan Izaguirre
2b02b8de9e Handle the virtual bits 5 and 4 when pushing P to the stack 2019-02-03 01:38:36 +01:00
Ivan Izaguirre
7f9aea24e9 Support for BRK, JMP, JSR, RTI and RTS 2019-02-03 01:13:02 +01:00
Ivan Izaguirre
e43a0a9ae1 Support for stack instructions PHA, PHP, PLA and PLP 2019-02-02 22:53:26 +01:00
Ivan Izaguirre
1c1bd79f13 Support for ADC and SBC without BCD 2019-02-02 18:16:29 +01:00
Ivan Izaguirre
d56bea182f Support for AND, EOR and ORA 2019-01-30 23:44:34 +01:00
Ivan Izaguirre
1379fda5b5 Support CMP, CPX and CPY 2019-01-30 23:01:47 +01:00
Ivan Izaguirre
9e73ad1850 Support for ASL and LSR 2019-01-30 20:32:11 +01:00
Ivan Izaguirre
7b1cb65eef Support for STA, STX, STY 2019-01-30 20:10:39 +01:00
Ivan Izaguirre
3ac61fed59 Some comments 2019-01-30 00:11:35 +01:00
Ivan Izaguirre
ff1b116163 Added the 8 conditional branch instructions 2019-01-29 23:45:01 +01:00
Ivan Izaguirre
e6535c2778 Simplify resolveWithAddressMethod() use with Lens pattern 2019-01-29 00:23:43 +01:00
Ivan Izaguirre
195d9098a1 Reorder execute.go 2019-01-29 00:06:15 +01:00
Ivan Izaguirre
858d6acac5 Added SEx and CLx 2019-01-29 00:00:37 +01:00
Ivan Izaguirre
964f5bc3be Added INC and DEC 2019-01-28 23:40:18 +01:00
Ivan Izaguirre
9b0dac5ac8 Fixed ROL A, added ROR 2019-01-28 23:10:23 +01:00
Ivan Izaguirre
aa5aab3526 Rename buildOPTransfer 2019-01-28 00:00:17 +01:00
Ivan Izaguirre
7e7e59e992 ROL and extraction of addressing mode resolution 2019-01-27 23:49:16 +01:00
Ivan Izaguirre
8208885df8 Flags updated 2019-01-27 23:03:08 +01:00
Ivan Izaguirre
de72112f90 Added INX, INY, DEX, DEY 2019-01-27 20:15:28 +01:00
Ivan Izaguirre
d376e46596 Added the six transfer opcodes 2019-01-27 19:57:17 +01:00
Ivan Izaguirre
ba1053c1ac First iteration of LDA, LDX, LDY completed 2019-01-27 18:13:16 +01:00
Ivan Izaguirre
7e6b5012ca More addressing modes for LDA 2019-01-27 09:25:33 +01:00
Ivan Izaguirre
925f76394f First generalization of LD? 2019-01-26 18:57:03 +01:00
Ivan Izaguirre
3c77553dcd Initial 2019-01-26 17:05:51 +01:00
Ivan Izaguirre
d36c030269 First Commit 2019-01-26 16:59:36 +01:00