mirror of
https://github.com/ivanizag/izapple2.git
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249 lines
7.4 KiB
Go
249 lines
7.4 KiB
Go
package izapple2
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import (
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"fmt"
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"strconv"
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)
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/*
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To implement a hard drive we just have to support boot from #PR7 and the PRODOS expectations.
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See:
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Beneath Prodos, section 6-6, 7-13 and 5-8. (http://www.apple-iigs.info/doc/fichiers/beneathprodos.pdf)
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Apple IIc Technical Reference, 2nd Edition. Chapter 8. https://ia800207.us.archive.org/19/items/AppleIIcTechnicalReference2ndEd/Apple%20IIc%20Technical%20Reference%202nd%20ed.pdf
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https://prodos8.com/docs/technote/21/
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https://prodos8.com/docs/technote/20/
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*/
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// CardSmartPort represents a SmartPort card
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type CardSmartPort struct {
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cardBase
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devices []smartPortDevice
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hardDiskBlocks uint32
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mliParams uint16
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trace bool
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}
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// NewCardSmartPort creates a new SmartPort card
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func NewCardSmartPort() *CardSmartPort {
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var c CardSmartPort
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c.name = "SmartPort Card"
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return &c
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}
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// GetInfo returns smartPort info
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func (c *CardSmartPort) GetInfo() map[string]string {
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info := make(map[string]string)
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info["trace"] = strconv.FormatBool(c.trace)
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return info
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}
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// LoadImage loads a disk image
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func (c *CardSmartPort) LoadImage(filename string, trace bool) error {
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device, err := NewSmartPortHardDisk(c, filename)
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if err == nil {
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device.trace = trace
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c.devices = append(c.devices, device)
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c.hardDiskBlocks = device.disk.GetSizeInBlocks() // Needed for the PRODOS status
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}
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return err
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}
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// LoadImage loads a disk image
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func (c *CardSmartPort) AddDevice(device smartPortDevice) {
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c.devices = append(c.devices, device)
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c.hardDiskBlocks = 0 // Needed for the PRODOS status
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}
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func (c *CardSmartPort) assign(a *Apple2, slot int) {
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c.loadRom(buildHardDiskRom(slot))
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c.addCardSoftSwitchR(0, func() uint8 {
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// Prodos entry point
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command := a.mmu.Peek(0x42)
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unit := a.mmu.Peek(0x43) & 0x0f
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// Generate Smarport compatible params
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var call *smartPortCall
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if command == smartPortCommandStatus {
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call = newSmartPortCallSynthetic(c, command, []uint8{
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3, // 3 args
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unit,
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a.mmu.Peek(0x44), a.mmu.Peek(0x45), // data address
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0,
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})
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} else if command == smartPortCommandReadBlock || command == smartPortCommandWriteBlock {
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call = newSmartPortCallSynthetic(c, command, []uint8{
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3, // 3args
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unit,
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a.mmu.Peek(0x44), a.mmu.Peek(0x45), // data address
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a.mmu.Peek(0x46), a.mmu.Peek(0x47), 0, // block number
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})
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} else {
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return smartPortBadCommand
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}
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return c.exec(call)
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}, "SMARTPORTPRODOSCOMMAND")
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c.addCardSoftSwitchR(1, func() uint8 {
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// Blocks available, low byte
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return uint8(c.hardDiskBlocks)
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}, "HDBLOCKSLO")
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c.addCardSoftSwitchR(2, func() uint8 {
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// Blocks available, high byte
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return uint8(c.hardDiskBlocks)
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}, "HDBLOCKHI")
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c.addCardSoftSwitchR(3, func() uint8 {
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// Smart port entry point
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command := c.a.mmu.Peek(c.mliParams + 1)
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paramsAddress := uint16(c.a.mmu.Peek(c.mliParams+2)) + uint16(c.a.mmu.Peek(c.mliParams+3))<<8
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call := newSmartPortCall(c, command, paramsAddress)
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return c.exec(call)
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}, "SMARTPORTEXEC")
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c.addCardSoftSwitchW(4, func(value uint8) {
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c.mliParams = (c.mliParams & 0xff00) + uint16(value)
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}, "HDSMARTPORTLO")
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c.addCardSoftSwitchW(5, func(value uint8) {
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c.mliParams = (c.mliParams & 0x00ff) + (uint16(value) << 8)
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}, "HDSMARTPORTHI")
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c.cardBase.assign(a, slot)
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}
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func (c *CardSmartPort) exec(call *smartPortCall) uint8 {
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var result uint8
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unit := int(call.unit())
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if call.command == smartPortCommandStatus &&
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// Call to the host
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call.statusCode() == smartPortStatusCodeDevice {
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result = c.hostStatus(call)
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} else if unit > len(c.devices) {
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result = smartPortErrorNoDevice
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} else {
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if unit == 0 {
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unit = 1 // For unit 0(host) use the first device
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}
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if unit > len(c.devices) {
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result = smartPortErrorNoDevice
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} else {
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result = c.devices[unit-1].exec(call)
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}
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}
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if c.trace {
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fmt.Printf("[CardSmartPort] Command %v on slot %v => result %s.\n",
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call, c.slot, smartPortErrorMessage(result))
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}
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return result
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}
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func (c *CardSmartPort) hostStatus(call *smartPortCall) uint8 {
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dest := call.param16(2)
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if c.trace {
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fmt.Printf("[CardSmartPort] Host status into $%x.\n", dest)
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}
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// See http://www.1000bit.it/support/manuali/apple/technotes/smpt/tn.smpt.2.html
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c.a.mmu.Poke(dest+0, uint8(len(c.devices)))
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c.a.mmu.Poke(dest+1, 0xff) // No interrupt
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c.a.mmu.Poke(dest+2, 0x00)
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c.a.mmu.Poke(dest+3, 0x00) // Unknown manufacturer
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c.a.mmu.Poke(dest+4, 0x01)
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c.a.mmu.Poke(dest+5, 0x00) // Version 1.0 final
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c.a.mmu.Poke(dest+6, 0x00)
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c.a.mmu.Poke(dest+7, 0x00) // Reserved
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return smartPortNoError
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}
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func buildHardDiskRom(slot int) []uint8 {
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data := make([]uint8, 256)
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ssBase := 0x80 + uint8(slot<<4)
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copy(data, []uint8{
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// Preamble bytes to comply with the expectation in $Cn01, 3, 5 and 7
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0xa9, 0x20, // LDA #$20
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0xa9, 0x00, // LDA #$00
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0xa9, 0x03, // LDA #$03
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0xa9, 0x00, // LDA #$00
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0xd0, 0x36, // BNE bootcode, there is no space for a jmp
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})
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if slot == 7 {
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// It should be 0 for SmartPort, but with 0 it's not bootable with the II+ ROM
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// See http://www.1000bit.it/support/manuali/apple/technotes/udsk/tn.udsk.2.html
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data[0x07] = 0x3c
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}
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copy(data[0x0a:], []uint8{
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// Entrypoints and SmartPort body it has to be in $Cx0a
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0x4c, 0x80, 0xc0 + uint8(slot), // JMP $cs80 ; Prodos Entrypoint
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// 3 bytes later, smartPort entrypoint. Uses the ProDos MLI calling convention
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0x68, // PLA
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0x8d, ssBase + 4, 0xc0, // STA $c0n4 ; Softswitch 4, store LO(cmdBlock)
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0xa8, // TAY ; We will need it later
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0x68, // PLA
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0x8d, ssBase + 5, 0xc0, // STA $c0n5 ; Softswitch 5, store HI(cmdBlock)
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0x48, // PHA
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0x98, // TYA
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0x18, // CLC
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0x69, 0x03, // ADC #$03 ; Fix return address past the cmdblock
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0x48, // PHA
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0xad, ssBase + 3, 0xc0, // LDA $C0n3 ; Softswitch 3, execute command. Error code in reg A.
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0x18, // CLC ; Clear carry for no errors.
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0xF0, 0x01, // BEQ $01 ; Skips the SEC if reg A is zero
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0x38, // SEC ; Set carry on errors
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0x60, // RTS
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})
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copy(data[0x40:], []uint8{
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// Boot code: SS will load block 0 in address $0800. The jump there.
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// Note: after execution the first block expects $42 to $47 to have
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// valid values to read block 0. At least Total Replay expects that.
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0xa9, 0x01, // LDA·#$01
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0x85, 0x42, // STA $42 ; Command READ(1)
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0xa9, 0x00, // LDA·#$00
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0x85, 0x43, // STA $43 ; Unit 0
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0x85, 0x44, // STA $44 ; Dest LO($0800)
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0x85, 0x46, // STA $46 ; Block LO(0)
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0x85, 0x47, // STA $47 ; Block HI(0)
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0xa9, 0x08, // LDA·#$08
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0x85, 0x45, // STA $45 ; Dest HI($0800)
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0xad, ssBase, 0xc0, // LDA $C0n1 ;Call to softswitch 0.
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0xa2, uint8(slot << 4), // LDX $s7 ; Slot on hign nibble of X
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0x4c, 0x01, 0x08, // JMP $801 ; Jump to loaded boot sector
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})
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// Prodos entrypoint body
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copy(data[0x80:], []uint8{
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0xad, ssBase + 0, 0xc0, // LDA $C0n0 ; Softswitch 0, execute command. Error code in reg A.
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0x48, // PHA
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0xae, ssBase + 1, 0xc0, // LDX $C0n1 ; Softswitch 1, LO(Blocks), STATUS needs that in reg X.
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0xac, ssBase + 2, 0xc0, // LDY $C0n2 ; Softswitch 2, HI(Blocks). STATUS needs that in reg Y.
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0x18, // CLC ; Clear carry for no errors.
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0x68, // PLA ; Sets Z if no error
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0xF0, 0x01, // BEQ $01 ; Skips the SEC if reg A is zero
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0x38, // SEC ; Set carry on errors
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0x60, // RTS
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})
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data[0xfc] = 0
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data[0xfd] = 0
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data[0xfe] = 3 // Status and Read. No write, no format. Single volume
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data[0xff] = 0x0a // Driver entry point // Must be $0a
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return data
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}
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