136 lines
4.1 KiB
C++
136 lines
4.1 KiB
C++
/*
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* reinette, a french Apple II emulator, using SDL2
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* and powered by puce65c02 - a WDS 65c02 cpu emulator by the same author
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* Last modified 1st of July 2021
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* Copyright (c) 2021 Arthur Ferreira (arthur.ferreira2@gmail.com)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef _MEMORY_H
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#define _MEMORY_H
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// memory layout
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#define RAMSIZE 0xC000 // 48K
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#define AUXSIZE 0xC000 // 48K
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// Apple II and II+
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// #define ROMSTART 0xD000
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// #define ROMSIZE 0x3000 // 12K
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// Apple IIe and IIee
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#define ROMSTART 0xC000
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#define ROMSIZE 0x4000 // 16K
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// language card
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#define LGCSTART 0xD000
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#define LGCSIZE 0x3000
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#define BK2START 0xD000
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#define BK2SIZE 0x1000
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// slot 1,
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#define SL1START 0xC100
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#define SL1SIZE 0x0100
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// slot 2
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#define SL2START 0xC200
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#define SL2SIZE 0x0100
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// slot 3
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#define SL3START 0xC300
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#define SL3SIZE 0x0100
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// slot 4
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#define SL4START 0xC400
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#define SL4SIZE 0x0100
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// slot 5
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#define SL5START 0xC500
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#define SL5SIZE 0x0100
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// slot 6, diskII
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#define SL6START 0xC600
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#define SL6SIZE 0x0100
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// slot 7
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#define SL7START 0xC700
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#define SL7SIZE 0x0100
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#define SLROMSTART 0xC800 // peripheral-card expansion ROMs -
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#define SLROMSIZE 0xC800
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class Mmu {
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public:
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uint8_t ram[RAMSIZE]; // 48K of MAIN in $000-$BFFF
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uint8_t ramlgc[LGCSIZE]; // MAIN Language Card 12K in $D000-$FFFF
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uint8_t rambk2[BK2SIZE]; // MAIN bank 2 of Language Card 4K in $D000-$DFFF
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uint8_t aux[AUXSIZE]; // 48K of AUX memory
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uint8_t auxlgc[LGCSIZE]; // AUX Language Card 12K in $D000-$FFFF
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uint8_t auxbk2[BK2SIZE]; // AUX bank 2 of Language Card 4K in $D000-$DFFF
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uint8_t rom[ROMSIZE]; // 16K of rom in $C000-$FFFF
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uint8_t sl1[SL1SIZE];
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uint8_t sl2[SL2SIZE];
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uint8_t sl3[SL3SIZE];
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uint8_t sl5[SL5SIZE];
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uint8_t sl4[SL4SIZE];
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uint8_t sl6[SL6SIZE]; // P5A disk ][ PROM in slot 6
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uint8_t sl7[SL7SIZE];
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uint8_t slrom[8][SLROMSIZE]; // 7x peripheral-card expansion ROMs ( index 0 is not used)
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uint8_t KBD; // $C000, $C010 ascii value of keyboard input
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bool PAGE2; // $C054 PAGE1 / $C055 PAGE2
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bool TEXT; // $C050 CLRTEXT / $C051 SETTEXT
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bool MIXED; // $C052 CLRMIXED / $C053 SETMIXED
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bool HIRES; // $C056 GR / $C057 HGR
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bool DHIRES; // 0xC05E / 0xC05F DOUBLE HIRES
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bool COL80; // 80 COLUMNS
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bool ALTCHARSET;
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bool LCWR ; // Language Card writable
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bool LCRD ; // Language Card readable
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bool LCBK2; // Language Card bank 2 enabled
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bool LCWFF; // Language Card pre-write flip flop
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bool AN0;
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bool AN1;
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bool AN2;
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bool AN3;
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bool RAMRD;
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bool RAMWRT;
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bool ALTZP;
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bool STORE80;
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bool INTCXROM;
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bool SLOTC3ROM;
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bool IOUDIS;
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bool VERTBLANK;
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Mmu();
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~Mmu();
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void init();
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uint8_t readMem(uint16_t address);
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void writeMem(uint16_t address, uint8_t value);
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private:
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uint8_t softSwitches(uint16_t address, uint8_t value, bool WRT);
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};
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#endif
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