2007-05-29 03:06:33 +00:00
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/***************************************************************************
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ay8910.cpp
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Emulation of the AY-3-8910 / YM2149 sound chip.
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Based on various code snippets by Ville Hallik, Michael Cuddy,
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Tatsuyuki Satoh, Fabrice Frances, Nicola Salmoria.
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***************************************************************************/
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2007-07-02 16:13:08 +00:00
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//
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2007-05-29 03:06:33 +00:00
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// From mame.txt (http://www.mame.net/readme.html)
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2007-07-02 16:13:08 +00:00
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//
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2007-05-29 03:06:33 +00:00
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// VI. Reuse of Source Code
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// --------------------------
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// This chapter might not apply to specific portions of MAME (e.g. CPU
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// emulators) which bear different copyright notices.
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// The source code cannot be used in a commercial product without the written
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// authorization of the authors. Use in non-commercial products is allowed, and
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// indeed encouraged. If you use portions of the MAME source code in your
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// program, however, you must make the full source code freely available as
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// well.
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// Usage of the _information_ contained in the source code is free for any use.
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// However, given the amount of time and energy it took to collect this
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// information, if you find new information we would appreciate if you made it
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// freely available as well.
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2007-07-02 16:13:08 +00:00
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//
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2007-05-29 03:06:33 +00:00
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2007-05-29 05:16:51 +00:00
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// JLH: Commented out MAME specific crap
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2007-05-29 03:06:33 +00:00
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#include "ay8910.h"
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2007-07-02 16:13:08 +00:00
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#include <string.h> // for memset()
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2007-05-29 03:06:33 +00:00
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2007-05-29 05:16:51 +00:00
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#define MAX_OUTPUT 0x7FFF
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2007-05-29 03:06:33 +00:00
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// See AY8910_set_clock() for definition of STEP
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#define STEP 0x8000
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struct AY8910
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{
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int Channel;
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int SampleRate;
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// mem_read_handler PortAread;
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// mem_read_handler PortBread;
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// mem_write_handler PortAwrite;
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// mem_write_handler PortBwrite;
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int register_latch;
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unsigned char Regs[16];
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int lastEnable;
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unsigned int UpdateStep;
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2007-07-02 16:13:08 +00:00
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int PeriodA, PeriodB, PeriodC, PeriodN, PeriodE;
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int CountA, CountB, CountC, CountN, CountE;
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unsigned int VolA, VolB, VolC, VolE;
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unsigned char EnvelopeA, EnvelopeB, EnvelopeC;
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unsigned char OutputA, OutputB, OutputC, OutputN;
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2007-05-29 03:06:33 +00:00
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signed char CountEnv;
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2007-07-02 16:13:08 +00:00
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unsigned char Hold, Alternate, Attack, Holding;
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2007-05-29 03:06:33 +00:00
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int RNG;
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unsigned int VolTable[32];
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};
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/* register id's */
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#define AY_AFINE (0)
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#define AY_ACOARSE (1)
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#define AY_BFINE (2)
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#define AY_BCOARSE (3)
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#define AY_CFINE (4)
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#define AY_CCOARSE (5)
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#define AY_NOISEPER (6)
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#define AY_ENABLE (7)
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#define AY_AVOL (8)
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#define AY_BVOL (9)
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#define AY_CVOL (10)
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#define AY_EFINE (11)
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#define AY_ECOARSE (12)
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#define AY_ESHAPE (13)
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#define AY_PORTA (14)
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#define AY_PORTB (15)
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static struct AY8910 AYPSG[MAX_8910]; /* array of PSG's */
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void _AYWriteReg(int n, int r, int v)
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{
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struct AY8910 *PSG = &AYPSG[n];
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int old;
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PSG->Regs[r] = v;
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2007-05-29 05:16:51 +00:00
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/* A note about the period of tones, noise and envelope: for speed reasons, *
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* we count down from the period to 0, but careful studies of the chip *
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* output prove that it instead counts up from 0 until the counter becomes *
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* greater or equal to the period. This is an important difference when the *
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* program is rapidly changing the period to modulate the sound. *
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* To compensate for the difference, when the period is changed we adjust *
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* our internal counter. *
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* Also, note that period = 0 is the same as period = 1. This is mentioned *
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* in the YM2203 data sheets. However, this does NOT apply to the Envelope *
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* period. In that case, period = 0 is half as period = 1. */
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switch (r)
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2007-05-29 03:06:33 +00:00
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{
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case AY_AFINE:
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case AY_ACOARSE:
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2007-05-29 05:16:51 +00:00
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PSG->Regs[AY_ACOARSE] &= 0x0F;
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2007-05-29 03:06:33 +00:00
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old = PSG->PeriodA;
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PSG->PeriodA = (PSG->Regs[AY_AFINE] + 256 * PSG->Regs[AY_ACOARSE]) * PSG->UpdateStep;
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2007-05-29 05:16:51 +00:00
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2007-07-02 16:13:08 +00:00
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if (PSG->PeriodA == 0)
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PSG->PeriodA = PSG->UpdateStep;
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2007-05-29 05:16:51 +00:00
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2007-05-29 03:06:33 +00:00
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PSG->CountA += PSG->PeriodA - old;
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2007-05-29 05:16:51 +00:00
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2007-07-02 16:13:08 +00:00
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if (PSG->CountA <= 0)
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PSG->CountA = 1;
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2007-05-29 03:06:33 +00:00
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break;
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case AY_BFINE:
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case AY_BCOARSE:
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2007-05-29 05:16:51 +00:00
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PSG->Regs[AY_BCOARSE] &= 0x0F;
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2007-05-29 03:06:33 +00:00
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old = PSG->PeriodB;
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PSG->PeriodB = (PSG->Regs[AY_BFINE] + 256 * PSG->Regs[AY_BCOARSE]) * PSG->UpdateStep;
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2007-05-29 05:16:51 +00:00
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2007-07-02 16:13:08 +00:00
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if (PSG->PeriodB == 0)
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PSG->PeriodB = PSG->UpdateStep;
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2007-05-29 05:16:51 +00:00
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2007-05-29 03:06:33 +00:00
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PSG->CountB += PSG->PeriodB - old;
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2007-05-29 05:16:51 +00:00
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2007-07-02 16:13:08 +00:00
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if (PSG->CountB <= 0)
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PSG->CountB = 1;
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2007-05-29 03:06:33 +00:00
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break;
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case AY_CFINE:
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case AY_CCOARSE:
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2007-05-29 05:16:51 +00:00
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PSG->Regs[AY_CCOARSE] &= 0x0F;
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2007-05-29 03:06:33 +00:00
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old = PSG->PeriodC;
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PSG->PeriodC = (PSG->Regs[AY_CFINE] + 256 * PSG->Regs[AY_CCOARSE]) * PSG->UpdateStep;
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2007-05-29 05:16:51 +00:00
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2007-07-02 16:13:08 +00:00
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if (PSG->PeriodC == 0)
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PSG->PeriodC = PSG->UpdateStep;
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2007-05-29 05:16:51 +00:00
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2007-05-29 03:06:33 +00:00
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PSG->CountC += PSG->PeriodC - old;
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2007-05-29 05:16:51 +00:00
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2007-07-02 16:13:08 +00:00
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if (PSG->CountC <= 0)
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PSG->CountC = 1;
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2007-05-29 03:06:33 +00:00
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break;
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case AY_NOISEPER:
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2007-05-29 05:16:51 +00:00
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PSG->Regs[AY_NOISEPER] &= 0x1F;
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2007-05-29 03:06:33 +00:00
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old = PSG->PeriodN;
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PSG->PeriodN = PSG->Regs[AY_NOISEPER] * PSG->UpdateStep;
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2007-05-29 05:16:51 +00:00
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2007-07-02 16:13:08 +00:00
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if (PSG->PeriodN == 0)
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PSG->PeriodN = PSG->UpdateStep;
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2007-05-29 05:16:51 +00:00
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2007-05-29 03:06:33 +00:00
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PSG->CountN += PSG->PeriodN - old;
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2007-05-29 05:16:51 +00:00
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2007-07-02 16:13:08 +00:00
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if (PSG->CountN <= 0)
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PSG->CountN = 1;
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2007-05-29 03:06:33 +00:00
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break;
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case AY_ENABLE:
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if ((PSG->lastEnable == -1) ||
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((PSG->lastEnable & 0x40) != (PSG->Regs[AY_ENABLE] & 0x40)))
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{
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/* write out 0xff if port set to input */
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// if (PSG->PortAwrite)
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// (*PSG->PortAwrite)(0, (UINT8) ((PSG->Regs[AY_ENABLE] & 0x40) ? PSG->Regs[AY_PORTA] : 0xff)); // [TC: UINT8 cast]
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}
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if ((PSG->lastEnable == -1) ||
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((PSG->lastEnable & 0x80) != (PSG->Regs[AY_ENABLE] & 0x80)))
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{
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/* write out 0xff if port set to input */
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// if (PSG->PortBwrite)
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// (*PSG->PortBwrite)(0, (UINT8) ((PSG->Regs[AY_ENABLE] & 0x80) ? PSG->Regs[AY_PORTB] : 0xff)); // [TC: UINT8 cast]
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}
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PSG->lastEnable = PSG->Regs[AY_ENABLE];
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break;
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case AY_AVOL:
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2007-05-29 05:16:51 +00:00
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PSG->Regs[AY_AVOL] &= 0x1F;
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2007-05-29 03:06:33 +00:00
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PSG->EnvelopeA = PSG->Regs[AY_AVOL] & 0x10;
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PSG->VolA = PSG->EnvelopeA ? PSG->VolE : PSG->VolTable[PSG->Regs[AY_AVOL] ? PSG->Regs[AY_AVOL]*2+1 : 0];
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break;
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case AY_BVOL:
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2007-05-29 05:16:51 +00:00
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PSG->Regs[AY_BVOL] &= 0x1F;
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2007-05-29 03:06:33 +00:00
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PSG->EnvelopeB = PSG->Regs[AY_BVOL] & 0x10;
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PSG->VolB = PSG->EnvelopeB ? PSG->VolE : PSG->VolTable[PSG->Regs[AY_BVOL] ? PSG->Regs[AY_BVOL]*2+1 : 0];
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break;
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case AY_CVOL:
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2007-05-29 05:16:51 +00:00
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PSG->Regs[AY_CVOL] &= 0x1F;
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2007-05-29 03:06:33 +00:00
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PSG->EnvelopeC = PSG->Regs[AY_CVOL] & 0x10;
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PSG->VolC = PSG->EnvelopeC ? PSG->VolE : PSG->VolTable[PSG->Regs[AY_CVOL] ? PSG->Regs[AY_CVOL]*2+1 : 0];
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break;
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case AY_EFINE:
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case AY_ECOARSE:
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old = PSG->PeriodE;
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PSG->PeriodE = ((PSG->Regs[AY_EFINE] + 256 * PSG->Regs[AY_ECOARSE])) * PSG->UpdateStep;
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2007-05-29 05:16:51 +00:00
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2007-07-02 16:13:08 +00:00
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if (PSG->PeriodE == 0)
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PSG->PeriodE = PSG->UpdateStep / 2;
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2007-05-29 05:16:51 +00:00
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2007-05-29 03:06:33 +00:00
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PSG->CountE += PSG->PeriodE - old;
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2007-05-29 05:16:51 +00:00
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2007-07-02 16:13:08 +00:00
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if (PSG->CountE <= 0)
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PSG->CountE = 1;
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2007-05-29 03:06:33 +00:00
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break;
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case AY_ESHAPE:
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/* envelope shapes:
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C AtAlH
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0 0 x x \___
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0 1 x x /___
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1 0 0 0 \\\\
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1 0 0 1 \___
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1 0 1 0 \/\/
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___
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1 0 1 1 \
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1 1 0 0 ////
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___
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1 1 0 1 /
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1 1 1 0 /\/\
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1 1 1 1 /___
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The envelope counter on the AY-3-8910 has 16 steps. On the YM2149 it
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has twice the steps, happening twice as fast. Since the end result is
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just a smoother curve, we always use the YM2149 behaviour.
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*/
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2007-05-29 05:16:51 +00:00
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PSG->Regs[AY_ESHAPE] &= 0x0F;
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PSG->Attack = (PSG->Regs[AY_ESHAPE] & 0x04) ? 0x1F : 0x00;
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2007-05-29 03:06:33 +00:00
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if ((PSG->Regs[AY_ESHAPE] & 0x08) == 0)
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{
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/* if Continue = 0, map the shape to the equivalent one which has Continue = 1 */
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PSG->Hold = 1;
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PSG->Alternate = PSG->Attack;
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}
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else
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{
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PSG->Hold = PSG->Regs[AY_ESHAPE] & 0x01;
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PSG->Alternate = PSG->Regs[AY_ESHAPE] & 0x02;
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}
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2007-05-29 05:16:51 +00:00
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2007-05-29 03:06:33 +00:00
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PSG->CountE = PSG->PeriodE;
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2007-05-29 05:16:51 +00:00
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PSG->CountEnv = 0x1F;
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2007-05-29 03:06:33 +00:00
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PSG->Holding = 0;
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PSG->VolE = PSG->VolTable[PSG->CountEnv ^ PSG->Attack];
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2007-05-29 05:16:51 +00:00
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2007-07-02 16:13:08 +00:00
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if (PSG->EnvelopeA)
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PSG->VolA = PSG->VolE;
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if (PSG->EnvelopeB)
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PSG->VolB = PSG->VolE;
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if (PSG->EnvelopeC)
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PSG->VolC = PSG->VolE;
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2007-05-29 03:06:33 +00:00
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break;
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case AY_PORTA:
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if (PSG->Regs[AY_ENABLE] & 0x40)
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{
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// if (PSG->PortAwrite)
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// (*PSG->PortAwrite)(0, PSG->Regs[AY_PORTA]);
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// else
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// logerror("PC %04x: warning - write %02x to 8910 #%d Port A\n",activecpu_get_pc(),PSG->Regs[AY_PORTA],n);
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}
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else
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{
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// logerror("warning: write to 8910 #%d Port A set as input - ignored\n",n);
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}
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break;
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case AY_PORTB:
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if (PSG->Regs[AY_ENABLE] & 0x80)
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{
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// if (PSG->PortBwrite)
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// (*PSG->PortBwrite)(0, PSG->Regs[AY_PORTB]);
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// else
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// logerror("PC %04x: warning - write %02x to 8910 #%d Port B\n",activecpu_get_pc(),PSG->Regs[AY_PORTB],n);
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}
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else
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{
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// logerror("warning: write to 8910 #%d Port B set as input - ignored\n",n);
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}
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break;
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}
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}
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// /length/ is the number of samples we require
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// NB. This should be called at twice the 6522 IRQ rate or (eg) 60Hz if no IRQ.
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2013-09-09 02:18:23 +00:00
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void AY8910Update(int chip, int16_t ** buffer, int length) // [TC: Removed static]
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2007-05-29 03:06:33 +00:00
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{
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2007-05-29 05:16:51 +00:00
|
|
|
struct AY8910 * PSG = &AYPSG[chip];
|
2013-09-09 02:18:23 +00:00
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|
int16_t * buf1, * buf2, * buf3;
|
2007-05-29 03:06:33 +00:00
|
|
|
int outn;
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|
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|
buf1 = buffer[0];
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|
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buf2 = buffer[1];
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|
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|
buf3 = buffer[2];
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|
|
|
|
2007-05-29 05:16:51 +00:00
|
|
|
/* The 8910 has three outputs, each output is the mix of one of the three *
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|
|
|
* tone generators and of the (single) noise generator. The two are mixed *
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|
|
* BEFORE going into the DAC. The formula to mix each channel is: *
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* (ToneOn | ToneDisable) & (NoiseOn | NoiseDisable). *
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|
|
* Note that this means that if both tone and noise are disabled, the output *
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* is 1, not 0, and can be modulated changing the volume. *
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|
* *
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|
|
* If the channels are disabled, set their output to 1, and increase the *
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|
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* counter, if necessary, so they will not be inverted during this update. *
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* Setting the output to 1 is necessary because a disabled channel is locked *
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|
* into the ON state (see above); and it has no effect if the volume is 0. *
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|
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* If the volume is 0, increase the counter, but don't touch the output. */
|
2007-05-29 03:06:33 +00:00
|
|
|
if (PSG->Regs[AY_ENABLE] & 0x01)
|
|
|
|
{
|
2007-07-02 16:13:08 +00:00
|
|
|
if (PSG->CountA <= length * STEP)
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|
|
PSG->CountA += length * STEP;
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|
2007-05-29 03:06:33 +00:00
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|
PSG->OutputA = 1;
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|
|
|
}
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|
|
|
else if (PSG->Regs[AY_AVOL] == 0)
|
|
|
|
{
|
2007-05-29 05:16:51 +00:00
|
|
|
/* note that I do count += length, NOT count = length + 1. You might think *
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|
|
* it's the same since the volume is 0, but doing the latter could cause *
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|
|
* interferencies when the program is rapidly modulating the volume. */
|
2007-07-02 16:13:08 +00:00
|
|
|
if (PSG->CountA <= length * STEP)
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|
|
PSG->CountA += length * STEP;
|
2007-05-29 03:06:33 +00:00
|
|
|
}
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
if (PSG->Regs[AY_ENABLE] & 0x02)
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|
|
|
{
|
2007-07-02 16:13:08 +00:00
|
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|
if (PSG->CountB <= length * STEP)
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|
|
PSG->CountB += length * STEP;
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|
2007-05-29 03:06:33 +00:00
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|
PSG->OutputB = 1;
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|
|
|
}
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else if (PSG->Regs[AY_BVOL] == 0)
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|
|
|
{
|
2007-07-02 16:13:08 +00:00
|
|
|
if (PSG->CountB <= length * STEP)
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|
|
PSG->CountB += length * STEP;
|
2007-05-29 03:06:33 +00:00
|
|
|
}
|
2007-05-29 05:16:51 +00:00
|
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|
|
2007-05-29 03:06:33 +00:00
|
|
|
if (PSG->Regs[AY_ENABLE] & 0x04)
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|
|
|
{
|
2007-07-02 16:13:08 +00:00
|
|
|
if (PSG->CountC <= length * STEP)
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|
|
|
PSG->CountC += length * STEP;
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|
2007-05-29 03:06:33 +00:00
|
|
|
PSG->OutputC = 1;
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|
|
|
}
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|
|
else if (PSG->Regs[AY_CVOL] == 0)
|
|
|
|
{
|
2007-07-02 16:13:08 +00:00
|
|
|
if (PSG->CountC <= length * STEP)
|
|
|
|
PSG->CountC += length * STEP;
|
2007-05-29 03:06:33 +00:00
|
|
|
}
|
|
|
|
|
2007-05-29 05:16:51 +00:00
|
|
|
/* for the noise channel we must not touch OutputN - it's also not necessary *
|
|
|
|
* since we use outn. */
|
2007-05-29 03:06:33 +00:00
|
|
|
if ((PSG->Regs[AY_ENABLE] & 0x38) == 0x38) /* all off */
|
2007-07-02 16:13:08 +00:00
|
|
|
if (PSG->CountN <= length * STEP)
|
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|
|
PSG->CountN += length * STEP;
|
2007-05-29 03:06:33 +00:00
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outn = (PSG->OutputN | PSG->Regs[AY_ENABLE]);
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|
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|
|
/* buffering loop */
|
|
|
|
while (length)
|
|
|
|
{
|
2007-05-29 05:16:51 +00:00
|
|
|
int vola, volb, volc;
|
2007-05-29 03:06:33 +00:00
|
|
|
int left;
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|
|
|
2007-05-29 05:16:51 +00:00
|
|
|
/* vola, volb and volc keep track of how long each square wave stays *
|
|
|
|
* in the 1 position during the sample period. */
|
2007-05-29 03:06:33 +00:00
|
|
|
vola = volb = volc = 0;
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|
|
|
|
|
|
left = STEP;
|
|
|
|
do
|
|
|
|
{
|
|
|
|
int nextevent;
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|
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|
2007-07-02 16:13:08 +00:00
|
|
|
if (PSG->CountN < left)
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|
nextevent = PSG->CountN;
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|
else
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|
nextevent = left;
|
2007-05-29 03:06:33 +00:00
|
|
|
|
|
|
|
if (outn & 0x08)
|
|
|
|
{
|
2007-07-02 16:13:08 +00:00
|
|
|
if (PSG->OutputA)
|
|
|
|
vola += PSG->CountA;
|
2007-05-29 05:16:51 +00:00
|
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|
2007-05-29 03:06:33 +00:00
|
|
|
PSG->CountA -= nextevent;
|
2007-05-29 05:16:51 +00:00
|
|
|
/* PeriodA is the half period of the square wave. Here, in each *
|
|
|
|
* loop I add PeriodA twice, so that at the end of the loop the *
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|
|
|
* square wave is in the same status (0 or 1) it was at the start. *
|
|
|
|
* vola is also incremented by PeriodA, since the wave has been 1 *
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|
|
* exactly half of the time, regardless of the initial position. *
|
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|
|
* If we exit the loop in the middle, OutputA has to be inverted *
|
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|
|
* and vola incremented only if the exit status of the square *
|
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|
|
* wave is 1. */
|
2007-05-29 03:06:33 +00:00
|
|
|
while (PSG->CountA <= 0)
|
|
|
|
{
|
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|
PSG->CountA += PSG->PeriodA;
|
2007-05-29 05:16:51 +00:00
|
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|
|
2007-05-29 03:06:33 +00:00
|
|
|
if (PSG->CountA > 0)
|
|
|
|
{
|
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|
PSG->OutputA ^= 1;
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-07-02 16:13:08 +00:00
|
|
|
if (PSG->OutputA)
|
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|
|
vola += PSG->PeriodA;
|
2007-05-29 03:06:33 +00:00
|
|
|
break;
|
|
|
|
}
|
2007-05-29 05:16:51 +00:00
|
|
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|
2007-05-29 03:06:33 +00:00
|
|
|
PSG->CountA += PSG->PeriodA;
|
|
|
|
vola += PSG->PeriodA;
|
|
|
|
}
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-07-02 16:13:08 +00:00
|
|
|
if (PSG->OutputA)
|
|
|
|
vola -= PSG->CountA;
|
2007-05-29 03:06:33 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
PSG->CountA -= nextevent;
|
|
|
|
while (PSG->CountA <= 0)
|
|
|
|
{
|
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|
PSG->CountA += PSG->PeriodA;
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
if (PSG->CountA > 0)
|
|
|
|
{
|
|
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|
PSG->OutputA ^= 1;
|
|
|
|
break;
|
|
|
|
}
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
PSG->CountA += PSG->PeriodA;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (outn & 0x10)
|
|
|
|
{
|
2007-07-02 16:13:08 +00:00
|
|
|
if (PSG->OutputB)
|
|
|
|
volb += PSG->CountB;
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
PSG->CountB -= nextevent;
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
while (PSG->CountB <= 0)
|
|
|
|
{
|
|
|
|
PSG->CountB += PSG->PeriodB;
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
if (PSG->CountB > 0)
|
|
|
|
{
|
|
|
|
PSG->OutputB ^= 1;
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-07-02 16:13:08 +00:00
|
|
|
if (PSG->OutputB)
|
|
|
|
volb += PSG->PeriodB;
|
2007-05-29 03:06:33 +00:00
|
|
|
break;
|
|
|
|
}
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
PSG->CountB += PSG->PeriodB;
|
|
|
|
volb += PSG->PeriodB;
|
|
|
|
}
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-07-02 16:13:08 +00:00
|
|
|
if (PSG->OutputB)
|
|
|
|
volb -= PSG->CountB;
|
2007-05-29 03:06:33 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
PSG->CountB -= nextevent;
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
while (PSG->CountB <= 0)
|
|
|
|
{
|
|
|
|
PSG->CountB += PSG->PeriodB;
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
if (PSG->CountB > 0)
|
|
|
|
{
|
|
|
|
PSG->OutputB ^= 1;
|
|
|
|
break;
|
|
|
|
}
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
PSG->CountB += PSG->PeriodB;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (outn & 0x20)
|
|
|
|
{
|
2007-07-02 16:13:08 +00:00
|
|
|
if (PSG->OutputC)
|
|
|
|
volc += PSG->CountC;
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
PSG->CountC -= nextevent;
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
while (PSG->CountC <= 0)
|
|
|
|
{
|
|
|
|
PSG->CountC += PSG->PeriodC;
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
if (PSG->CountC > 0)
|
|
|
|
{
|
|
|
|
PSG->OutputC ^= 1;
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-07-02 16:13:08 +00:00
|
|
|
if (PSG->OutputC)
|
|
|
|
volc += PSG->PeriodC;
|
2007-05-29 03:06:33 +00:00
|
|
|
break;
|
|
|
|
}
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
PSG->CountC += PSG->PeriodC;
|
|
|
|
volc += PSG->PeriodC;
|
|
|
|
}
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-07-02 16:13:08 +00:00
|
|
|
if (PSG->OutputC)
|
|
|
|
volc -= PSG->CountC;
|
2007-05-29 03:06:33 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
PSG->CountC -= nextevent;
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
while (PSG->CountC <= 0)
|
|
|
|
{
|
|
|
|
PSG->CountC += PSG->PeriodC;
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
if (PSG->CountC > 0)
|
|
|
|
{
|
|
|
|
PSG->OutputC ^= 1;
|
|
|
|
break;
|
|
|
|
}
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
PSG->CountC += PSG->PeriodC;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
PSG->CountN -= nextevent;
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
if (PSG->CountN <= 0)
|
|
|
|
{
|
|
|
|
/* Is noise output going to change? */
|
2007-05-29 05:16:51 +00:00
|
|
|
if ((PSG->RNG + 1) & 0x00002) /* (bit0^bit1)? */
|
2007-05-29 03:06:33 +00:00
|
|
|
{
|
|
|
|
PSG->OutputN = ~PSG->OutputN;
|
|
|
|
outn = (PSG->OutputN | PSG->Regs[AY_ENABLE]);
|
|
|
|
}
|
|
|
|
|
2007-05-29 05:16:51 +00:00
|
|
|
/* The Random Number Generator of the 8910 is a 17-bit shift *
|
|
|
|
* register. The input to the shift register is bit0 XOR bit3 *
|
|
|
|
* (bit0 is the output). This was verified on AY-3-8910 and *
|
|
|
|
* YM2149 chips. *
|
|
|
|
* *
|
|
|
|
* The following is a fast way to compute bit17 = bit0^bit3. *
|
|
|
|
* Instead of doing all the logic operations, we only check *
|
|
|
|
* bit0, relying on the fact that after three shifts of the *
|
|
|
|
* register, what now is bit3 will become bit0, and will *
|
|
|
|
* invert, if necessary, bit14, which previously was bit17. */
|
|
|
|
if (PSG->RNG & 0x00001)
|
|
|
|
PSG->RNG ^= 0x24000; /* This version is called the "Galois configuration". */
|
2007-05-29 03:06:33 +00:00
|
|
|
|
|
|
|
PSG->RNG >>= 1;
|
|
|
|
PSG->CountN += PSG->PeriodN;
|
|
|
|
}
|
|
|
|
|
|
|
|
left -= nextevent;
|
2007-05-29 05:16:51 +00:00
|
|
|
}
|
|
|
|
while (left > 0);
|
2007-05-29 03:06:33 +00:00
|
|
|
|
|
|
|
/* update envelope */
|
|
|
|
if (PSG->Holding == 0)
|
|
|
|
{
|
|
|
|
PSG->CountE -= STEP;
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
if (PSG->CountE <= 0)
|
|
|
|
{
|
|
|
|
do
|
|
|
|
{
|
|
|
|
PSG->CountEnv--;
|
|
|
|
PSG->CountE += PSG->PeriodE;
|
2007-05-29 05:16:51 +00:00
|
|
|
}
|
|
|
|
while (PSG->CountE <= 0);
|
2007-05-29 03:06:33 +00:00
|
|
|
|
|
|
|
/* check envelope current position */
|
|
|
|
if (PSG->CountEnv < 0)
|
|
|
|
{
|
|
|
|
if (PSG->Hold)
|
|
|
|
{
|
|
|
|
if (PSG->Alternate)
|
2007-05-29 05:16:51 +00:00
|
|
|
PSG->Attack ^= 0x1F;
|
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
PSG->Holding = 1;
|
|
|
|
PSG->CountEnv = 0;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2007-05-29 05:16:51 +00:00
|
|
|
/* if CountEnv has looped an odd number of times (usually 1), *
|
|
|
|
* invert the output. */
|
2007-05-29 03:06:33 +00:00
|
|
|
if (PSG->Alternate && (PSG->CountEnv & 0x20))
|
2007-05-29 05:16:51 +00:00
|
|
|
PSG->Attack ^= 0x1F;
|
2007-05-29 03:06:33 +00:00
|
|
|
|
2007-05-29 05:16:51 +00:00
|
|
|
PSG->CountEnv &= 0x1F;
|
2007-05-29 03:06:33 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
PSG->VolE = PSG->VolTable[PSG->CountEnv ^ PSG->Attack];
|
|
|
|
/* reload volume */
|
2007-07-02 16:13:08 +00:00
|
|
|
if (PSG->EnvelopeA)
|
|
|
|
PSG->VolA = PSG->VolE;
|
|
|
|
|
|
|
|
if (PSG->EnvelopeB)
|
|
|
|
PSG->VolB = PSG->VolE;
|
|
|
|
|
|
|
|
if (PSG->EnvelopeC)
|
|
|
|
PSG->VolC = PSG->VolE;
|
2007-05-29 03:06:33 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
*(buf1++) = (vola * PSG->VolA) / STEP;
|
|
|
|
*(buf2++) = (volb * PSG->VolB) / STEP;
|
|
|
|
*(buf3++) = (volc * PSG->VolC) / STEP;
|
2007-05-29 05:16:51 +00:00
|
|
|
#else // [Tom's code...]
|
2007-05-29 03:06:33 +00:00
|
|
|
// Output PCM wave [-32768...32767] instead of MAME's voltage level [0...32767]
|
|
|
|
// - This allows for better s/w mixing
|
|
|
|
|
2007-05-29 05:16:51 +00:00
|
|
|
if (PSG->VolA)
|
2007-05-29 03:06:33 +00:00
|
|
|
{
|
2007-05-29 05:16:51 +00:00
|
|
|
if (vola)
|
2007-05-29 03:06:33 +00:00
|
|
|
*(buf1++) = (vola * PSG->VolA) / STEP;
|
|
|
|
else
|
2007-05-29 05:16:51 +00:00
|
|
|
*(buf1++) = -(int)PSG->VolA;
|
2007-05-29 03:06:33 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
*(buf1++) = 0;
|
|
|
|
|
2007-05-29 05:16:51 +00:00
|
|
|
if (PSG->VolB)
|
2007-05-29 03:06:33 +00:00
|
|
|
{
|
2007-05-29 05:16:51 +00:00
|
|
|
if (volb)
|
2007-05-29 03:06:33 +00:00
|
|
|
*(buf2++) = (volb * PSG->VolB) / STEP;
|
|
|
|
else
|
2007-05-29 05:16:51 +00:00
|
|
|
*(buf2++) = -(int)PSG->VolB;
|
2007-05-29 03:06:33 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
*(buf2++) = 0;
|
|
|
|
|
2007-05-29 05:16:51 +00:00
|
|
|
if (PSG->VolC)
|
2007-05-29 03:06:33 +00:00
|
|
|
{
|
2007-05-29 05:16:51 +00:00
|
|
|
if (volc)
|
2007-05-29 03:06:33 +00:00
|
|
|
*(buf3++) = (volc * PSG->VolC) / STEP;
|
|
|
|
else
|
2007-05-29 05:16:51 +00:00
|
|
|
*(buf3++) = -(int)PSG->VolC;
|
2007-05-29 03:06:33 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
*(buf3++) = 0;
|
|
|
|
#endif
|
|
|
|
length--;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2007-05-29 05:16:51 +00:00
|
|
|
static void AY8910_set_clock(int chip, int clock)
|
2007-05-29 03:06:33 +00:00
|
|
|
{
|
2007-05-29 05:16:51 +00:00
|
|
|
struct AY8910 * PSG = &AYPSG[chip];
|
|
|
|
|
|
|
|
/* The step clock for the tone and noise generators is the chip clock *
|
|
|
|
* divided by 8; for the envelope generator of the AY-3-8910, it is half *
|
|
|
|
* that much (clock/16), but the envelope of the YM2149 goes twice as *
|
|
|
|
* fast, therefore again clock/8. *
|
|
|
|
* Here we calculate the number of steps which happen during one sample *
|
|
|
|
* at the given sample rate. No. of events = sample rate / (clock/8). *
|
|
|
|
* STEP is a multiplier used to turn the fraction into a fixed point *
|
|
|
|
* number. */
|
|
|
|
PSG->UpdateStep = (unsigned int)(((double)STEP * PSG->SampleRate * 8 + clock / 2) / clock); // [TC: unsigned int cast]
|
2007-05-29 03:06:33 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static void build_mixer_table(int chip)
|
|
|
|
{
|
2007-05-29 05:16:51 +00:00
|
|
|
struct AY8910 * PSG = &AYPSG[chip];
|
2007-05-29 03:06:33 +00:00
|
|
|
|
2007-05-29 05:16:51 +00:00
|
|
|
/* calculate the volume->voltage conversion table */
|
2007-05-29 03:06:33 +00:00
|
|
|
/* The AY-3-8910 has 16 levels, in a logarithmic scale (3dB per step) */
|
|
|
|
/* The YM2149 still has 16 levels for the tone generators, but 32 for */
|
2007-05-29 05:16:51 +00:00
|
|
|
/* the envelope generator (1.5dB per step). */
|
|
|
|
double out = MAX_OUTPUT;
|
2007-05-29 05:00:36 +00:00
|
|
|
|
2007-05-29 05:16:51 +00:00
|
|
|
for(int i=31; i>0; i--)
|
|
|
|
{
|
|
|
|
PSG->VolTable[i] = (unsigned int)(out + 0.5); /* round to nearest */ // [TC: unsigned int cast]
|
2007-05-29 03:06:33 +00:00
|
|
|
out /= 1.188502227; /* = 10 ^ (1.5/20) = 1.5dB */
|
|
|
|
}
|
2007-05-29 05:16:51 +00:00
|
|
|
|
2007-05-29 03:06:33 +00:00
|
|
|
PSG->VolTable[0] = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void AY8910_reset(int chip)
|
|
|
|
{
|
|
|
|
int i;
|
2007-05-29 05:16:51 +00:00
|
|
|
struct AY8910 * PSG = &AYPSG[chip];
|
2007-05-29 03:06:33 +00:00
|
|
|
|
|
|
|
PSG->register_latch = 0;
|
|
|
|
PSG->RNG = 1;
|
|
|
|
PSG->OutputA = 0;
|
|
|
|
PSG->OutputB = 0;
|
|
|
|
PSG->OutputC = 0;
|
2007-05-29 05:16:51 +00:00
|
|
|
PSG->OutputN = 0xFF;
|
2007-05-29 03:06:33 +00:00
|
|
|
PSG->lastEnable = -1; /* force a write */
|
2007-05-29 05:16:51 +00:00
|
|
|
|
|
|
|
for(i=0; i<AY_PORTA; i++)
|
|
|
|
_AYWriteReg(chip, i, 0); /* AYWriteReg() uses the timer system; we cannot */
|
|
|
|
/* call it at this time because the timer system */
|
|
|
|
/* has not been initialized. */
|
2007-05-29 03:06:33 +00:00
|
|
|
}
|
|
|
|
|
2007-05-29 05:16:51 +00:00
|
|
|
// This stuff looks like Tom's code, so let's streamline and un-MSHungarianize this shit:
|
|
|
|
// [DONE]
|
2007-05-29 03:06:33 +00:00
|
|
|
|
2007-05-29 05:16:51 +00:00
|
|
|
void AY8910_InitAll(int clock, int sampleRate)
|
2007-05-29 03:06:33 +00:00
|
|
|
{
|
2007-05-29 05:16:51 +00:00
|
|
|
for(int chip=0; chip<MAX_8910; chip++)
|
2007-05-29 03:06:33 +00:00
|
|
|
{
|
2007-05-29 05:16:51 +00:00
|
|
|
struct AY8910 * PSG = &AYPSG[chip];
|
2007-05-29 03:06:33 +00:00
|
|
|
|
2007-05-29 05:16:51 +00:00
|
|
|
memset(PSG, 0, sizeof(struct AY8910));
|
|
|
|
PSG->SampleRate = sampleRate;
|
|
|
|
AY8910_set_clock(chip, clock);
|
|
|
|
build_mixer_table(chip);
|
2007-05-29 03:06:33 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-05-29 05:16:51 +00:00
|
|
|
void AY8910_InitClock(int clock)
|
2007-05-29 03:06:33 +00:00
|
|
|
{
|
2007-05-29 05:16:51 +00:00
|
|
|
for(int chip=0; chip<MAX_8910; chip++)
|
|
|
|
AY8910_set_clock(chip, clock);
|
2007-05-29 03:06:33 +00:00
|
|
|
}
|
|
|
|
|
2013-09-09 02:18:23 +00:00
|
|
|
uint8_t * AY8910_GetRegsPtr(uint16_t chipNum)
|
2007-05-29 03:06:33 +00:00
|
|
|
{
|
2007-05-29 05:16:51 +00:00
|
|
|
if (chipNum >= MAX_8910)
|
2007-05-29 03:06:33 +00:00
|
|
|
return NULL;
|
|
|
|
|
2007-05-29 05:16:51 +00:00
|
|
|
return &AYPSG[chipNum].Regs[0];
|
2007-05-29 03:06:33 +00:00
|
|
|
}
|