199 lines
3.3 KiB
C++
199 lines
3.3 KiB
C++
//
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// Virtual 6522 Versatile Interface Adapter
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//
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// by James Hammons
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// (C) 2018 Underground Software
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//
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#include "v6522via.h"
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#include <string.h> // for memset()
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#include "log.h"
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/*
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Register Function
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-------- -------------------------
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0 Output Register B
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1 Output Register A
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2 Data Direction Register B
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3 Data Direction Register A
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4 Timer 1 Low byte counter (& latch)
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5 Timer 1 Hgh byte counter (& latch)
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6 Timer 1 Low byte latch
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7 Timer 1 Hgh byte latch (& reset IRQ flag)
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B Aux Control Register
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D Interrupt Flag Register
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E Interrupt Enable Register
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bit 6 of ACR:
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0: Timed interrupt each time Timer 1 is loaded
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1: Continuous interrupts
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bit 7 enables PB7 (bit 6 controls output type):
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0: One shot output
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1: Square wave output
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*/
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V6522VIA::V6522VIA(): orb(0), ora(0), ddrb(0), ddra(0),
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timer1counter(0), timer1latch(0), timer2counter(0),
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acr(0), ifr(0), ier(0)
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{
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}
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void V6522VIA::Reset(void)
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{
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memset(this, 0, sizeof(V6522VIA));
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}
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uint8_t V6522VIA::Read(uint8_t regNum)
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{
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switch (regNum)
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{
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case 0x00:
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//For some reason, this prevents Ankh from loading. Need to figure out what the MB *really* returns in its uninitialized state...
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// return orb & ddrb;
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return 0xFF;
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case 0x01:
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return ora & ddra;
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case 0x02:
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return ddrb;
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case 0x03:
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return ddra;
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case 0x04:
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return timer1counter & 0xFF;
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case 0x05:
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return (timer1counter & 0xFF00) >> 8;
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case 0x06:
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return timer1latch & 0xFF;
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case 0x07:
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return (timer1latch & 0xFF00) >> 8;
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case 0x08:
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return timer2counter & 0xFF;
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case 0x09:
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return (timer2counter & 0xFF00) >> 8;
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case 0x0B:
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return acr;
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case 0x0D:
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return (ifr & 0x7F) | (ifr & 0x7F ? 0x80 : 0);
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case 0x0E:
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return ier | 0x80;
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default:
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WriteLog("Unhandled 6522 register %X read (chip %d)\n", regNum, id);
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}
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return 0;
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}
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void V6522VIA::Write(uint8_t regNum, uint8_t byte)
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{
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switch (regNum)
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{
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case 0x00:
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orb = byte;
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break;
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case 0x01:
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ora = byte;
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break;
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case 0x02:
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ddrb = byte;
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break;
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case 0x03:
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ddra = byte;
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break;
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case 0x04:
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timer1latch = (timer1latch & 0xFF00) | byte;
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break;
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case 0x05:
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timer1latch = (timer1latch & 0x00FF) | (((uint16_t)byte) << 8);
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timer1counter = timer1latch;
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ifr &= 0x3F; // Clear T1 interrupt flag
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break;
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case 0x06:
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timer1latch = (timer1latch & 0xFF00)
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| byte;
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break;
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case 0x07:
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timer1latch = (timer1latch & 0x00FF) | (((uint16_t)byte) << 8);
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ifr &= 0x3F; // Clear T1 interrupt flag
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break;
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case 0x0B:
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acr = byte;
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break;
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case 0x0D:
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ifr &= ~byte;
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break;
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case 0x0E:
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if (byte & 0x80)
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// Setting bits in the IER
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ier |= byte;
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else
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// Clearing bits in the IER
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ier &= ~byte;
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break;
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default:
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WriteLog("Unhandled 6522 register $%X write $%02X (chip %d)\n", regNum, byte, id);
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}
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}
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bool V6522VIA::Run(uint16_t cycles)
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{
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// This is to signal to the caller that we hit an IRQ condition
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bool response = false;
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bool viaT1HitZero = (timer1counter <= cycles ? true : false);
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timer1counter -= cycles;
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timer2counter -= cycles;
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if (viaT1HitZero)
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{
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if (acr & 0x40)
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{
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timer1counter += timer1latch;
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if (ier & 0x40)
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{
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ifr |= (0x80 | 0x40);
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response = true;
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}
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}
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else
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{
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// Disable T1 interrupt
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ier &= 0x3F;
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}
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}
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return response;
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}
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