2017-07-01 22:39:26 +00:00
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* Copyright (c) 2017 Stephen Heumann
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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2017-06-30 01:51:36 +00:00
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* Right-rotate 32-bit value in &loc (DP or 16-bit address) by &n positions
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macro
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ROTR4 &loc,&n
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aif &n>16,.dorotl
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lda &loc+2
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lcla &i
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&i seta &n
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.rotrloop
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lsr a ;to set carry
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ror &loc
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ror &loc+2
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&i seta &i-1
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aif &i>0,.rotrloop
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ago .end
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.dorotl
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ROTL4 &loc,32-&n
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.end
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mend
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* Left-rotate 32-bit value in &loc (DP or 16-bit address) by &n positions
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macro
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ROTL4 &loc,&n
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2017-06-30 05:15:47 +00:00
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aif &n>16,.dorotr2
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2017-06-30 01:51:36 +00:00
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lda &loc
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lcla &i
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&i seta &n
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2017-06-30 05:15:47 +00:00
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.rotlloop2
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2017-06-30 01:51:36 +00:00
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asl a ;to set carry
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rol &loc+2
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rol &loc
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&i seta &i-1
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2017-06-30 05:15:47 +00:00
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aif &i>0,.rotlloop2
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ago .end2
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.dorotr2
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2017-06-30 01:51:36 +00:00
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ROTR4 &loc,32-&n
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2017-06-30 05:15:47 +00:00
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.end2
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2017-06-30 01:51:36 +00:00
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mend
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* &to := &from ROTR4 &n
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macro
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ROTR4MOVE &to,&from,&n
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2017-06-30 05:15:47 +00:00
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aif &n>16,.dorotl3
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2017-06-30 01:51:36 +00:00
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lda &from
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sta &to
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lda &from+2
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sta &to+2
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lcla &i
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&i seta &n
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2017-06-30 05:15:47 +00:00
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.rotrloop3
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2017-06-30 01:51:36 +00:00
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lsr a ;to set carry
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ror &to
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ror &to+2
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&i seta &i-1
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2017-06-30 05:15:47 +00:00
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aif &i>0,.rotrloop3
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ago .end3
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2017-07-03 02:35:17 +00:00
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.dorotl3
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2017-06-30 01:51:36 +00:00
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ROTL4MOVE &to,&from,32-&n
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2017-06-30 05:15:47 +00:00
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.end3
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2017-06-30 01:51:36 +00:00
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mend
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* &to := &from ROTL4 &n
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macro
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ROTL4MOVE &to,&from,&n
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2017-06-30 05:15:47 +00:00
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aif &n>16,.dorotr4
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2017-06-30 01:51:36 +00:00
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lda &from+2
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sta &to+2
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lda &from
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sta &to
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lcla &i
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&i seta &n
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2017-06-30 05:15:47 +00:00
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.rotlloop4
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2017-06-30 01:51:36 +00:00
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asl a ;to set carry
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rol &to+2
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rol &to
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&i seta &i-1
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2017-06-30 05:15:47 +00:00
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aif &i>0,.rotlloop4
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ago .end4
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.dorotr4
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2017-06-30 01:51:36 +00:00
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ROTR4MOVE &to,&from,32-&n
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2017-06-30 05:15:47 +00:00
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.end4
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2017-06-30 01:51:36 +00:00
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mend
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2017-06-29 21:54:49 +00:00
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* This makes a function wrapper that is callable from C,
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* taking a pointer to the context structure as its argument.
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macro
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CFunction &fn
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phb
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plx
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ply
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tdc
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pld
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plb
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plb
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phy
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phx
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plb
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pha
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jsl &fn
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pld
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rtl
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mend
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* Macros to operate on elements of the message schedule (W)
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macro
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&lab lda_w &i,&inc
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2017-06-30 03:22:06 +00:00
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lcla &j
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&j seta &i
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.modloop1
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aif &j<20,.goodidx1
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&j seta &j-20
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ago .modloop1
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.goodidx1
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2017-06-29 21:54:49 +00:00
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aif C:&inc<>0,.haveinc
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lcla &inc
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.haveinc
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2017-06-30 03:22:06 +00:00
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&lab lda w+(&j)*4+&inc
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2017-06-29 21:54:49 +00:00
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mend
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macro
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&lab eor_w &i,&inc
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2017-06-30 03:22:06 +00:00
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lcla &j
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&j seta &i
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.modloop2
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aif &j<20,.goodidx2
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&j seta &j-20
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ago .modloop2
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.goodidx2
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2017-06-29 21:54:49 +00:00
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aif C:&inc<>0,.haveinc
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lcla &inc
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.haveinc
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2017-06-30 03:22:06 +00:00
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&lab eor w+(&j)*4+&inc
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2017-06-29 21:54:49 +00:00
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mend
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macro
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&lab sta_w &i,&inc
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2017-06-30 03:22:06 +00:00
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lcla &j
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&j seta &i
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.modloop3
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aif &j<20,.goodidx3
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&j seta &j-20
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ago .modloop3
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.goodidx3
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2017-06-29 21:54:49 +00:00
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aif C:&inc<>0,.haveinc
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lcla &inc
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.haveinc
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2017-06-30 03:22:06 +00:00
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&lab sta w+(&j)*4+&inc
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2017-06-29 21:54:49 +00:00
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mend
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macro
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&lab rol_w &i,&inc
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2017-06-30 03:22:06 +00:00
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lcla &j
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&j seta &i
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.modloop4
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aif &j<20,.goodidx4
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&j seta &j-20
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ago .modloop4
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.goodidx4
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2017-06-29 21:54:49 +00:00
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aif C:&inc<>0,.haveinc
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lcla &inc
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.haveinc
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2017-06-30 03:22:06 +00:00
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&lab rol w+(&j)*4+&inc
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2017-06-29 21:54:49 +00:00
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mend
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2017-06-30 03:22:06 +00:00
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* Compute one part of the message schedule (20 elements)
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2017-06-29 21:54:49 +00:00
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macro
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2017-06-30 03:22:06 +00:00
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ComputeSchedule &part
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2017-06-29 21:54:49 +00:00
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lcla &i
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2017-07-01 22:39:26 +00:00
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; Flip the endianness of W_0 to W_15 (the current block of the message)
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2017-06-30 03:22:06 +00:00
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aif &part<>1,.skippart1
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2017-06-29 21:54:49 +00:00
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.loop1
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lda w+&i*4
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xba
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ldx w+&i*4+2
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sta w+&i*4+2
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txa
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xba
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sta w+&i*4
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&i seta &i+1
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aif &i<16,.loop1
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2017-06-30 03:22:06 +00:00
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.skippart1
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2017-06-29 21:54:49 +00:00
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; compute the rest of the message schedule (W_16 to W_79)
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2017-06-30 03:22:06 +00:00
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aif &part=1,.loop2
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&i seta (&part-1)*20
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2017-06-29 21:54:49 +00:00
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.loop2
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lda_w &i-3
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eor_w &i-8
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eor_w &i-14
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eor_w &i-16
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sta_w &i
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asl a ; to set carry
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lda_w &i-3,2
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eor_w &i-8,2
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eor_w &i-14,2
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eor_w &i-16,2
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rol a
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sta_w &i,2
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rol_w &i
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&i seta &i+1
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2017-06-30 03:22:06 +00:00
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aif &i<&part*20,.loop2
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2017-06-29 21:54:49 +00:00
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mend
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2017-06-30 01:51:36 +00:00
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2017-06-30 05:15:47 +00:00
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* One iteration of the loop for processing blocks.
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2017-07-03 02:35:17 +00:00
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* The a,b,c,d,e variables are given as parameters so we can avoid cycling them.
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2017-06-30 01:51:36 +00:00
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macro
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2017-06-30 05:34:09 +00:00
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BlockLoopIter &a,&b,&c,&d,&e,&iter
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2017-06-30 01:51:36 +00:00
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* f_0 to f_19
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aif &part<>1,.skip1
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2017-06-30 05:15:47 +00:00
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lda &c
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eor &d
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and &b
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eor &d
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2017-06-30 01:51:36 +00:00
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clc
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adc #$7999
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sta f_plus_k
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2017-06-30 05:15:47 +00:00
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lda &c+2
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eor &d+2
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and &b+2
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eor &d+2
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2017-06-30 01:51:36 +00:00
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adc #$5A82
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sta f_plus_k+2
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.skip1
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* f_20 to f_39
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aif &part<>2,.skip2
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2017-06-30 05:15:47 +00:00
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lda &b
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eor &c
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eor &d
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2017-06-30 01:51:36 +00:00
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clc
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adc #$EBA1
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sta f_plus_k
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2017-06-30 05:15:47 +00:00
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lda &b+2
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eor &c+2
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eor &d+2
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2017-06-30 01:51:36 +00:00
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adc #$6ED9
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sta f_plus_k+2
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.skip2
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* f_40 to f_59
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aif &part<>3,.skip3
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2017-06-30 05:15:47 +00:00
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lda &c
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ora &d
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and &b
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2017-06-30 18:23:29 +00:00
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sta temp
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2017-06-30 05:15:47 +00:00
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lda &c
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and &d
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2017-06-30 18:23:29 +00:00
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ora temp
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2017-06-30 01:51:36 +00:00
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clc
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adc #$BCDC
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sta f_plus_k
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2017-06-30 05:15:47 +00:00
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lda &c+2
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ora &d+2
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and &b+2
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2017-06-30 18:23:29 +00:00
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sta temp
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2017-06-30 05:15:47 +00:00
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lda &c+2
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and &d+2
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2017-06-30 18:23:29 +00:00
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ora temp
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2017-06-30 01:51:36 +00:00
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adc #$8F1B
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sta f_plus_k+2
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.skip3
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* f_60 to f_79
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aif &part<>4,.skip4
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2017-06-30 05:15:47 +00:00
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lda &b
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eor &c
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eor &d
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2017-06-30 01:51:36 +00:00
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clc
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adc #$C1D6
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sta f_plus_k
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2017-06-30 05:15:47 +00:00
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lda &b+2
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eor &c+2
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eor &d+2
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2017-06-30 01:51:36 +00:00
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adc #$CA62
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sta f_plus_k+2
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.skip4
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2017-06-30 05:34:09 +00:00
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ROTL4MOVE temp,&a,5
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2017-06-30 01:51:36 +00:00
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ldx idx
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clc
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2017-06-30 05:34:09 +00:00
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lda w+&iter*4,x
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2017-06-30 01:51:36 +00:00
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adc temp
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tay
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2017-06-30 05:34:09 +00:00
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lda w+&iter*4+2,x
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2017-06-30 01:51:36 +00:00
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adc temp+2
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tax
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clc
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tya
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2017-06-30 05:15:47 +00:00
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adc &e
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2017-06-30 01:51:36 +00:00
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tay
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txa
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2017-06-30 05:15:47 +00:00
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adc &e+2
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2017-06-30 01:51:36 +00:00
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tax
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clc
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tya
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adc f_plus_k
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2017-06-30 05:15:47 +00:00
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sta &e
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2017-06-30 01:51:36 +00:00
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txa
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adc f_plus_k+2
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2017-06-30 05:15:47 +00:00
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sta &e+2
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2017-06-30 01:51:36 +00:00
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2017-06-30 05:15:47 +00:00
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ROTL4 &b,30
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2017-06-30 01:51:36 +00:00
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2017-06-30 05:15:47 +00:00
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mend
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* One part of the loop for processing blocks (20 iterations)
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macro
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BlockLoopPart &part
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2017-06-30 05:34:09 +00:00
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2017-07-03 02:35:17 +00:00
|
|
|
stz idx
|
2017-06-30 05:15:47 +00:00
|
|
|
loop&part anop
|
|
|
|
|
2017-06-30 05:34:09 +00:00
|
|
|
BlockLoopIter a_,b,c,d,e,0
|
|
|
|
BlockLoopIter e,a_,b,c,d,1
|
|
|
|
BlockLoopIter d,e,a_,b,c,2
|
|
|
|
BlockLoopIter c,d,e,a_,b,3
|
|
|
|
BlockLoopIter b,c,d,e,a_,4
|
2017-06-30 05:15:47 +00:00
|
|
|
|
2017-06-30 05:34:09 +00:00
|
|
|
clc
|
|
|
|
lda idx
|
|
|
|
adc #4*5
|
|
|
|
cmp #20*4
|
2017-06-30 01:51:36 +00:00
|
|
|
bge endloop&part
|
2017-06-30 18:23:29 +00:00
|
|
|
sta idx
|
2017-06-30 01:51:36 +00:00
|
|
|
jmp loop&part
|
|
|
|
endloop&part anop
|
|
|
|
mend
|
|
|
|
|