2023-07-05 03:09:17 +00:00
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;
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; sound
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; Code and data structures for playing sound effects
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; Created by Quinn Dunki on 6/30/23
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;
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2023-07-06 03:27:47 +00:00
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NUM_SOUNDS = 5
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2023-07-05 03:09:17 +00:00
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SOUND_HOWL=0
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SOUND_MEOW1=2
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2023-07-06 03:27:47 +00:00
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SOUND_MEOW2=4
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SOUND_MEOW3=6
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SOUND_MEOW4=8
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2023-07-05 03:09:17 +00:00
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soundTable:
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; Sound Ram Address, Wave Size, Low Frequency
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.byte $00,WAVE_SIZE_8192,200 ; SOUND_HOWL
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2023-07-06 03:27:47 +00:00
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.byte $20,WAVE_SIZE_8192,150 ; SOUND_MEOW1
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.byte $40,WAVE_SIZE_8192,200 ; SOUND_MEOW2
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.byte $60,WAVE_SIZE_8192,150 ; SOUND_MEOW3
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.byte $80,WAVE_SIZE_8192,150 ; SOUND_MEOW4
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2023-07-05 03:09:17 +00:00
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; Ensoniq Control Register bit patterns
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DOC_RAMACCESS = $40 ; or
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DOC_DOCACCESS = $bf ; and
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DOC_AUTOINC = $20 ; or
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DOC_NOINC = $df ; and
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; Oscillator Control Register bit patterns
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OSC_MODE_FREE = $00
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OSC_MODE_ONESHOT = $02
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OSC_MODE_SYNC = $04
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OSC_MODE_SWAP = $06
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OSC_CHANNEL_ALL = $70
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OSC_CHANNEL_RIGHT = $00
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OSC_CHANNEL_LEFT = $10
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; Internal oscillator-related registers (additional per-oscillator registers per the big table on page 110 of Apple IIGS Hardware Reference Manual)
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OSC_REG_INTERRUPT = $e0
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OSC_REG_ENABLE = $e1
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OSC_REG_DIGITIZE = $e2
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; Wave table page size bit patterns
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WAVE_SIZE_256 = $07
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WAVE_SIZE_512 = $0f
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WAVE_SIZE_1024 = $17
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WAVE_SIZE_2048 = $1f
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WAVE_SIZE_4096 = $27
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WAVE_SIZE_8192 = $2f
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WAVE_SIZE_16384 = $37
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WAVE_SIZE_32768 = $3f
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; ENSONIQ_WAIT
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;
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; Polls the high bit of the Sound Control Register, which tells us when we're allowed
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; to talk to the DOC
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;
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.macro ENSONIQ_WAIT
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.local busyLoop
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BITS8A
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busyLoop:
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lda ENSONIQ_CONTROL
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bmi busyLoop
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BITS16
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.endmacro
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; writeInternalRegister - Call in 8 BIT MODE ONLY (also why it's a macro)
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;
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; Writes to the internal registers of the Ensoniq
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;
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; A = Data to write (8 bits)
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; X = Register number to write to (8 bits)
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;
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; Trashes A
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;
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.macro writeInternalRegister
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pha
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txa
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sta ENSONIQ_ADDRL
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pla
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sta ENSONIQ_DATA
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.endmacro
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; writeInternalRegisterPair - Call in 8 BIT MODE ONLY (also why it's a macro)
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;
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; Writes to the internal registers of the Ensoniq for a pair of oscillators
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;
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; A = Data to write (8 bits)
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; X = Register number to write to (8 bits). X+1 will also be written
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;
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; Trashes A
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;
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.macro writeInternalRegisterPair
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pha
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txa
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sta ENSONIQ_ADDRL
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pla
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sta ENSONIQ_DATA
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pha
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inx
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txa
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sta ENSONIQ_ADDRL
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pla
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sta ENSONIQ_DATA
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.endmacro
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; initSoundSystem
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;
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; Trashes SCRATCHL
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;
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initSoundSystem:
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SAVE_AXY
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ENSONIQ_WAIT
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; Load sound file bank into Ensoniq RAM
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lda #$0000 ; Sound location in bank 4
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sta PARAML0
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ldx #$04
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2023-07-06 03:27:47 +00:00
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lda soundBankSize ; Far pointer
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tay
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2023-07-05 03:09:17 +00:00
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jsr copyToSoundRAM
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; Configure all our oscillators
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lda #0
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sta SCRATCHL
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ldy #0
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initSoundSystemLoop:
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2023-07-06 03:27:47 +00:00
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2023-07-05 03:09:17 +00:00
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BITS8A
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lda soundTable,y
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sta PARAM0
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iny
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lda soundTable,y
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sta PARAM1
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iny
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lda soundTable,y
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sta PARAM2
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iny
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BITS16
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phy
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ldy SCRATCHL
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jsr configureOscillatorPair
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iny
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iny
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cpy #NUM_SOUNDS*2
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beq initSoundSystemReady
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sty SCRATCHL
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ply
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bra initSoundSystemLoop
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initSoundSystemReady:
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ply
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; Enable oscillators (see page 108 of Apple IIGS Hardware Reference Manual)
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BITS8
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lda #(NUM_SOUNDS*2)<<1 ; Two oscillators per sound and leaving low bit untouched
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ldx #OSC_REG_ENABLE
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writeInternalRegister
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BITS16
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RESTORE_AXY
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rts
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; playSound
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;
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; Y = Oscillator to start (+1 also starts)
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;
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playSound:
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SAVE_AX
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ENSONIQ_WAIT
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BITS8
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; Configure run mode for our oscillators
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lda #OSC_CHANNEL_RIGHT | OSC_MODE_ONESHOT
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ldx docRegisterTableControl,y
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writeInternalRegister
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lda #OSC_CHANNEL_LEFT | OSC_MODE_ONESHOT
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ldx docRegisterTableControl+1,y
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writeInternalRegister
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BITS16
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RESTORE_AX
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rts
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; configureOscillatorPair
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;
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; Y = Oscillator number (+1 will also be configured)
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; PARAM0 = Wave table address (one byte)
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; PARAM1 = Wave table page size (must use WAVE_SIZE constants)
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; PARAM2 = Low frequency (high frequency is always 0)
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;
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configureOscillatorPair:
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SAVE_AXY
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ENSONIQ_WAIT
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BITS8
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; Configure low frequency
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lda PARAM2
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ldx docRegisterTableLowFreq,y
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writeInternalRegisterPair
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; Configure high frequency
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lda #0
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ldx docRegisterTableHighFreq,y
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writeInternalRegisterPair
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; Configure volume
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lda #$ff ; This is relative to system volume, so set it to max
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ldx docRegisterTableVolume,y
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writeInternalRegisterPair
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; Configure sound RAM pointer
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lda PARAM0
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ldx docRegisterTableWavePointer,y
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writeInternalRegisterPair
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; Configure sound RAM size
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; Format of this register is tricky. See page 114 of Apple IIGS Hardware Reference Manual
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lda PARAM1
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ldx docRegisterTableWaveSize,y
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writeInternalRegisterPair
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BITS16
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RESTORE_AXY
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rts
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; DOC register locations for each oscillator
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docRegisterTableLowFreq:
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.byte $00,$01,$02,$03,$04,$05,$06,$07,$08,$09,$0a,$0b,$0c,$0d,$0e,$0f,$10,$11,$12,$13,$14,$15,$16,$17,$18,$19,$1a,$1b,$1c,$1d,$1e,$1f
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docRegisterTableHighFreq:
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.byte $20,$21,$22,$23,$24,$25,$26,$27,$28,$29,$2a,$2b,$2c,$2d,$2e,$2f,$30,$31,$32,$33,$34,$35,$36,$37,$38,$39,$3a,$3b,$3c,$3d,$3e,$3f
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docRegisterTableVolume:
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.byte $40,$41,$42,$43,$44,$45,$46,$47,$48,$49,$4a,$4b,$4c,$4d,$4e,$4f,$50,$51,$52,$53,$54,$55,$56,$57,$58,$59,$5a,$5b,$5c,$5d,$5e,$5f
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docRegisterTableData:
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.byte $60,$61,$62,$63,$64,$65,$66,$67,$68,$69,$6a,$6b,$6c,$6d,$6e,$6f,$70,$71,$72,$73,$74,$75,$76,$77,$78,$79,$7a,$7b,$7c,$7d,$7e,$7f
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docRegisterTableWavePointer:
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.byte $80,$81,$82,$83,$84,$85,$86,$87,$88,$89,$8a,$8b,$8c,$8d,$8e,$8f,$90,$91,$92,$93,$94,$95,$96,$97,$98,$99,$9a,$9b,$9c,$9d,$9e,$9f
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docRegisterTableControl:
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.byte $a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7,$a8,$a9,$aa,$ab,$ac,$ad,$ae,$af,$b0,$b1,$b2,$b3,$b4,$b5,$b6,$b7,$b8,$b9,$ba,$bb,$bc,$bd,$be,$bf
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docRegisterTableWaveSize:
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.byte $c0,$c1,$c2,$c3,$c4,$c5,$c6,$c7,$c8,$c9,$ca,$cb,$cc,$cd,$ce,$cf,$d0,$d1,$d2,$d3,$d4,$d5,$d6,$d7,$d8,$d9,$da,$db,$dc,$dd,$de,$df
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; copyToSoundRAM
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; Copies data from main RAM to sound RAM
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;
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; PARAML0 = Pointer to sound data in main RAM
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; X = Bank number of sound data in main RAM
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; Y = Size of sound bank in bytes
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;
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; Trashes SCRATCHL
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;
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copyToSoundRAM:
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SAVE_AXY
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sty SCRATCHL
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ENSONIQ_WAIT
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lda #0
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BITS8
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stx copyToSoundRAMLoop+3 ; Self modifying code. Don't panic
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; Enable sound RAM access and auto-increment mode
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lda ENSONIQ_CONTROL
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ora #DOC_RAMACCESS | DOC_AUTOINC
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sta ENSONIQ_CONTROL
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BITS16
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; Prepare start address in sound RAM
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lda #$0000
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sta ENSONIQ_ADDRL
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; Copy all the data
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lda #0
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BITS8A
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ldx #0
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copyToSoundRAMLoop:
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lda $ff0000,x ; Note: 8 bit accumulator! DOC takes one byte at a time
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sta ENSONIQ_DATA ; Do not use indexed addressing here- see page 107 of Apple IIGS Hardware Reference Manual
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inx
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cpx SCRATCHL
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bne copyToSoundRAMLoop
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; Enable DOC access and disable auto-increment mode
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; This is a nicer mode to leave the Ensoniq in for normal usage once loading is complete
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lda ENSONIQ_CONTROL
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and #DOC_DOCACCESS & DOC_NOINC
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sta ENSONIQ_CONTROL
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BITS16
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RESTORE_AXY
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rts
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