Implement bitwise and/or/xor for 64-bit types.

This introduces three new intermediate codes for these operations.
This commit is contained in:
Stephen Heumann 2021-01-30 00:25:15 -06:00
parent 8b12b7b734
commit abb0fa0fc1
6 changed files with 64 additions and 3 deletions

View File

@ -117,9 +117,11 @@
{ }
{ pc_bnd - bitwise and }
{ pc_bal - long bitwise and }
{ pc_baq - long long bitwise and }
{ }
{ Gen0(pc_bnd) cgByte,cgUByte,cgWord,cgUWord }
{ Gen0(pc_bal) cgLong,cgULong }
{ Gen0(pc_baq) cgQuad,cgUQuad }
{ }
{ The two values on the top of the evaluation stack are }
{ removed and anded. The result is placed back on the stack. }
@ -150,9 +152,11 @@
{ }
{ pc_bor - bitwise or }
{ pc_blr - long bitwise or }
{ pc_bqr - long long bitwise or }
{ }
{ Gen0(pc_bor) cgByte,cgUByte,cgWord,cgUWord }
{ Gen0(pc_blr) cgLong,cgULong }
{ Gen0(pc_bqr) cgQuad,cgUQuad }
{ }
{ The two values on the top of the evaluation stack are }
{ removed and ored. The result is placed back on the stack. }
@ -160,9 +164,11 @@
{ }
{ pc_bxr - exclusive or }
{ pc_blx - long exclusive or }
{ pc_bqx - long long exclusive or }
{ }
{ Gen0(pc_bxr) cgByte,cgUByte,cgWord,cgUWord }
{ Gen0(pc_blx) cgLong,cgULong }
{ Gen0(pc_bqx) cgQuad,cgUQuad }
{ }
{ The two values on the top of the evaluation stack are }
{ removed and exclusive ored. The result is placed back on }

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@ -116,6 +116,9 @@ opt[dc_prm] := 'PRM';
opt[pc_nat] := 'nat';
opt[pc_bno] := 'bno';
opt[pc_nop] := 'nop';
opt[pc_bqr] := 'bqr';
opt[pc_bqx] := 'bqx';
opt[pc_baq] := 'baq';
end; {InitWriteCode}
@ -261,7 +264,7 @@ with code^ do
pc_uml,pc_adr,pc_dvr,pc_mpr,pc_adi,pc_sbi,pc_mpi,pc_dvi,
pc_umi,pc_shl,pc_nop,pc_and,pc_lnd,pc_bnd,pc_lor,pc_ior,pc_bxr,
pc_bnt,pc_blx,pc_bnl,pc_ngi,pc_ngl,pc_ngr,pc_ixa,pc_mdl,
pc_udi,pc_udl: ;
pc_udi,pc_udl,pc_bqr,pc_bqx,pc_baq: ;
dc_prm:
write(' ', q:1, ':', r:1, ':', s:1);

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@ -228,7 +228,8 @@ type
pc_mdl,pc_sll,pc_slr,pc_bal,pc_ngl,pc_adl,pc_sbl,pc_blr,pc_blx,
dc_sym,pc_lnd,pc_lor,pc_vsr,pc_uml,pc_udl,pc_ulm,pc_pop,pc_gil,
pc_gli,pc_gdl,pc_gld,pc_cpi,pc_tri,pc_lbu,pc_lbf,pc_sbf,pc_cbf,dc_cns,
dc_prm,pc_nat,pc_bno,pc_nop,pc_psh,pc_ili,pc_iil,pc_ild,pc_idl);
dc_prm,pc_nat,pc_bno,pc_nop,pc_psh,pc_ili,pc_iil,pc_ild,pc_idl,
pc_bqr,pc_bqx,pc_baq);
{intermediate code}
{-----------------}

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@ -4938,7 +4938,7 @@ case code^.opcode of
pc_les, pc_neq, pc_ior, pc_lor, pc_ixa, pc_mod, pc_uim, pc_mdl,
pc_ulm, pc_mpi, pc_umi, pc_mpl, pc_uml, pc_mpr, pc_psh, pc_sbi,
pc_sbl, pc_sbr, pc_shl, pc_sll, pc_shr, pc_usr, pc_slr, pc_vsr,
pc_tri, pc_sbf, pc_sto, pc_cui:
pc_tri, pc_sbf, pc_sto, pc_cui, pc_bqr, pc_bqx, pc_baq:
begin
code^.right := Pop;
code^.left := Pop;

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@ -3147,6 +3147,8 @@ case tree^.token.kind of
Gen0(pc_bnd)
else if et in [cgLong,cgULong] then
Gen0(pc_bal)
else if et in [cgQuad,cgUQuad] then
Gen0(pc_baq)
else
Error(66);
@ -3155,6 +3157,8 @@ case tree^.token.kind of
Gen0(pc_bxr)
else if et in [cgLong,cgULong] then
Gen0(pc_blx)
else if et in [cgQuad,cgUQuad] then
Gen0(pc_bqx)
else
Error(66);
@ -3163,6 +3167,8 @@ case tree^.token.kind of
Gen0(pc_bor)
else if et in [cgLong,cgULong] then
Gen0(pc_blr)
else if et in [cgQuad,cgUQuad] then
Gen0(pc_bqr)
else
Error(66);
@ -3278,6 +3284,8 @@ case tree^.token.kind of
Gen0(pc_bxr);
cgLong,cgULong:
Gen0(pc_blx);
cgQuad,cgUQuad:
Gen0(pc_bqx);
otherwise:
error(66);
end; {case}
@ -3294,6 +3302,8 @@ case tree^.token.kind of
Gen0(pc_bor);
cgLong,cgULong:
Gen0(pc_blr);
cgQuad,cgUQuad:
Gen0(pc_bqr);
otherwise:
error(66);
end; {case}
@ -3310,6 +3320,8 @@ case tree^.token.kind of
Gen0(pc_bnd);
cgLong,cgULong:
Gen0(pc_bal);
cgQuad,cgUQuad:
Gen0(pc_baq);
otherwise:
error(66);
end; {case}

39
Gen.pas
View File

@ -4095,6 +4095,44 @@ procedure GenTree {op: icptr};
end; {GenBinLong}
procedure GenBinQuad (op: icptr);
{ generate one of: pc_bqr, pc_bqx, pc_baq }
procedure GenOp (ops: integer);
{ generate a 64-bit binary bitwise operation }
{ }
{ parameters: }
{ ops - stack version of operation }
begin {GenOp}
GenImplied(m_pla);
GenNative(ops, direct, 7, nil, 0);
GenNative(m_sta_s, direct, 7, nil, 0);
GenImplied(m_pla);
GenNative(ops, direct, 7, nil, 0);
GenNative(m_sta_s, direct, 7, nil, 0);
GenImplied(m_pla);
GenNative(ops, direct, 7, nil, 0);
GenNative(m_sta_s, direct, 7, nil, 0);
GenImplied(m_pla);
GenNative(ops, direct, 7, nil, 0);
GenNative(m_sta_s, direct, 7, nil, 0);
end; {GenOp}
begin {GenBinQuad}
GenTree(op^.left);
GenTree(op^.right);
case op^.opcode of
pc_bqr: GenOp(m_ora_s);
pc_bqx: GenOp(m_eor_s);
pc_baq: GenOp(m_and_s);
otherwise: Error(cge1);
end; {case}
end; {GenBinQuad}
procedure GenBno (op: icptr);
{ Generate code for a pc_bno }
@ -5678,6 +5716,7 @@ case op^.opcode of
pc_and,pc_bnd,pc_bor,pc_bxr,pc_ior: GenLogic(op);
pc_blr,pc_blx,pc_bal,pc_dvl,pc_mdl,pc_mpl,pc_sll,pc_slr,pc_udl,pc_ulm,
pc_uml,pc_vsr: GenBinLong(op);
pc_bqr,pc_bqx,pc_baq: GenBinQuad(op);
pc_bnl,pc_ngl: GenUnaryLong(op);
pc_bno: GenBno(op);
pc_bnt,pc_ngi,pc_not: GenBntNgiNot(op);