Add 64-bit division routines.
The ~CDIV8 routine is the same as ~DIV8 in SysLib, except that it negates the remainder if the numerator is negative. This complies with the definition of the % operator in C, which gives negative (or 0) remainders if the numerator is negative, such that (a/b)*b + a%b equals a. The ~UDIV8 routine is an unsigned version, using the same core division loop but without the sign handling.
This commit is contained in:
Stephen Heumann
parent
2bb5361c24
commit
d1d0358e4b
233
int64.asm
233
int64.asm
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@ -90,3 +90,236 @@ ML2 ROR ANS+14 shift the interim result
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TCS
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RTL
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END
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****************************************************************
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*
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* ~CDIV8 - Eight Byte Signed Integer Divide,
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* with C-style remainder computation
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*
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* Inputs:
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* NUM1 - numerator
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* NUM2 - denominator
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*
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* Outputs:
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* ANS - result
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* REM - remainder
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* V - set for division by zero
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*
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* Notes
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* 1) Uses ~SIG8.
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*
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****************************************************************
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*
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~CDIV8 START
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SIGN EQU 1 sign of answer
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NUM1 EQU 36
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NUM2 EQU 28
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ANS EQU 9 answer
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REM EQU 17 remainder
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RETURN EQU 25
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;
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; Initialize
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;
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TSC set up DP
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SEC
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SBC #24
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TCS
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PHD
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TCD
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LDA NUM2 check for division by zero
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ORA NUM2+2
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ORA NUM2+4
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ORA NUM2+6
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BNE DV1
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PLD division by zero
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TSC
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CLC
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ADC #24
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TCS
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SEP #%01000000
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RTL
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DV1 JSL ~SIG8 convert to positive numbers
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;
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; 64 BIT DIVIDE
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;
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LDY #64 64 bits to go
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DV3 ASL ANS roll up the next number
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ROL ANS+2
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ROL ANS+4
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ROL ANS+6
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ROL ANS+8
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ROL ANS+10
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ROL ANS+12
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ROL ANS+14
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SEC subtract for this digit
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LDA ANS+8
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SBC NUM2
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TAX
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LDA ANS+10
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SBC NUM2+2
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STA SIGN+2
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LDA ANS+12
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SBC NUM2+4
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STA SIGN+4
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LDA ANS+14
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SBC NUM2+6
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BCC DV4 branch if minus
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STX ANS+8 save partial numerator
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STA ANS+14
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LDA SIGN+2
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STA ANS+10
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LDA SIGN+4
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STA ANS+12
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INC ANS turn the bit on
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DV4 DEY next bit
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BNE DV3
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;
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; SET SIGN
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;
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LDA SIGN branch if positive
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BEQ DV10
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SEC negate the result
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LDA #0
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SBC ANS
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STA ANS
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LDA #0
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SBC ANS+2
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STA ANS+2
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LDA #0
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SBC ANS+4
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STA ANS+4
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LDA #0
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SBC ANS+6
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STA ANS+6
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DV10 LDA NUM1+6 if numerator is negative
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BPL DV11
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SEC negate the remainder
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LDA #0
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SBC REM
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STA REM
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LDA #0
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SBC REM+2
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STA REM+2
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LDA #0
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SBC REM+4
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STA REM+4
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LDA #0
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SBC REM+6
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STA REM+6
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DV11 LDX #14 move answer, remainder to stack
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DV12 LDA ANS,X
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STA NUM2,X
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DEX
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DEX
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BPL DV12
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CLV
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PLD fix stack, DP
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TSC
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CLC
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ADC #24
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TCS
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RTL
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END
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****************************************************************
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*
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* ~UDIV8 - Eight Byte Unsigned Integer Divide
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*
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* Inputs:
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* NUM1 - numerator
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* NUM2 - denominator
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*
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* Outputs:
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* ANS - result
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* REM - remainder
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* V - set for division by zero
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*
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****************************************************************
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*
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~UDIV8 START
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TEMP EQU 1
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NUM1 EQU 32
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NUM2 EQU 24
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ANS EQU 5 answer
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REM EQU 13 remainder
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RETURN EQU 21
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;
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; Initialize
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;
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TSC set up DP
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SEC
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SBC #20
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TCS
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PHD
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TCD
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LDA NUM2 check for division by zero
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ORA NUM2+2
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ORA NUM2+4
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ORA NUM2+6
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BNE DV1
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PLD division by zero
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TSC
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CLC
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ADC #20
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TCS
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SEP #%01000000
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RTL
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DV1 STZ REM initialize REM to 0
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STZ REM+2
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STZ REM+4
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STZ REM+6
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move4 NUM1,ANS initialize ANS to NUM1
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move4 NUM1+4,ANS+4
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;
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; 64 BIT DIVIDE
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;
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LDY #64 64 bits to go
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DV3 ASL ANS roll up the next number
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ROL ANS+2
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ROL ANS+4
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ROL ANS+6
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ROL ANS+8
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ROL ANS+10
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ROL ANS+12
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ROL ANS+14
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SEC subtract for this digit
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LDA ANS+8
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SBC NUM2
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TAX
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LDA ANS+10
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SBC NUM2+2
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STA TEMP
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LDA ANS+12
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SBC NUM2+4
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STA TEMP+2
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LDA ANS+14
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SBC NUM2+6
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BCC DV4 branch if minus
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STX ANS+8 save partial numerator
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STA ANS+14
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LDA TEMP
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STA ANS+10
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LDA TEMP+2
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STA ANS+12
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INC ANS turn the bit on
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DV4 DEY next bit
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BNE DV3
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DV10 LDX #14 move answer, remainder to stack
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DV11 LDA ANS,X
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STA NUM2,X
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DEX
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DEX
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BPL DV11
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CLV
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PLD fix stack, DP
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TSC
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CLC
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ADC #20
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TCS
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RTL
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END
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