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added smartport, but it doesn't work... hard code unit to #1?
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@ -12,6 +12,9 @@
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string asis
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blanks on
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; smartport doesn't currently work ($28 no drive error because the unit isn't setup correctly?)
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__smartport__ set 0
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zp record 0
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slot ds.w 1
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;vector ds.w 1
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@ -23,6 +26,17 @@ extents ds.b 3*HFSExtentDescriptor.sizeof
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endr
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if __smartport__ then
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sp record $20
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ReadBlock equ $01
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pcount ds.b 1
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unit ds.b 1
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buffer ds.w 1
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block ds.l 1 ; actually 24-bit
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endr
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else
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pro record $42
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cmd ds.b 1
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unit ds.b 1
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@ -30,6 +44,8 @@ buffer ds.b 2
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block ds.b 2
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endr
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endif
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data record $2000
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ds.b 512
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endr
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@ -47,8 +63,11 @@ boot proc
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dc.b $01 ; prodos boot id :D
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if __smartport__ then
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stx sp.unit
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else
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stx pro.unit
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endif
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txa
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lsr a
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lsr a
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@ -72,17 +91,35 @@ boot proc
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lda (slot),y
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cmp #$03
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bne noboot
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; smartport - ,7 = 00
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if __smartport__ then
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ldy #7
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lda (slot),y
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bne noboot
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; ,$fb = smartport id byte which indicates if extended. not needed (yet)
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endif
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ldy #$ff
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lda (slot),y
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if __smartport__ then
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inc a
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inc a
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inc a
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endif
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sta vector
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bra ok
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; not a prodos/smartport device.
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noboot brk $ea
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ok
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if __smartport__ then
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lda #3
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sta sp.pcount
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else
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lda #1 ; prodos read block
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sta pro.cmd
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endif
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clc
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xce
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@ -95,7 +132,14 @@ ok
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stz bnum
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stz count
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lda #data
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if __smartport__ then
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sta sp.buffer
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; stz sp.block ; will overwrite
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stz sp.block+2
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else
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sta pro.buffer
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endif
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lda #2
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jsr read_block_abs
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@ -227,7 +271,11 @@ found
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; now load the blocks and
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lda #$2000
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if __smartport__ then
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sta sp.buffer
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else
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sta pro.buffer
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endif
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stz bnum
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@loop
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lda bnum
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@ -235,12 +283,25 @@ found
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inc bnum
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lda #512
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clc
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if __smartport__ then
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adc sp.buffer
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sta sp.buffer
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else
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adc pro.buffer
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sta pro.buffer
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endif
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dec count
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bne @loop
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lda vector ; pass in
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ldx slot
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ldy vector
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if __smartport__ then
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lda sp.unit
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else
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lda pro.unit
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endif
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and #$00ff
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jmp $2000 ; kiss of life.
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@ -263,16 +324,23 @@ read_block_abs
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;
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; based on testing, this drops into emulation mode, so do it and recover.
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;
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if __smartport__ then
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sta sp.block
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else
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sta pro.block
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; pea @rts-1
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; sep #$30
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endif
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php
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sec
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xce
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dc.b $20 ; jsr
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vector dc.w $ffff
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; jmp (vector)
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;@rts
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if __smartport__ then
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dc.b sp.ReadBlock
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dc.w sp
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endif
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bcs @fail
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xce
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plp
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