Lite render mode bugfixes
This commit is contained in:
Lucas Scharenbroich
parent
94dafd2093
commit
2013771524
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@ -212,8 +212,8 @@ lite_base EXT
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ldy #lite_base
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:loop2
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lda BTableHigh ; This is the same value for the lite blitter
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sta BRowTableHigh+2,x
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sta BRowTableHigh+{26*2}+2,x
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sta BRowTableHigh,x
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sta BRowTableHigh+{26*2},x
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tya
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sta BRowTableLow,x
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@ -631,12 +631,8 @@ _RenderLite
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sta RenderFlags
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jsr _DoTimers ; Run any pending timer tasks
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; brk $65
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jsr _ApplyBG0YPosLite ; Set stack addresses for the virtual lines to the physical screen
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; brk $66
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jsr _ApplyBG0XPosPre ; Lock in certain rendering variables (not lite/non-lite specific)
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; brk $67
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jsr _UpdateBG0TileMap ; and the tile maps. These subroutines build up a list of tiles
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jsr _ApplyTiles ; This function actually draws the new tiles into the code field
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@ -652,7 +648,7 @@ _RenderLite
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; jsr _DrawObjShadow ; Draw the background
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; jsr _DrawDirectSprites ; Draw the sprites directly to the Bank $01 graphics buffer (skipping the render-to-tile step)
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;
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; jsr _ShadowOn ; Turn shadowing back on
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jsr _ShadowOn ; Turn shadowing back on
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;
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; jsr _DrawFinalPass
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34
src/Tiles.s
34
src/Tiles.s
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@ -125,7 +125,8 @@ InitTiles
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bra :out
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:fast
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lda #0 ; Initialize with Tile 0
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ldy #FastProcs
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; ldy #FastProcs
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ldy #LiteProcs
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jsr _SetTileProcs
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bra :out
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@ -275,7 +276,8 @@ _SetNormalTileProcs
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; the tile priority bit is set, and whether this is the special tile 0 or not.
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:setTileFast
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pla ; Throw away tile ID copy
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ldy #FastProcs
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; ldy #FastProcs
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ldy #LiteProcs
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pla
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jmp _SetTileProcs
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@ -465,6 +467,22 @@ FastCopyTmpDataA
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plb
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rts
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LiteCopyTmpDataA
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pei USER_TILE_CODE_PTR+2
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ldy USER_TILE_CODE_PTR
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plb
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]line equ 0
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lup 8
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lda tmp_tile_data+{]line*4}
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sta: $0004+{]line*_LINE_SIZE},y
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lda tmp_tile_data+{]line*4}+2
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sta: $0001+{]line*_LINE_SIZE},y
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]line equ ]line+1
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--^
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plb
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rts
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; X = Tile Store offset
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; Y = Engine Mode Base Table address
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; A = Table proc index
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@ -544,6 +562,18 @@ FastUnderZV dw ConstTile0Fast,SpriteUnder0Fast,SpriteUnder0Fast
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FastUnderNA dw CopyTileAFast,SpriteUnderAFast,OneSpriteFastUnderA
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FastUnderNV dw CopyTileVFast,SpriteUnderVFast,OneSpriteFastUnderV
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; "Lite" procs. For when the engine is in GTE Lite mode. Different
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; stride than the "Fast" procs.
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LiteProcs
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LiteOverZA dw ConstTile0Lite,SpriteOver0Lite,OneSpriteLiteOver0
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LiteOverZV dw ConstTile0Lite,SpriteOver0Lite,OneSpriteLiteOver0
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LiteOverNA dw CopyTileALite,SpriteOverALite,OneSpriteLiteOverA
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LiteOverNV dw CopyTileVLite,SpriteOverVLite,OneSpriteLiteOverV
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LiteUnderZA dw ConstTile0Lite,SpriteUnder0Lite,SpriteUnder0Lite
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LiteUnderZV dw ConstTile0Lite,SpriteUnder0Lite,SpriteUnder0Lite
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LiteUnderNA dw CopyTileALite,SpriteUnderALite,OneSpriteLiteUnderA
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LiteUnderNV dw CopyTileVLite,SpriteUnderVLite,OneSpriteLiteUnderV
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; "Slow" procs. These are duplicates of the "Fast" functions, but also
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; set the PEA opcode in all cases.
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SlowProcs
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@ -1120,6 +1120,7 @@ _TSEnableBackground
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put SpriteRender.s
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put Render.s
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put render/Render.s
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put render/Lite.s
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put render/Fast.s
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put render/Slow.s
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put render/Dynamic.s
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@ -17,6 +17,8 @@ _BltRangeLite
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:exit_ptr equ tmp0
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:jmp_low_save equ tmp2
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phb
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clc
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dey
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tya ; Get the address of the line that we want to return from
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@ -52,7 +54,11 @@ _BltRangeLite
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php ; save the current processor flags
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sep #$20 ; run the lite blitter in 8-bit accumulator mode
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brk $99
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lda :exit_ptr+2 ; set the bank to the code field
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pha
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plb
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sei ; disable interrupts
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_R0W1
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tsx ; save the stack pointer in Y
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@ -72,4 +78,6 @@ blt_return_lite ENT
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ldy #_EXIT_EVEN+1
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lda :jmp_low_save
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sta [:exit_ptr],y
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plb
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rts
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@ -81,7 +81,7 @@ _RestoreBG0OpcodesAltLite
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sta :exit_address
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sec
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CopyXToYPrep :do_restore
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CopyXToYPrep :do_restore;:draw_count_x6
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ldx :low_save_addr
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ldy :exit_address
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@ -300,7 +300,7 @@ _ApplyBG0XPosAltLite
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ldal BTableLow,x ; Get the address of the code field line
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sta :base_address ; Will use this address a few times
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adc #_ENTRY_JMP ; Add the offsets in order to get absolaute addresses
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adc #_ENTRY_JMP ; Add the offsets in order to get absolute addresses
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sta :entry_jmp_addr
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adc #{_LOW_SAVE-_ENTRY_JMP}
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sta :low_save_addr
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@ -314,8 +314,8 @@ _ApplyBG0XPosAltLite
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; then overwrite it with the branch instruction.
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sec ; These macros preform subtractions that do not underflow
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CopyXToYPrep :do_save_entry_e
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LiteSetConstPrep :do_set_bra_e
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CopyXToYPrep :do_save_entry_e;:draw_count_x6
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LiteSetConstPrep :do_set_bra_e;:draw_count_x3
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stal :do_setopcode_e+1
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stal :do_set_rel_e+1
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@ -358,6 +358,7 @@ _ApplyBG0XPosAltLite
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txa ; StartXMod164 - 1
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clc
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adc ScreenWidth
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cmp #164 ; Keep the value in range
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bcc *+5
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sbc #164
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@ -429,9 +430,9 @@ _ApplyBG0XPosAltLite
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; Setup the jumps into the unrolled loops
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sec
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CopyXToYPrep :do_save_entry_o
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CopyXToYPrep :do_save_entry_o;:draw_count_x6
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stal :do_save_high_byte+1
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LiteSetConstPrep :do_set_bra_o
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LiteSetConstPrep :do_set_bra_o;:draw_count_x3
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stal :do_setopcode_o+1
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stal :do_set_rel_o+1
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stal :do_odd_code_entry+1
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@ -453,7 +454,7 @@ _ApplyBG0XPosAltLite
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ldy :low_save_addr
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:do_save_entry_o jsr $0000 ; Save the low word of the exit into a save location for restore later
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ldx :exit_address
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ldy :exit_address
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lda :exit_bra
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:do_set_bra_o jsr $0000 ; Insert a BRA instruction over the saved word
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@ -623,7 +624,7 @@ _ApplyScanlineBG0XPosLite
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; X = value
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CopyXToYPrep mac
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lda #x2y_bottom
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sbc blttmp+10 ; Copy from above, :draw_count_x6 equ blttmp+10
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sbc ]2 ; count_x6
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stal ]1+1 ; A jmp/jsr instruction
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<<<
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]line equ 199
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@ -639,7 +640,7 @@ x2y_bottom rts
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; Y = code field offset
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LiteSetConstPrep mac
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lda #lsc_bottom
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sbc blttmp+8 ; Copy from above, :draw_count_x3 equ blttmp+8
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sbc ]2 ; count_x3
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stal ]1+1 ; A jmp/jsr instruction
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<<<
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@ -36,7 +36,7 @@ lite_entry_jmp brl $0000 ; If the screen is odd-align
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; relative offset of the instruction field in the register
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; and falls through to the next instruction.
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lda: $0001,x ; Get the low byte and push onto the stack
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lda: *+1,x ; Get the low byte and push onto the stack
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pha
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lite_odd_entry brl $0000 ; unconditionally jump into the "next" instruction in the
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; code field. This is OK, even if the entry point was the
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@ -74,7 +74,7 @@ lite_loop_exit_3 jmp lite_even_exit ; +255
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mx %10
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lite_odd_exit lda #0 ; get the high byte of the saved PEA operand (odd-case is already in 8-bit mode)
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pha
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lite_even_exit jmp $0000 ; Jump to the next line.
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lite_even_exit jmp *+5 ; Jump to the next line.
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dfb $F4,$00 ; low-word of the saved PEA instruction
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; Now repeat the code above 207 more times. Loop 206 times and then manually do the last one
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@ -83,7 +83,7 @@ lite_even_exit jmp $0000 ; Jump to the next line.
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ldx #0000
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txs
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dfb $82,$00,$00
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lda: 1,x
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lda: *+1,x
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pha
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dfb $82,$00,$00
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@ -198,7 +198,7 @@ lite_even_exit jmp $0000 ; Jump to the next line.
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mx %10
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lda #0
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pha
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jmp $0000
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jmp *+5
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dfb $F4,$00
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]line equ ]line+1
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--^
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@ -206,7 +206,7 @@ lite_even_exit jmp $0000 ; Jump to the next line.
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:entry_207 ldx #0000
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txs
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dfb $82,$00,$00 ; brl $0000 starts at the next instruction
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lda: 1,x
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lda: *+1,x
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sep #$20
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pha
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dfb $82,$00,$00
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@ -284,7 +284,6 @@ CopyTileAFast
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ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
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lda TileStore+TS_TILE_ADDR,x ; load the address of this tile's data (pre-calculated)
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plb
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tax
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_CopyTileAFast
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]line equ 0
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@ -0,0 +1,282 @@
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; Collection of render function used when the engine is in "GTE Lite" mode. In this mode
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; there are no dynamic tile or two layer tiles enabled, so all of the tiles are comprised
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; of PEA opcodes. These functions take advantage of this and the fact that masks are
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; not needed to improve rendering speed.
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;
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; The GTE Lite mode uses a compact code field that fits in a single bank of memory, so
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; all of the rendering routines are basically the same as those in Fast.s, but use a
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; different stride.
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SpriteUnder0Lite
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ConstTile0Lite
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lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
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pha ; and put on the stack for later. Has TileStore bank in high byte.
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ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
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plb
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lda #0
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]line equ 0
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lup 8
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sta: {_LINE_SIZE*]line}+$0001,y
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sta: {_LINE_SIZE*]line}+$0004,y
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]line equ ]line+1
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--^
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plb
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rts
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SpriteOverALite
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lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
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pha ; and put on the stack for later. Has TileStore bank in high byte.
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ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
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lda TileStore+TS_TILE_ADDR,x
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tax
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plb
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_SpriteOverALite
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]line equ 0
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lup 8
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ldal tiledata+{]line*4},x
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and tmp_sprite_mask+{]line*4}
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ora tmp_sprite_data+{]line*4}
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sta: $0004+{]line*_LINE_SIZE},y
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ldal tiledata+{]line*4}+2,x
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and tmp_sprite_mask+{]line*4}+2
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ora tmp_sprite_data+{]line*4}+2
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sta: $0001+{]line*_LINE_SIZE},y
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]line equ ]line+1
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--^
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plb
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rts
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SpriteOverVLite
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lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
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pha ; and put on the stack for later. Has TileStore bank in high byte.
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ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
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lda TileStore+TS_TILE_ADDR,x
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tax
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plb
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_SpriteOverVLite
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]src equ 7
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]dest equ 0
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lup 8
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ldal tiledata+{]src*4},x
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and tmp_sprite_mask+{]dest*4}
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ora tmp_sprite_data+{]dest*4}
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sta: $0004+{]dest*_LINE_SIZE},y
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ldal tiledata+{]src*4}+2,x
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and tmp_sprite_mask+{]dest*4}+2
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ora tmp_sprite_data+{]dest*4}+2
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sta: $0001+{]dest*_LINE_SIZE},y
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]src equ ]src-1
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]dest equ ]dest+1
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--^
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plb
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rts
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SpriteOver0Lite
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lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
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pha ; and put on the stack for later. Has TileStore bank in high byte.
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ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
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plb
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_SpriteOver0Lite
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]line equ 0
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lup 8
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lda tmp_sprite_data+{]line*4}
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sta: $0004+{]line*_LINE_SIZE},y
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lda tmp_sprite_data+{]line*4}+2
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sta: $0001+{]line*_LINE_SIZE},y
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]line equ ]line+1
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--^
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plb
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rts
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SpriteUnderALite
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lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
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pha ; and put on the stack for later. Has TileStore bank in high byte.
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ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
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lda TileStore+TS_TILE_ADDR,x
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tax
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plb
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_SpriteUnderALite
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]line equ 0
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lup 8
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lda tmp_sprite_data+{]line*4}
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andl tiledata+{]line*4}+32,x
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oral tiledata+{]line*4},x
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sta: $0004+{]line*_LINE_SIZE},y
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lda tmp_sprite_data+{]line*4}+2
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andl tiledata+{]line*4}+32+2,x
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oral tiledata+{]line*4}+2,x
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sta: $0001+{]line*_LINE_SIZE},y
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]line equ ]line+1
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--^
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plb
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rts
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SpriteUnderVLite
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lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
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pha ; and put on the stack for later. Has TileStore bank in high byte.
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ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
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lda TileStore+TS_TILE_ADDR,x
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tax
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plb
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_SpriteUnderVLite
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]src equ 7
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]dest equ 0
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lup 8
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lda tmp_sprite_data+{]dest*4}
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andl tiledata+{]src*4}+32,x
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oral tiledata+{]src*4},x
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sta: $0004+{]dest*_LINE_SIZE},y
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lda tmp_sprite_data+{]dest*4}+2
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andl tiledata+{]src*4}+32+2,x
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oral tiledata+{]src*4}+2,x
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sta: $0001+{]dest*_LINE_SIZE},y
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]src equ ]src-1
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]dest equ ]dest+1
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--^
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plb
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rts
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CopyTileALite
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lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
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pha ; and put on the stack for later. Has TileStore bank in high byte.
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ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
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lda TileStore+TS_TILE_ADDR,x ; load the address of this tile's data (pre-calculated)
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plb
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tax
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; brk $ac
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_CopyTileALite
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]line equ 0
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lup 8
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ldal tiledata+{]line*4},x
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sta: $0004+{]line*_LINE_SIZE},y
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ldal tiledata+{]line*4}+2,x
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sta: $0001+{]line*_LINE_SIZE},y
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]line equ ]line+1
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--^
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plb
|
||||
rts
|
||||
|
||||
CopyTileVLite
|
||||
lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
|
||||
pha ; and put on the stack for later. Has TileStore bank in high byte.
|
||||
ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
|
||||
lda TileStore+TS_TILE_ADDR,x ; load the address of this tile's data (pre-calculated)
|
||||
plb
|
||||
|
||||
tax
|
||||
_CopyTileVLite
|
||||
]src equ 7
|
||||
]dest equ 0
|
||||
lup 8
|
||||
ldal tiledata+{]src*4},x
|
||||
sta: $0004+{]dest*_LINE_SIZE},y
|
||||
ldal tiledata+{]src*4}+2,x
|
||||
sta: $0001+{]dest*_LINE_SIZE},y
|
||||
]src equ ]src-1
|
||||
]dest equ ]dest+1
|
||||
--^
|
||||
plb
|
||||
rts
|
||||
|
||||
OneSpriteLiteOver0
|
||||
ldy TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
|
||||
phy ; and put on the stack for later. Has TileStore bank in high byte.
|
||||
ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
|
||||
tax ; VBuff address from SpriteBitsToVBuffAddrs macro
|
||||
plb ; set to the code field bank
|
||||
|
||||
_OneSpriteLiteOver0
|
||||
]line equ 0
|
||||
lup 8
|
||||
ldal spritedata+{]line*SPRITE_PLANE_SPAN},x
|
||||
sta: $0004+{]line*_LINE_SIZE},y
|
||||
ldal spritedata+{]line*SPRITE_PLANE_SPAN}+2,x
|
||||
sta: $0001+{]line*_LINE_SIZE},y
|
||||
]line equ ]line+1
|
||||
--^
|
||||
|
||||
plb ; Restore the TileStore bank
|
||||
rts
|
||||
|
||||
; Next implementation; drawing a sprite onto a regular tile. The 1-sprite dispatch preserves the
|
||||
; X-register, so it already points to the TileStore
|
||||
|
||||
OneSpriteLiteOverV
|
||||
jsr FastCopyTileDataV
|
||||
bra _OneSpriteLiteOver
|
||||
|
||||
OneSpriteLiteOverA
|
||||
jsr FastCopyTileDataA
|
||||
|
||||
_OneSpriteLiteOver
|
||||
lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
|
||||
pha ; and put on the stack for later. Has TileStore bank in high byte.
|
||||
ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
|
||||
ldx sprite_ptr0
|
||||
plb
|
||||
|
||||
_OneSpriteLiteOverA
|
||||
_OneSpriteLiteOverV
|
||||
]line equ 0
|
||||
lup 8
|
||||
lda tmp_tile_data+{]line*4}
|
||||
andl spritemask+{]line*SPRITE_PLANE_SPAN},x
|
||||
oral spritedata+{]line*SPRITE_PLANE_SPAN},x
|
||||
sta: $0004+{]line*_LINE_SIZE},y
|
||||
|
||||
lda tmp_tile_data+{]line*4}+2
|
||||
andl spritemask+{]line*SPRITE_PLANE_SPAN}+2,x
|
||||
oral spritedata+{]line*SPRITE_PLANE_SPAN}+2,x
|
||||
sta: $0001+{]line*_LINE_SIZE},y
|
||||
]line equ ]line+1
|
||||
--^
|
||||
plb
|
||||
rts
|
||||
|
||||
OneSpriteLiteUnderA
|
||||
jsr FastCopyTileDataAndMaskA
|
||||
bra _OneSpriteLiteUnder
|
||||
|
||||
OneSpriteLiteUnderV
|
||||
jsr FastCopyTileDataAndMaskV
|
||||
|
||||
_OneSpriteLiteUnder
|
||||
lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
|
||||
pha ; and put on the stack for later. Has TileStore bank in high byte.
|
||||
ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
|
||||
ldx sprite_ptr0
|
||||
plb
|
||||
|
||||
_OneSpriteLiteUnderA
|
||||
_OneSpriteLiteUnderV
|
||||
]line equ 0
|
||||
lup 8
|
||||
ldal spritedata+{]line*SPRITE_PLANE_SPAN},x
|
||||
and tmp_tile_mask+{]line*4}
|
||||
ora tmp_tile_data+{]line*4}
|
||||
sta: $0004+{]line*_LINE_SIZE},y
|
||||
|
||||
ldal spritedata+{]line*SPRITE_PLANE_SPAN}+2,x
|
||||
and tmp_tile_mask+{]line*4}+2
|
||||
ora tmp_tile_data+{]line*4}+2
|
||||
sta: $0001+{]line*_LINE_SIZE},y
|
||||
]line equ ]line+1
|
||||
--^
|
||||
|
||||
plb
|
||||
rts
|
||||
|
|
@ -1,8 +1,8 @@
|
|||
This folder contains the rendering tuples for the different type of tile rendering modes
|
||||
that are defined by both the engine mode and the specific tile attributes. There are
|
||||
a *lot* or variants, so they are cataloged here.
|
||||
a *lot* of variants, so they are cataloged here.
|
||||
|
||||
The top-level TileRender function in the main entry point that defined the overal tile render
|
||||
The top-level TileRender function in the main entry point that defines the overal tile render
|
||||
flow as well as the register parameters and calling conventions for each of the modular
|
||||
components.
|
||||
|
||||
|
|
@ -50,7 +50,7 @@ There are 5 pluggable functions that make up a rendering mode
|
|||
|
||||
4. K_TS_COPY_TILE_DATA & K_TS_APPLY_TILE_DATA
|
||||
|
||||
A pair of function that copye tile data (and possible mask information) into a temporary
|
||||
A pair of function that copy tile data (and possible mask information) into a temporary
|
||||
direct page space and then render that workspace into the code field.
|
||||
|
||||
These functions are used as building blocks by the generic Over/Under multi-sprite
|
||||
|
|
|
|||
Loading…
Reference in New Issue