Tweak conversion from APU value to DOC register value
This commit is contained in:
Lucas Scharenbroich
parent
1035af010d
commit
361c7dae56
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@ -299,7 +299,7 @@ default_freq = 5000
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pulse1_sound_settings = *
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dfb $00+pulse1_oscillator,default_freq ; frequency low register
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dfb $20+pulse1_oscillator,default_freq/256 ; frequency high register
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dfb $40+pulse1_oscillator,128 ; volume register, volume = 0
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dfb $40+pulse1_oscillator,0 ; volume register, volume = 0
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dfb $80+pulse1_oscillator,3 ; wavetable pointer register, point to $0300 by default (50% duty cycle)
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dfb $c0+pulse1_oscillator,0 ; wavetable size register, 256 byte length
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dfb $a0+pulse1_oscillator,0 ; mode register, set to free run
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@ -307,7 +307,7 @@ pulse1_sound_settings = *
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pulse2_sound_settings = *
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dfb $00+pulse2_oscillator,default_freq ; frequency low register
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dfb $20+pulse2_oscillator,default_freq/256 ; frequency high register
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dfb $40+pulse2_oscillator,120 ; volume register, volume = 0
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dfb $40+pulse2_oscillator,0 ; volume register, volume = 0
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dfb $80+pulse2_oscillator,3 ; wavetable pointer register, point to $0300 by default (50% duty cycle)
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dfb $c0+pulse2_oscillator,0 ; wavetable size register, 256 byte length
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dfb $a0+pulse2_oscillator,0 ; mode register, set to free run
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@ -315,7 +315,7 @@ pulse2_sound_settings = *
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triangle_sound_settings = *
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dfb $00+triangle_oscillator,default_freq ; frequency low register
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dfb $20+triangle_oscillator,default_freq/256 ; frequency high register
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dfb $40+triangle_oscillator,0 ; volume register, volume = 0
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dfb $40+triangle_oscillator,128 ; volume register, volume = 0
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dfb $80+triangle_oscillator,5 ; wavetable pointer register, point to $0500
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dfb $c0+triangle_oscillator,0 ; wavetable size register, 256 byte length
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dfb $a0+triangle_oscillator,0 ; mode register, set to free run
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@ -404,6 +404,22 @@ interrupt_handler = *
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xba
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sta sound_data
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; Now the triangle wave. This wave needs linear counter support to be silenced
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rep #$30
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lda APU_TRIANGLE_REG3
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jsr get_pulse_freq ; return freq in 16-bic accumulator
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lsr
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sep #$30
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ldx #$00+triangle_oscillator
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stx sound_address
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sta sound_data
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ldx #$20+triangle_oscillator
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stx sound_address
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xba
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sta sound_data
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; lda border_color
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; inc
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; and #$03
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@ -438,13 +454,29 @@ set_pulse_volume
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sta sound_data
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rts
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; NES freq = f_CPU / (16 * (t + 1))
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; = 1.789773 MHz / (16 * (t + 1))
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; = 111860.812 Hz / (t + 1)
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;
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; IIgs freq = 0.200807 * F_HL (for 32 oscillators with DOC RES = 0)
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;
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; Solving for F_HL = (1 / 0.200807) * 111860.812 / (t + 1)
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; = 557056.338 / (t + 1)
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;
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; if t < 8 this value is out of range and the scillator should be silenced
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;
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; otherwise, break apart the ratio
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;
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; f_HL = 10 * (55706 / (t + 1))
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;
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get_pulse_freq
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mx %00
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and #$07FF ; Load the timer value (11-bits); freq = 1.79MHz / (16 * (t - 1)) = 111860Hz / (t-1)
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dec
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lsr ; Divide top and bottom by 2 -- 55930 / ((t - 1)/2)
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cmp #8
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bcc :no_sound
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inc
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sta divisor
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lda #55930 ; $DA7A
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lda #55706
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sta dividend
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lda #0
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@ -461,12 +493,16 @@ get_pulse_freq
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lda dividend
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sta dividend
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asl
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; asl
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asl
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clc
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adc dividend ; multiple by 10 to get the approx DOC value (0.2Hz per + post-multiple)
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asl
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adc dividend ; multiple by 5 to get the approx DOC value (0.2Hz per)
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; sta dividend
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rts
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:no_sound
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lda #0
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rts
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turn_off_interrupts
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php
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@ -483,7 +519,8 @@ border_color dw 0
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dividend dw 0
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divisor dw 0
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last_phase1_duty_cycle dfb $ff
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last_phase2_duty_cycle dfb $ff
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; 8-bit mode
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; A = register number
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; X = register value
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@ -580,19 +617,19 @@ APU_STATUS_WRITE ENT
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; Pulse 1 is OSC 0
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bit #$01
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beq :pulse1_off
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_SetDOCReg #$40+pulse1_oscillator;#128
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; _SetDOCReg #$40+pulse1_oscillator;#128
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bra :pulse1_end
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:pulse1_off
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_SetDOCReg #$40+pulse1_oscillator;#0
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; _SetDOCReg #$40+pulse1_oscillator;#0
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:pulse1_end
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; Pulse 2 is OSC 2
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bit #$02
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beq :pulse2_off
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_SetDOCReg #$40+pulse2_oscillator;#128
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; _SetDOCReg #$40+pulse2_oscillator;#128
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bra :pulse2_end
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:pulse2_off
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_SetDOCReg #$40+pulse2_oscillator;#0
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; _SetDOCReg #$40+pulse2_oscillator;#0
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:pulse2_end
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; Triangle is OSC 4
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