Apple-2gs-SW
/
iigs-game-engine
mirror of https://github.com/lscharen/iigs-game-engine.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Tweaking updated sprite dispatch flow

This commit is contained in:
Lucas Scharenbroich 2022-06-21 07:29:18 -05:00
parent 4ea3033b5e
commit 553fd3c02a
7 changed files with 273 additions and 71 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

247
demos/tool/App.Main.s
View File

@ -38,8 +38,6 @@ Flips equ 12
pea #256
pea #160
; pea #176
; pea #144
_GTESetScreenMode
; Load a tileset
@ -95,58 +93,57 @@ HERO_SPRITE equ SPRITE_16X16+1
cpx #MAX_SPRITES*2
bcc :sloop
; Manually fill in the 41x26 tiles of the TileStore with a test pattern of trees
;
; Tile 65 Tile 66
; Tile 97 Tile 98
stz 0 ; X
stz 2 ; Y
; Manually fill in the 41x26 tiles of the TileStore with a test pattern of trees
:tloop
ldx 0
ldy 2
jsr _fillTileStore
phx
phy
pea #65
inx
phx
phy
pea #66
ldx #0
ldy #0
jsr _drawTree
cpy #24
beq :skip_last
iny
phx
phy
pea #98
ldx #3
ldy #0
jsr _drawTreeH
dex
phx
phy
pea #97
ldx #0
ldy #3
jsr _drawTreeV
_GTESetTile
_GTESetTile
:skip_last
_GTESetTile
_GTESetTile
ldx #3
ldy #3
jsr _drawTreeHV
lda 0
inc
inc
sta 0
cmp #40
bcc :tloop
ldx #9
ldy #0
jsr _drawTree
stz 0
lda 2
inc
inc
sta 2
cmp #25
bcc :tloop
ldx #9
ldy #3
jsr _drawTree
ldx #12
ldy #0
jsr _drawTree
ldx #12
ldy #3
jsr _drawTree
ldx #6
ldy #0
jsr _drawTreeFront
ldx #6
ldy #3
jsr _drawTreeFront
ldx #6
ldy #6
jsr _drawTreeFront
ldx #3
ldy #6
jsr _drawTreeFront
ldx #0
ldy #6
jsr _drawTreeFront
; Initialize the frame counter
@ -450,6 +447,162 @@ GTEStartUp
:ok3
rts
_fillTileStore
stz Tmp0
:oloop
stz Tmp1
:iloop
pei Tmp1
pei Tmp0
pea #129
_GTESetTile
lda Tmp1
inc
sta Tmp1
cmp #41
bcc :iloop
lda Tmp0
inc
sta Tmp0
cmp #26
bcc :oloop
rts
; Tile 65 Tile 66
; Tile 97 Tile 98
_drawTreeFront
phx
phy
pea #65+TILE_PRIORITY_BIT
inx
phx
phy
pea #66+TILE_PRIORITY_BIT
iny
phx
phy
pea #98+TILE_PRIORITY_BIT
dex
phx
phy
pea #97+TILE_PRIORITY_BIT
_GTESetTile
_GTESetTile
_GTESetTile
_GTESetTile
rts
_drawTree
phx
phy
pea #65
inx
phx
phy
pea #66
iny
phx
phy
pea #98
dex
phx
phy
pea #97
_GTESetTile
_GTESetTile
_GTESetTile
_GTESetTile
rts
_drawTreeH
phx
phy
pea #66+TILE_HFLIP_BIT
inx
phx
phy
pea #65+TILE_HFLIP_BIT
iny
phx
phy
pea #97+TILE_HFLIP_BIT
dex
phx
phy
pea #98+TILE_HFLIP_BIT
_GTESetTile
_GTESetTile
_GTESetTile
_GTESetTile
rts
_drawTreeV
phx
phy
pea #97+TILE_VFLIP_BIT
inx
phx
phy
pea #98+TILE_VFLIP_BIT
iny
phx
phy
pea #66+TILE_VFLIP_BIT
dex
phx
phy
pea #65+TILE_VFLIP_BIT
_GTESetTile
_GTESetTile
_GTESetTile
_GTESetTile
rts
_drawTreeHV
phx
phy
pea #98+TILE_VFLIP_BIT+TILE_HFLIP_BIT
inx
phx
phy
pea #97+TILE_VFLIP_BIT+TILE_HFLIP_BIT
iny
phx
phy
pea #65+TILE_VFLIP_BIT+TILE_HFLIP_BIT
dex
phx
phy
pea #66+TILE_VFLIP_BIT+TILE_HFLIP_BIT
_GTESetTile
_GTESetTile
_GTESetTile
_GTESetTile
rts
MyUserId ds 2
ToolPath str '1/Tool160'
FrameCount ds 2

2
demos/tool/package.json
View File

@ -12,7 +12,7 @@
},
"scripts": {
"test": "npm run build && build-image.bat %npm_package_config_cadius% && %npm_package_config_gsport%",
"debug": "%npm_package_config_crossrunner% GTEToolDemo -Source MAINSEG_Output.txt -Debug -CompatibilityLayer",
"debug": "%npm_package_config_crossrunner% GTEToolDemo -Source MAINSEG_Output.txt -Debug -CompatibilityLayer -Map App.s",
"build": "npm run build:tool && npm run build:sys16",
"build:sys16": "%npm_package_config_merlin32% -V %npm_package_config_macros% App.s",
"build:tool": "%npm_package_config_merlin32% -V %npm_package_config_macros% ../../src/Master.s"

44
src/Tiles.s
View File

@ -217,28 +217,20 @@ _SetTile
lda #4
sta procIdx
:low_priority
lda #TILE_ID_MASK
bit newTileId
bne :not_zero
beq :is_zero
lda #2
tsb procIdx
:not_zero
:is_zero
lda #TILE_VFLIP_BIT
bit newTileId
beq :no_vflip
lda #1
tsb procIdx
:no_vflip
; Multiple by 6 to get the correct table entry index
asl procIdx
lda procIdx
asl
adc procIdx
sta procIdx
; Now integrate with the engine mode indicator
lda EngineMode
@ -296,12 +288,22 @@ _SetTile
tblPtr equ blttmp
_SetTileProcs
; Set a long pointer to this bank
sty tblPtr
clc
; Multiple the proc index by 6 to get the correct table entry offset
asl
sta tblPtr
asl
adc tblPtr
sta tblPtr
; Add this offset to the base table address
tya
adc tblPtr
sta tblPtr
; Set the pointer to this bank
phk
phk
pla
@ -350,12 +352,16 @@ _SetTileProcs
FastProcs
FastOverZA dw _TBConstTile0,GenericOverZero,_OneSpriteFastOver0
FastOverZV dw _TBConstTile0,GenericOverZero,_OneSpriteFastOver0
FastOverNA dw _TBCopyDataFast,GenericOverAFast,_OneSpriteFastOverA
FastOverNV dw _TBCopyDataVFast,GenericOverVFast,_OneSpriteFastOverV
FastOverNA dw _TBCopyDataAFast,GenericOverZero,_OneSpriteFastOverA
FastOverNV dw _TBCopyDataVFast,GenericOverZero,_OneSpriteFastOverV
;FastOverNA dw _TBCopyDataAFast,GenericOverAFast,_OneSpriteFastOverA
;FastOverNV dw _TBCopyDataVFast,GenericOverVFast,_OneSpriteFastOverV
FastUnderZA dw _TBConstTile0,GenericUnderZero,GenericUnderZero
FastUnderZV dw _TBConstTile0,GenericUnderZero,GenericUnderZero
FastUnderNA dw _TBCopyDataFast,GenericUnderAFast,_OneSpriteFastUnderA
FastUnderNV dw _TBCopyDataVFast,GenericUnderVFast,_OneSpriteFastUnderV
FastUnderNA dw _TBConstTile0,GenericOverZero,_OneSpriteFastOver0
FastUnderNV dw _TBConstTile0,GenericOverZero,_OneSpriteFastOver0
;FastUnderNA dw _TBCopyDataFast,GenericUnderAFast,_OneSpriteFastUnderA
;FastUnderNV dw _TBCopyDataVFast,GenericUnderVFast,_OneSpriteFastUnderV
DynProcs
DynOverZA
@ -483,7 +489,7 @@ endbit1 mac
; OPTIMIZATION:
;
; bit #$00FF ; Optimization to skip the first 8 bits if they are all zeros
; bit #$00FF ; Skip the first 8 bits if they are all zeros
; bne norm_entry
; xba
; jmp skip_entry

1
src/blitter/Tiles00000.s
View File

@ -41,6 +41,7 @@ _TBSolidTile_VH
; This is called via a JMP (abs,x) with an extra byte on the stack that holds the bank
; register value. This must be restored prior to returning
_TBCopyDataFast
_TBCopyDataAFast
tax
_TBCopyDataFastX
]line equ 0

42
src/render/Fast.s
View File

@ -146,3 +146,45 @@ GenericUnderZero
plb
rts
; Simple pair of routines that copies just the tile data to the direct page workspace. Data Bank
; must be set to the TileData bank in entry.
;
; Preserves the X-register
FastCopyTileDataA
ldy TileStore+TS_TILE_ADDR,x ; load the tile address
pei DP2_TILEDATA_AND_TILESTORE_BANKS
plb ; set to the tiledata bank
]line equ 0
lup 8
lda tiledata+{]line*4},y
sta tmp_tile_data+{]line*4}
lda tiledata+{]line*4}+2,y
sta tmp_tile_data+{]line*4}+2
]line equ ]line+1
--^
plb
rts
FastCopyTileDataV
ldy TileStore+TS_TILE_ADDR,x ; load the tile address
pei DP2_TILEDATA_AND_TILESTORE_BANKS
plb ; set to the tiledata bank
]src equ 7
]dest equ 0
lup 8
lda tiledata+{]src*4},y
sta tmp_tile_data+{]dest*4}
lda tiledata+{]src*4}+2,y
sta tmp_tile_data+{]dest*4}+2
]src equ ]src-1
]dest equ ]dest+1
--^
plb
rts

2
src/render/Render.s
View File

@ -65,7 +65,7 @@ CopyTileToDPSprite
; must be set to the TileData bank in entry.
;
; Preserves the X-register
CopyTileDataToDP
CopyTileDataToDPA
]line equ 0
lup 8
lda tiledata+{]line*4},y

6
src/render/Sprite1.s
View File

@ -34,11 +34,11 @@ _OneSpriteFastOver0
; The 1-sprite dispatch prserves the X-register, so it already points to the TileStore
_OneSpriteFastOverV
jsr CopyTileDataToDPV
jsr FastCopyTileDataV
bra _OneSpriteFastOver
_OneSpriteFastOverA
jsr CopyTileDataToDP
jsr FastCopyTileDataA
_OneSpriteFastOver
lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
@ -86,7 +86,7 @@ _OneSpriteSlowOver0
; Slow variant for regular tile.
_OneSpriteSlowOver
jsr CopyTileDataToDP
jsr CopyTileDataToDPA
lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
pha ; and put on the stack for later. Has TileStore bank in high byte.