Remove unused memory and start working on priority renderer
This commit is contained in:
parent
364af7bc57
commit
955cf4a580
|
@ -17,7 +17,7 @@ TS_SCREEN_ADDR equ {TILE_STORE_SIZE*8} ; cached value of on-screen
|
|||
|
||||
; TODO: Move these arrays into the K bank to support direct dispatch via jmp (abs,x)
|
||||
TS_BASE_TILE_COPY equ {TILE_STORE_SIZE*9} ; derived from TS_TILE_ID to optimize tile copy to support sprite rendering
|
||||
TS_BASE_TILE_DISP equ {TILE_STORE_SIZE*10} ; derived from TS_TILE_ID to optimize base (non-sprite) tile dispatch in the Render function
|
||||
; TS_BASE_TILE_DISP equ {TILE_STORE_SIZE*10} ; derived from TS_TILE_ID to optimize base (non-sprite) tile dispatch in the Render function
|
||||
TS_DIRTY_TILE_DISP equ {TILE_STORE_SIZE*11} ; derived from TS_TILE_ID to optimize dirty tile dispatch in the Render function
|
||||
|
||||
TILE_STORE_NUM equ 12 ; Need this many parallel arrays
|
||||
|
|
|
@ -13,13 +13,9 @@ NoSpriteFast
|
|||
lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
|
||||
pha ; and put on the stack for later. Has TileStore bank in high byte.
|
||||
ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
|
||||
; lda TileStore+TS_BASE_TILE_DISP,x ; go to the tile copy routine (just basics)
|
||||
; stal nsf_patch+1
|
||||
lda TileStore+TS_TILE_ADDR,x ; load the address of this tile's data (pre-calculated)
|
||||
plb ; set the code field bank
|
||||
jmp (K_TS_BASE_TILE_DISP,x)
|
||||
|
||||
;nsf_patch jmp $0000
|
||||
jmp (K_TS_BASE_TILE_DISP,x) ; go to the tile copy routine (just basics)
|
||||
|
||||
; The TS_BASE_TILE_DISP routines will come from this table when ENGINE_MODE_TWO_LAYER and
|
||||
; ENGINE_MODE_DYN_TILES are both off.
|
||||
|
@ -32,8 +28,51 @@ FastTileProcs dw _TBCopyDataFast,_TBCopyDataFast,_TBCopyDataFast,_TBCopyDataFa
|
|||
; then the mask information must be copied as well....This is the last decision point.
|
||||
|
||||
SpriteDispatch
|
||||
; jmp (K_TS_SPRITE_TILE_DISP,x)
|
||||
|
||||
txy
|
||||
SpriteBitsToVBuffAddrs OneSpriteFast;TwoSpritesFast;ThreeSpritesFast;FourSpritesFast
|
||||
SpriteBitsToVBuffAddrs OneSpriteFastUnder;TwoSpritesFast;ThreeSpritesFast;FourSpritesFast
|
||||
|
||||
; This handles sprite with the tile above
|
||||
OneSpriteFastUnder
|
||||
tax
|
||||
jsr _CopySpriteDataToDP2 ; preserves Y
|
||||
|
||||
ldx TileStore+TS_TILE_ADDR,y
|
||||
lda TileStore+TS_CODE_ADDR_HIGH,y ; load the bank of the target code field line
|
||||
pha ; and put on the stack for later. Has TileStore bank in high byte.
|
||||
lda TileStore+TS_CODE_ADDR_LOW,y ; load the address of the code field
|
||||
tay
|
||||
plb
|
||||
|
||||
]line equ 0
|
||||
lup 8
|
||||
lda tmp_tile_data+{]line*4}
|
||||
andl tiledata+{]line*4}+32,x
|
||||
oral tiledata+{]line*4},x
|
||||
sta: $0004+{]line*$1000},y
|
||||
|
||||
lda tmp_tile_data+{]line*4}+2
|
||||
andl tiledata+{]line*4}+32+2,x
|
||||
oral tiledata+{]line*4}+2,x
|
||||
sta: $0001+{]line*$1000},y
|
||||
]line equ ]line+1
|
||||
--^
|
||||
plb
|
||||
rts
|
||||
|
||||
|
||||
_CopySpriteDataToDP2
|
||||
]line equ 0
|
||||
lup 8
|
||||
ldal spritedata+{]line*SPRITE_PLANE_SPAN},x
|
||||
sta tmp_tile_data+{]line*4}
|
||||
|
||||
ldal spritedata+{]line*SPRITE_PLANE_SPAN}+2,x
|
||||
sta tmp_tile_data+{]line*4}+2
|
||||
]line equ ]line+1
|
||||
--^
|
||||
rts
|
||||
|
||||
; Where there are sprites involved, the first step is to call a routine to copy the
|
||||
; tile data into a temporary buffer. Then the sprite data is merged and placed into
|
||||
|
@ -52,7 +91,6 @@ OneSpriteFast
|
|||
tay
|
||||
plb
|
||||
|
||||
_TBApplySpriteData2
|
||||
]line equ 0
|
||||
lup 8
|
||||
lda tmp_tile_data+{]line*4}
|
||||
|
|
Loading…
Reference in New Issue