Get the PEI Slammer working for exposing shadowed writes
This commit is contained in:
Lucas Scharenbroich
parent
d9e3ee14e8
commit
c5eb84ea37
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@ -15,7 +15,8 @@
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"debug": "%npm_package_config_crossrunner% src\\GTETestApp -Source src\\GTETestApp_S02_MAINSEG_Output.txt -Debug -CompatibilityLayer",
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"build": "%npm_package_config_merlin32% -V %npm_package_config_macros% src\\App.s",
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"build:watch": "watch \"npm run build\" src",
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"build:assets": "node ./tools/pngtoiigs.js ./assets/donut-plains-2-8-color.png ./emu/bg1a.bin --start-index 6 && node ./tools/pngtoiigs.js ./assets/donut-plains-2-8-color-shift.png ./emu/bg1b.bin --start-index 6 && node ./tools/pngtoiigs.js ./assets/donut-plains-1-6-color.png ./emu/fg1.bin"
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"build:assets-smw": "node ./tools/pngtoiigs.js ./assets/donut-plains-2-8-color.png ./emu/bg1a.bin --start-index 6 && node ./tools/pngtoiigs.js ./assets/donut-plains-2-8-color-shift.png ./emu/bg1b.bin --start-index 6 && node ./tools/pngtoiigs.js ./assets/donut-plains-1-6-color.png ./emu/fg1.bin",
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"build:assets-fatdog": "node ./tools/pngtoiigs.js ./assets/armada-7-color.png ./emu/bg1a.bin --start-index 8 && node ./tools/pngtoiigs.js ./assets/armada-7-color-shift.png ./emu/bg1b.bin --start-index 8 && node ./tools/pngtoiigs.js ./assets/armada-7-color-shuffle.png ./emu/fg1.bin --start-index 1"
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},
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"repository": {
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"type": "git",
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@ -63,9 +63,11 @@ Demo
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lda OneSecondCounter
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sta oldOneSecondCounter
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stz frameCount
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:loop
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lda #1
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jsr MoveLeft
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inc frameCount
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ldal KBD_STROBE_REG
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@ -74,6 +76,8 @@ Demo
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and #$007F
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cmp #'s'
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bne :nokey
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pla
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rts
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:nokey
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@ -109,3 +113,23 @@ FPSStr str 'FPS'
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@ -42,7 +42,7 @@ SHR_PALETTES equ $E19E00
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tiledata ext
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; Feature flags
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NO_INTERRUPTS equ 0 ; turn off for crossrunner debugging
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NO_INTERRUPTS equ 1 ; turn off for crossrunner debugging
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; Typical init
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@ -1284,6 +1284,8 @@ qtRec adrl $0000
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22
src/Render.s
22
src/Render.s
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@ -61,9 +61,6 @@ Render
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; byte, then we may have to change the CODE_ENTRY values or restore/set new OPCODE
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; values, but not both.
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jsr ShadowOff
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jsr ShadowOn
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; It's important to do _ApplyBG0YPos first because it calculates the value of StartY % 208 which is
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; used in all of the other loops
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@ -72,7 +69,21 @@ Render
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jsr _ApplyBG1YPos ; Adjust the index values into the BG1 bank buffer
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jsr _ApplyBG1XPos ; Adjust the direct page pointers to the BG1 bank
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; The code fields are locked in now and reder to be rendered
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jsr ShadowOff
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ldx #0 ; Blit the full virtual buffer to the screen
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ldy #8
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jsr _BltRange
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jsr ShadowOn
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ldx #0 ; Expose the top 8 rows
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ldy #8
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jsr _PEISlam
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ldx #8 ; Blit the full virtual buffer to the screen
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ldy ScreenHeight
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jsr _BltRange
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@ -90,8 +101,3 @@ Render
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@ -62,22 +62,61 @@ _ApplyBG1XPos
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lda BlitterDP ; blitter direct page space and fill in the addresses
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tcd
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tya
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ldx #162
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:loop
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tya
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clc
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adc affine,x
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sta 00,x ; store the value
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dec
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dec
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bpl *+6
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dey
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dey
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bpl :nowrap
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tya
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clc
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adc #164
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tay
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:nowrap
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dex
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dex
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bpl :loop
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pld
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rts
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affine ds 164
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; Pass accumulator to set every (A / 256) pitch
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SetAffine
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ldx #0
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ldy #0
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and #$00FF
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pha ; step size
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pea $0000
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:loop lda 1,s
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clc
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adc 3,s
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cmp #256
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bcc :skip
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tya
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clc
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adc #256 ; Move to next BG1 line
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tay
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:skip and #$00FF ; always clamp to 256
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sta 1,s
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tya
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sta affine,x
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inx
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inx
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cpx #164
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bcc :loop
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pla
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pla
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rts
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_ClearBG1Buffer
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phb
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pha
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@ -266,6 +305,35 @@ CopyBG1YTableToBG1Addr
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@ -10,33 +10,33 @@
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; on the SHR screen or the current value of StartY
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_BltRange
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:exit_ptr equ tmp0
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:jmp_low_save equ tmp2
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:exit_ptr equ tmp0
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:jmp_low_save equ tmp2
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phb ; preserve the bank register
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clc`
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phb ; preserve the bank register
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clc`
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dey
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tya ; Get the address of the line that we want to return from
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adc StartY ; and create a pointer to it
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asl
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tay
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lda BTableLow,y
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sta :exit_ptr
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lda BTableHigh,y
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sta :exit_ptr+2
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dey
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tya ; Get the address of the line that we want to return from
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adc StartY ; and create a pointer to it
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asl
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tay
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lda BTableLow,y
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sta :exit_ptr
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lda BTableHigh,y
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sta :exit_ptr+2
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txa ; get the first line (0 - 199)
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adc StartY ; add in the virtual offset (0, 207) -- max value of 406
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asl
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tax ; this is the offset into the blitter table
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txa ; get the first line (0 - 199)
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adc StartY ; add in the virtual offset (0, 207) -- max value of 406
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asl
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tax ; this is the offset into the blitter table
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sep #$20 ; 8-bit Acc
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lda BTableHigh,x ; patch in the bank
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sta blt_entry+3
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sep #$20 ; 8-bit Acc
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lda BTableHigh,x ; patch in the bank
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sta blt_entry+3
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lda BTableLow+1,x ; patch in the page
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sta blt_entry+2
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lda BTableLow+1,x ; patch in the page
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sta blt_entry+2
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; The way we patch the exit code is subtle, but very fast. The CODE_EXIT offset points to
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; an JMP/JML instruction that transitions to the next line after all of the code has been
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@ -45,49 +45,53 @@ _BltRange
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; The trick we use is to patch the low byte to force the code to jump to a special return
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; function (jml blt_return) in the *next* code field line.
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ldy #CODE_EXIT+1 ; this is a JMP or JML instruction that points to the next line.
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lda [:exit_ptr],y
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sta :jmp_low_save
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lda #FULL_RETURN ; this is the offset of the return code
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sta [:exit_ptr],y ; patch out the low byte of the JMP/JML
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ldy #CODE_EXIT+1 ; this is a JMP or JML instruction that points to the next line.
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lda [:exit_ptr],y
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sta :jmp_low_save
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lda #FULL_RETURN ; this is the offset of the return code
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sta [:exit_ptr],y ; patch out the low byte of the JMP/JML
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; Now we need to set up the Bank, Stack Pointer and Direct Page registers for calling into
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; the code field
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lda StartX
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bit #$01
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beq :primary
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lda BG1AltBank
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bra :alt
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:primary lda BG1DataBank
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lda StartX
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bit #$01
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beq :primary
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lda BG1AltBank
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bra :alt
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:primary lda BG1DataBank
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:alt
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pha
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plb
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rep #$20
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pha
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plb
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rep #$20
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phd ; Save the application direct page
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lda BlitterDP ; Set the direct page to the blitter data
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tcd
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phd ; Save the application direct page
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lda BlitterDP ; Set the direct page to the blitter data
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tcd
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sei ; disable interrupts
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_R0W1
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tsc ; save the stack pointer
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stal stk_save+1
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sei ; disable interrupts
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_R0W1
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tsc ; save the stack pointer
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stal stk_save+1
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blt_entry jml $000000 ; Jump into the blitter code $XX/YY00
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blt_entry jml $000000 ; Jump into the blitter code $XX/YY00
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blt_return _R0W0
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stk_save lda #0000 ; load the stack
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tcs
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cli ; re-enable interrupts
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pld ; restore the direct page
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blt_return _R0W0
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stk_save lda #0000 ; load the stack
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tcs
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cli ; re-enable interrupts
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pld ; restore the direct page
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sep #$20
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ldy #CODE_EXIT+1
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lda :jmp_low_save
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sta [:exit_ptr],y
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rep #$20
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sep #$20
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ldy #CODE_EXIT+1
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lda :jmp_low_save
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sta [:exit_ptr],y
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rep #$20
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plb ; restore the bank
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rts
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plb ; restore the bank
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rts
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; Placeholder for actual sprite drawing. The implementation will be simple because
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; we don't do anything sprite related; just call function pointers provided to us.
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_RenderSprites
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rts
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@ -10,82 +10,119 @@
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; 12 additional instructions, so this is an optimization that is unlikely to lead to a net
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; improvement.
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;
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; A = base address of top-left edge of the screen
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; Y = number of scanlines to blit
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; X = width of the screen in bytes
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PEISlam
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stx :screen_width ; save the width
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; X = first line (inclusive), valid range of 0 to 199
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; Y = last line (exclusive), valid range >X up to 200
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_PEISlam
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lda ScreenWidth
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dec
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sta :screen_width_1 ; save the width-1 outside of the direct page
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phd ; save the current direct page and assign the base
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tcd ; screen address to the direct page register
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clc
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adc :screen_width ; screen address of the right edge (will go in stack)
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tax ; but cache in x register for a bit....
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lda #:pei_end ; patch the PEI entry address
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and #$FFFE ; should always be even, but....
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sec
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sbc ScreenWidth
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sta :inner+1
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tsc
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sta :stk_save ; save the stack pointer to restore later
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phx
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tya
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sec
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sbc 1,s
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ply
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tay ; get the number of lines in the y register
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lda #:pei_end ; patch the PEI entry address
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sec
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sbc :screen_width
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sta :inner+1
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txa
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asl
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tax
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lda RTable,x ; This is the right visible byte, so add one to get the
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tax ; left visible byte (cache in x-reg)
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sec
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sbc ScreenWidth
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inc
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clc ; clear before the loop -- nothing in the loop affect the carry bit
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brl :outer ; hop into the entry point.
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phd ; save the current direct page and assign the base
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tcd ; screen address to the direct page register
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]dp equ 158
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lup 80 ; A full width screen is 160 bytes / 80 words
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pei ]dp
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]dp equ ]dp-2
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--^
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tsc
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sta :stk_save ; save the stack pointer to restore later
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clc ; clear before the loop -- nothing in the loop affect the carry bit
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brl :outer ; hop into the entry point.
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]dp equ 158
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lup 80 ; A full width screen is 160 bytes / 80 words
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pei ]dp
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]dp equ ]dp-2
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--^
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:pei_end
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tdc ; Move to the next line
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adc #160
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tcd
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adc :screen_width
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tcs
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tdc ; Move to the next line
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adc #160
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tcd
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adc :screen_width_1
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tcs
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dey ; decrement the total counter, if zero then we're done
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beq :exit
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dey ; decrement the total counter, if zero then we're done
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beq :exit
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dex ; decrement the inner counter. Both counters are set
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beq :restore ; up so that they fall-through by default to save a cycle
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; per loop iteration.
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dex ; decrement the inner counter. Both counters are set
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beq :restore ; up so that they fall-through by default to save a cycle
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; per loop iteration.
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:inner jmp $0000 ; 25 cycles of overhead per line. A full width slam executes all
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; 80 of the PEI instructions which we expect to take 7 cycles
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; since the direct page is not aligned. So total overhead is
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; 25 / (25 + 7 * 80) = 4.27% of execution
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;
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; Without the interrupt breaks, we could remove the dex/beq test
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; and save 4 cycles per loop which takes the overhead down to
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; only 3.6%
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:inner jmp $0000 ; 25 cycles of overhead per line. A full width slam executes all
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; 80 of the PEI instructions which we expect to take 7 cycles
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; since the direct page is not aligned. So total overhead is
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; 25 / (25 + 7 * 80) = 4.27% of execution
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;
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; Without the interrupt breaks, we could remove the dex/beq test
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; and save 4 cycles per loop which takes the overhead down to
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; only 3.6%
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:restore
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tsx ; save the current stack
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_R0W0 ; restore the execution environment and
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lda :stk_save ; give a few cycles to catch some interrupts
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tcs
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cli ; fall through here -- saves a BRA instruction
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tsx ; save the current stack
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_R0W0 ; restore the execution environment and
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lda :stk_save ; give a few cycles to catch some interrupts
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tcs
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cli ; fall through here -- saves a BRA instruction
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:outer
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sei
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txs ; set the stack address to the right edge
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ldx #8 ; Enable interrupts at least once every 8 lines
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_R1W1
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bra :inner
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sei
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txs ; set the stack address to the right edge
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ldx #8 ; Enable interrupts at least once every 8 lines
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_R1W1
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bra :inner
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:exit
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_R0W0
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lda :stk_save
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tcs
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cli
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_R0W0
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lda :stk_save
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tcs
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cli
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pld
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rts
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:stk_save ds 2
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:screen_width_1 ds 2
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pld
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rts
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:stk_save ds 2
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:screen_width ds 2
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@ -186,6 +186,57 @@ CopyTile
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sta $7001,y
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rts
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; Primitives to render a dynamic tile
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;
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; LDA 00,x / PHA where the operand is fixed when the tile is rendered
|
||||
; $B5 $00 $48
|
||||
;
|
||||
; A = dynamic tile id (must be an 8-bit value)
|
||||
|
||||
:DynTile
|
||||
and #$00FF
|
||||
ora #$4800
|
||||
sta: $0004,y
|
||||
sta $1004,y
|
||||
sta $2004,y
|
||||
sta $3004,y
|
||||
sta $4004,y
|
||||
sta $5004,y
|
||||
sta $6004,y
|
||||
sta $7004,y
|
||||
inc
|
||||
inc
|
||||
sta: $0001,y
|
||||
sta $1001,y
|
||||
sta $2001,y
|
||||
sta $3001,y
|
||||
sta $4001,y
|
||||
sta $5001,y
|
||||
sta $6001,y
|
||||
sta $7001,y
|
||||
|
||||
sep #$20
|
||||
lda #$B5
|
||||
sta: $0000,y
|
||||
sta: $0003,y
|
||||
sta $1000,y
|
||||
sta $1003,y
|
||||
sta $2000,y
|
||||
sta $2003,y
|
||||
sta $3000,y
|
||||
sta $3003,y
|
||||
sta $4000,y
|
||||
sta $4003,y
|
||||
sta $5000,y
|
||||
sta $5003,y
|
||||
sta $6000,y
|
||||
sta $6003,y
|
||||
sta $7000,y
|
||||
sta $7003,y
|
||||
rep #$20
|
||||
rts
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue