Fix off-by-one issue in tile IDs and make the entry point consistent in the code field generator
This commit is contained in:
parent
4006f76c02
commit
d5421afdbd
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@ -1,52 +1,65 @@
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TileAnimInit ENT
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TileAnimInit ENT
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ldx #168
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ldy #0
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jsl CopyTileToDyn
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ldx #169
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ldy #1
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jsl CopyTileToDyn
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ldx #208
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ldy #2
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jsl CopyTileToDyn
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ldx #209
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ldy #3
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jsl CopyTileToDyn
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lda #TileAnim_168
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ldx #^TileAnim_168
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ldy #15
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jsl StartScript
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lda #TileAnim_169
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ldx #^TileAnim_169
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ldy #15
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jsl StartScript
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lda #TileAnim_208
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ldx #^TileAnim_208
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ldy #15
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jsl StartScript
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lda #TileAnim_209
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ldx #^TileAnim_209
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ldy #15
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jsl StartScript
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rts
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ldx #168
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ldy #0
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jsl CopyTileToDyn
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ldx #169
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ldy #1
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jsl CopyTileToDyn
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ldx #208
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ldy #2
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jsl CopyTileToDyn
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ldx #209
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ldy #3
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jsl CopyTileToDyn
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lda #TileAnim_168 ; low word of handler
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ldx #^TileAnim_168 ; high word of handler
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ldy #15 ; number of ticks
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jsl StartScript
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lda #TileAnim_169
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ldx #^TileAnim_169
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ldy #15
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clc
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jsl StartScript
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lda #TileAnim_208
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ldx #^TileAnim_208
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ldy #15
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clc
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jsl StartScript
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lda #TileAnim_209
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ldx #^TileAnim_209
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ldy #15
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clc
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jsl StartScript
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rts
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TileAnim_168
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dw $8006,168,0,0
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dw $8006,170,0,0
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dw $8006,172,0,0
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dw $cd06,174,0,0
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dw $8006,169,0,0
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dw $8006,171,0,0
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dw $8006,173,0,0
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dw $cd06,175,0,0
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TileAnim_169
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dw $8006,169,1,0
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dw $8006,171,1,0
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dw $8006,173,1,0
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dw $cd06,175,1,0
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dw $8006,170,1,0
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dw $8006,172,1,0
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dw $8006,174,1,0
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dw $cd06,176,1,0
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TileAnim_208
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dw $8006,208,2,0
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dw $8006,210,2,0
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dw $8006,212,2,0
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dw $cd06,214,2,0
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dw $8006,209,2,0
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dw $8006,211,2,0
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dw $8006,213,2,0
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dw $cd06,215,2,0
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TileAnim_209
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dw $8006,209,3,0
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dw $8006,211,3,0
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dw $8006,213,3,0
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dw $cd06,215,3,0
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dw $8006,210,3,0
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dw $8006,212,3,0
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dw $8006,214,3,0
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dw $cd06,216,3,0
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@ -2,24 +2,24 @@
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mx %00
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DP_ADDR equ entry_1-base+1 ; offset to patch in the direct page for dynamic tiles
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BG1_ADDR equ entry_2-base+1 ; offset to patch in the Y-reg for BG1 (dp),y addressing
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STK_ADDR equ entry_3-base+1 ; offset to patch in the stack (SHR) right edge address
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DP_ADDR equ entry_1-base+1 ; offset to patch in the direct page for dynamic tiles
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BG1_ADDR equ entry_2-base+1 ; offset to patch in the Y-reg for BG1 (dp),y addressing
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STK_ADDR equ entry_3-base+1 ; offset to patch in the stack (SHR) right edge address
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DP_ENTRY equ entry_1-base
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TWO_LYR_ENTRY equ entry_2-base
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ONE_LYR_ENTRY equ entry_3-base
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CODE_ENTRY_OPCODE equ entry_jmp-base
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CODE_ENTRY equ entry_jmp-base+1 ; low byte of the page-aligned jump address
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CODE_ENTRY equ entry_jmp-base+1 ; low byte of the page-aligned jump address
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ODD_ENTRY equ odd_entry-base+1
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CODE_TOP equ loop-base
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CODE_LEN equ top-base
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CODE_EXIT equ even_exit-base
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OPCODE_SAVE equ odd_save-base ; spot to save the code field opcode when patching exit BRA
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OPCODE_HIGH_SAVE equ odd_save-base+2 ; save the third byte
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FULL_RETURN equ full_return-base ; offset that returns from the blitter
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ENABLE_INT equ enable_int-base ; offset that re-enable interrupts and continues
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OPCODE_SAVE equ odd_save-base ; spot to save the code field opcode when patching exit BRA
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OPCODE_HIGH_SAVE equ odd_save-base+2 ; save the third byte
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FULL_RETURN equ full_return-base ; offset that returns from the blitter
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ENABLE_INT equ enable_int-base ; offset that re-enable interrupts and continues
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LINES_PER_BANK equ 16
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SNIPPET_BASE equ snippets-base
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@ -64,17 +64,17 @@ BankPatchNum equ *-BankPatches
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; usually only be executed once during app initialization. It doesn't get called
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; with any significant frequency.
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SetScreenRect sty ScreenHeight ; Save the screen height and width
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SetScreenRect sty ScreenHeight ; Save the screen height and width
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stx ScreenWidth
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tax ; Temp save of the accumulator
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tax ; Temp save of the accumulator
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and #$00FF
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sta ScreenY0
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clc
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adc ScreenHeight
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sta ScreenY1
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txa ; Restore the accumulator
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txa ; Restore the accumulator
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xba
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and #$00FF
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sta ScreenX0
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@ -82,31 +82,31 @@ SetScreenRect sty ScreenHeight ; Save the screen height
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adc ScreenWidth
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sta ScreenX1
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lda ScreenHeight ; Divide the height in scanlines by 8 to get the number tiles
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lda ScreenHeight ; Divide the height in scanlines by 8 to get the number tiles
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lsr
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lsr
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lsr
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sta ScreenTileHeight
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lda ScreenWidth ; Divide width in bytes by 4 to get the number of tiles
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lda ScreenWidth ; Divide width in bytes by 4 to get the number of tiles
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lsr
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lsr
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sta ScreenTileWidth
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lda ScreenY0 ; Calculate the address of the first byte
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asl ; of the right side of the playfield
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lda ScreenY0 ; Calculate the address of the first byte
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asl ; of the right side of the playfield
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tax
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lda ScreenAddr,x ; This is the address for the left edge of the physical screen
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lda ScreenAddr,x ; This is the address for the left edge of the physical screen
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clc
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adc ScreenX1
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dec
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pha ; Save for second loop
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pha ; Save for second loop
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ldx #0
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ldy ScreenHeight
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jsr :loop
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pla ; Reset the address and continue filling in the
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ldy ScreenHeight ; second half of the table
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pla ; Reset the address and continue filling in the
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ldy ScreenHeight ; second half of the table
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:loop clc
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sta RTable,x
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adc #160
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@ -135,7 +135,7 @@ FillScreen lda #0
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lsr
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tay
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lda #$FFFF
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:xloop stal $E10000,x ; X is the absolute address
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:xloop stal $E10000,x ; X is the absolute address
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inx
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inx
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dey
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@ -247,7 +247,7 @@ Mod208 cmp #%1101000000000000
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; A = value
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;
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; Set M to 0 or 1
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SetConst ; Need a blank line here, otherwise the :tbl local variable resolveds backwards
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SetConst ; Need a blank line here, otherwise the :tbl local variable resolveds backwards
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jmp (:tbl,x)
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:tbl da :bottom-00,:bottom-03,:bottom-06,:bottom-09
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da :bottom-12,:bottom-15,:bottom-18,:bottom-21
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@ -381,13 +381,13 @@ BuildBank
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lda [:bankArray],y
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sta :target+2
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iny ; move to the next item
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iny ; move to the next item
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iny
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iny ; middle byte
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cpy #4*13 ; if greater than the array length, wrap back to zero
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iny ; middle byte
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cpy #4*13 ; if greater than the array length, wrap back to zero
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bcc :ok
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ldy #1
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:ok lda [:bankArray],y ; Get the middle and high bytes of the address
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:ok lda [:bankArray],y ; Get the middle and high bytes of the address
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sta :nextBank
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:next
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@ -406,7 +406,7 @@ BuildBank
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; Change the patched value to one of DP_ENTRY, TWO_LYR_ENTRY or ONE_LYR_ENTRY based on the capabilities
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; that the engine needs.
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lda #$F000+{DP_ENTRY} ; Set the address from each line to the next
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lda #$F000+{DP_ENTRY} ; Set the address from each line to the next
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ldy #CODE_EXIT+1
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ldx #15*2
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jsr SetAbsAddrs
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@ -414,14 +414,14 @@ BuildBank
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ldy #DP_ADDR
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jsr SetDPAddrs
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ldy #$F000+CODE_EXIT ; Patch the last line with a JML to go to the next bank
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lda #{$005C+{TWO_LYR_ENTRY}*256}
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ldy #$F000+CODE_EXIT ; Patch the last line with a JML to go to the next bank
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lda #{$005C+{DP_ENTRY}*256}
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sta [:target],y
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ldy #$F000+CODE_EXIT+2
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lda :nextBank
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sta [:target],y
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ldy #$8000+CODE_EXIT ; Patch one line per bank to enable interrupts
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ldy #$8000+CODE_EXIT ; Patch one line per bank to enable interrupts
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lda #{$004C+{ENABLE_INT}*256}
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sta [:target],y
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@ -438,7 +438,7 @@ BuildBank
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sta :target+2
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:BuildLine2
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lda #CODE_LEN ; round up to an even number of bytes
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lda #CODE_LEN ; round up to an even number of bytes
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inc
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and #$FFFE
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beq :nocopy
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@ -452,11 +452,11 @@ BuildBank
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dey
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bpl :loop
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:nocopy lda #0 ; copy is complete, now patch up the addresses
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:nocopy lda #0 ; copy is complete, now patch up the addresses
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sep #$20
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ldx #0
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lda :target+2 ; patch in the bank for the absolute long addressing mode
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lda :target+2 ; patch in the bank for the absolute long addressing mode
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:dobank ldy BankPatches,x
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sta [:target],y
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inx
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@ -465,7 +465,7 @@ BuildBank
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bcc :dobank
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ldx #0
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:dopage ldy PagePatches,x ; patch the page addresses by adding the page offset to each
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:dopage ldy PagePatches,x ; patch the page addresses by adding the page offset to each
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lda [:target],y
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clc
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adc :target+1
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@ -485,71 +485,71 @@ BuildBank
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;
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; The 'base' location is always assumed to be on a 4kb ($1000) boundary
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base
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entry_1 ldx #0000 ; Used for LDA 00,x addressing
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entry_2 ldy #0000 ; Used for LDA (00),y addressing
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entry_3 lda #0000 ; Sets screen address (right edge)
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entry_1 ldx #0000 ; Used for LDA 00,x addressing
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entry_2 ldy #0000 ; Used for LDA (00),y addressing
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entry_3 lda #0000 ; Sets screen address (right edge)
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tcs
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long_0
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entry_jmp jmp $0100
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dfb $00 ; if the screen is odd-aligned, then the opcode is set to
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; $AF to convert to a LDA long instruction. This puts the
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; first two bytes of the instruction field in the accumulator
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; and falls through to the next instruction.
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dfb $00 ; if the screen is odd-aligned, then the opcode is set to
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; $AF to convert to a LDA long instruction. This puts the
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; first two bytes of the instruction field in the accumulator
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; and falls through to the next instruction.
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; We structure the line so that the entry point only needs to
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; update the low-byte of the address, the means it takes only
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; an amortized 4-cycles per line to set the entry point break
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; We structure the line so that the entry point only needs to
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; update the low-byte of the address, the means it takes only
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; an amortized 4-cycles per line to set the entry point break
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right_odd bit #$000B ; Check the bottom nibble to quickly identify a PEA instruction
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beq r_is_pea ; This costs 6 cycles in the fast-path
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right_odd bit #$000B ; Check the bottom nibble to quickly identify a PEA instruction
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beq r_is_pea ; This costs 6 cycles in the fast-path
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bit #$0040 ; Check bit 6 to distinguish between JMP and all of the LDA variants
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bit #$0040 ; Check bit 6 to distinguish between JMP and all of the LDA variants
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bne r_is_jmp
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long_1 stal *+4-base ; Everything else is a two-byte LDA opcode + PHA
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long_1 stal *+4-base ; Everything else is a two-byte LDA opcode + PHA
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dfb $00,$00
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bra r_jmp_rtn
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r_is_pea xba ; fast code for PEA
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r_jmp_rtn sep #$20 ; shared return code path by all methods
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r_is_pea xba ; fast code for PEA
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r_jmp_rtn sep #$20 ; shared return code path by all methods
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pha
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rep #$20
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odd_entry jmp $0100 ; unconditionally jump into the "next" instruction in the
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; code field. This is OK, even if the entry point was the
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; last instruction, because there is a JMP at the end of
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; the code field, so the code will simply jump to that
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; instruction directly.
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;
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; As with the original entry point, because all of the
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; code field is page-aligned, only the low byte needs to
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; be updated when the scroll position changes
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odd_entry jmp $0100 ; unconditionally jump into the "next" instruction in the
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; code field. This is OK, even if the entry point was the
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; last instruction, because there is a JMP at the end of
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; the code field, so the code will simply jump to that
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; instruction directly.
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;
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; As with the original entry point, because all of the
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; code field is page-aligned, only the low byte needs to
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; be updated when the scroll position changes
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r_is_jmp sep #$41 ; Set the C and V flags which tells a snippet to push only the low byte
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r_is_jmp sep #$41 ; Set the C and V flags which tells a snippet to push only the low byte
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long_2 ldal entry_jmp+1-base
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long_3 stal *+5-base
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jmp $0000 ; Jumps into the exception code, which returns to r_jmp_rtn
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jmp $0000 ; Jumps into the exception code, which returns to r_jmp_rtn
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; The next labels are special, in that they are entry points into special subroutines. They are special
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; because they are within the first 256 bytes of each code field, which allows them to be selectable
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; by patching the low byte of the JMP instructions.
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; Return to caller -- the even_exit JMP from the previous line will jump here when a render is complete
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full_return jml blt_return ; Full exit
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full_return jml blt_return ; Full exit
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; Re-enable interrupts and continue -- the even_exit JMP from the previous line will jump here every
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; 8 or 16 lines in order to give the system some extra time to handle interrupts.
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enable_int ldal stk_save+1 ; restore the stack
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enable_int ldal stk_save+1 ; restore the stack
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tcs
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sep #$20 ; 8-bit mode
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ldal STATE_REG ; Read Bank 0 / Write Bank 0
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sep #$20 ; 8-bit mode
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ldal STATE_REG ; Read Bank 0 / Write Bank 0
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and #$CF
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stal STATE_REG
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cli
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nop ; Give a couple of cycles
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nop ; Give a couple of cycles
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sei
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ldal STATE_REG
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ora #$10 ; Read Bank 0 / Write Bank 1
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ora #$10 ; Read Bank 0 / Write Bank 1
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stal STATE_REG
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rep #$20
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bra entry_1
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@ -561,14 +561,14 @@ enable_int ldal stk_save+1 ; restore the stack
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; page-crossing penalty of the branch.
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ds 166
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loop_exit_1 jmp odd_exit-base ; +0 Alternate exit point depending on whether the left edge is
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loop_exit_2 jmp even_exit-base ; +3 odd-aligned
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loop_exit_1 jmp odd_exit-base ; +0 Alternate exit point depending on whether the left edge is
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loop_exit_2 jmp even_exit-base ; +3 odd-aligned
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loop lup 82 ; +6 Set up 82 PEA instructions, which is 328 pixels and consumes 246 bytes
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pea $0000 ; This is 41 8x8 tiles in width. Need to have N+1 tiles for screen overlap
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loop lup 82 ; +6 Set up 82 PEA instructions, which is 328 pixels and consumes 246 bytes
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pea $0000 ; This is 41 8x8 tiles in width. Need to have N+1 tiles for screen overlap
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--^
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loop_back jmp loop-base ; +252 Ensure execution continues to loop around
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loop_exit_3 jmp even_exit-base ; +255
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loop_back jmp loop-base ; +252 Ensure execution continues to loop around
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loop_exit_3 jmp even_exit-base ; +255
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long_5
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odd_exit ldal l_is_jmp+1-base
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@ -576,7 +576,7 @@ odd_exit ldal l_is_jmp+1-base
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bne :chk_jmp
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sep #$20
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long_6 ldal l_is_jmp+3-base ; get the high byte of the PEA operand
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long_6 ldal l_is_jmp+3-base ; get the high byte of the PEA operand
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; Fall-through when we have to push a byte on the left edge. Must be 8-bit on entry. Optimized
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; for the PEA $0000 case -- only 19 cycles to handle the edge, so pretty good
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@ -585,8 +585,8 @@ long_6 ldal l_is_jmp+3-base ; get the high byte of th
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rep #$20
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; JMP opcode = $4C, JML opcode = $5C
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even_exit jmp $1000 ; Jump to the next line.
|
||||
ds 1 ; space so that the last line in a bank can be patched into a JML
|
||||
even_exit jmp $1000 ; Jump to the next line.
|
||||
ds 1 ; space so that the last line in a bank can be patched into a JML
|
||||
|
||||
:chk_jmp
|
||||
bit #$0040
|
||||
|
@ -600,8 +600,8 @@ l_jmp_rtn xba
|
|||
rep #$20
|
||||
bra even_exit
|
||||
|
||||
l_is_jmp sec ; Set the C flag (V is always cleared at this point) which tells a snippet to push only the high byte
|
||||
odd_save dfb $00,$00,$00 ; The odd exit 3-byte sequence is always stashed here
|
||||
l_is_jmp sec ; Set the C flag (V is always cleared at this point) which tells a snippet to push only the high byte
|
||||
odd_save dfb $00,$00,$00 ; The odd exit 3-byte sequence is always stashed here
|
||||
|
||||
; Special epilogue: skip a number of bytes and jump back into the code field. This is useful for
|
||||
; large, floating panels in the attract mode of a game, or to overlay solid
|
||||
|
@ -611,8 +611,8 @@ epilogue_1 tsc
|
|||
sec
|
||||
sbc #0
|
||||
tcs
|
||||
jmp $0000 ; This jumps back into the code field
|
||||
:out jmp $0000 ; This jumps to the next epilogue chain element
|
||||
jmp $0000 ; This jumps back into the code field
|
||||
:out jmp $0000 ; This jumps to the next epilogue chain element
|
||||
ds 1
|
||||
|
||||
; These are the special code snippets -- there is a 1:1 relationship between each snippet space
|
||||
|
@ -667,21 +667,21 @@ epilogue_1 tsc
|
|||
; ...
|
||||
|
||||
|
||||
ds \,$00 ; pad to the next page boundary
|
||||
ds \,$00 ; pad to the next page boundary
|
||||
]index equ 0
|
||||
snippets lup 82
|
||||
ds 2 ; space for a 2-byte sequence; LDA (00),y LDA 00,x LDA 0,s
|
||||
and #$0000 ; the mask operand will be set when the tile is drawn
|
||||
ora #$0000 ; the data operand will be set when the tile is drawn
|
||||
ds 2 ; space for a 2-byte sequence; LDA (00),y LDA 00,x LDA 0,s
|
||||
and #$0000 ; the mask operand will be set when the tile is drawn
|
||||
ora #$0000 ; the data operand will be set when the tile is drawn
|
||||
bcs *+6
|
||||
pha
|
||||
brl loop+3+{3*]index} ; use relative branch for convenience
|
||||
bvs *+6 ; overflow set means this is the right edge (entry)
|
||||
clc ; carry is set only for edge operations; force clear
|
||||
brl loop+3+{3*]index} ; use relative branch for convenience
|
||||
bvs *+6 ; overflow set means this is the right edge (entry)
|
||||
clc ; carry is set only for edge operations; force clear
|
||||
brl l_jmp_rtn
|
||||
rep #$41 ; clear V and C
|
||||
brl r_jmp_rtn ; 25 bytes
|
||||
ds 7 ; padding
|
||||
rep #$41 ; clear V and C
|
||||
brl r_jmp_rtn ; 25 bytes
|
||||
ds 7 ; padding
|
||||
]index equ ]index+1
|
||||
--^
|
||||
top
|
||||
|
@ -693,3 +693,5 @@ top
|
|||
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
Loading…
Reference in New Issue