438 lines
11 KiB
ArmAsm
438 lines
11 KiB
ArmAsm
; Special routines for the dirty tile renderer that draws directly to the graphics screen
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; A = tile address
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; Y = screen address
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SpriteUnder0Dirty
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ConstTile0Dirty
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lda TileStore+TS_SCREEN_ADDR,x ; Get the on-screen address of this tile
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tax
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pei DP2_BANK01_AND_TILESTORE_BANKS
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plb
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]line equ 0
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lup 8
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stz: {]line*SHR_LINE_WIDTH}+0,x
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stz: {]line*SHR_LINE_WIDTH}+2,x
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]line equ ]line+1
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--^
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plb
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rts
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; Sprite over a zero tile
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OneSpriteDirtyOver0
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ldy TileStore+TS_SCREEN_ADDR,x
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tax
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pei DP2_BANK01_AND_TILESTORE_BANKS
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plb
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]line equ 0
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lup 8
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ldal spritedata+{]line*SPRITE_PLANE_SPAN}+0,x
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sta: {]line*SHR_LINE_WIDTH}+0,y
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ldal spritedata+{]line*SPRITE_PLANE_SPAN}+2,x
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sta: {]line*SHR_LINE_WIDTH}+2,y
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]line equ ]line+1
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--^
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plb
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rts
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; Multiple sprites (copied to direct page temp space)
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SpriteOver0Dirty
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ldy TileStore+TS_SCREEN_ADDR,x
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pei DP2_BANK01_AND_TILESTORE_BANKS
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plb
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]line equ 0
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lup 8
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lda tmp_sprite_data+{]line*4}+0
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sta: {]line*SHR_LINE_WIDTH}+0,y
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lda tmp_sprite_data+{]line*4}+2
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sta: {]line*SHR_LINE_WIDTH}+2,y
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]line equ ]line+1
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--^
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plb
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rts
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CopyTileADirty
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ldy TileStore+TS_SCREEN_ADDR,x ; Get the on-screen address of this tile
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lda TileStore+TS_TILE_ADDR,x ; load the address of this tile's data (pre-calculated)
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tax
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pei DP2_BANK01_AND_TILESTORE_BANKS
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plb
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]line equ 0
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lup 8
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ldal tiledata+{]line*4}+0,x
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sta: {]line*SHR_LINE_WIDTH}+0,y
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ldal tiledata+{]line*4}+2,x
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sta: {]line*SHR_LINE_WIDTH}+2,y
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]line equ ]line+1
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--^
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plb
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rts
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CopyTileVDirty
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ldy TileStore+TS_SCREEN_ADDR,x ; Get the on-screen address of this tile
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lda TileStore+TS_TILE_ADDR,x ; load the address of this tile's data (pre-calculated)
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tax
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pei DP2_BANK01_AND_TILESTORE_BANKS
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plb
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]src equ 7
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]dest equ 0
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lup 8
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ldal tiledata+{]src*4}+0,x
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sta: {]line*SHR_LINE_WIDTH}+0,y
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ldal tiledata+{]src*4}+2,x
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sta: {]line*SHR_LINE_WIDTH}+2,y
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]src equ ]src-1
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]dest equ ]dest+1
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--^
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plb
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rts
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; DirtySpriteLine srcLine,destLine,dpAddr,offset
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DirtySpriteOver mac
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lda: tiledata+{]1*TILE_DATA_SPAN}+]4,y
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andl spritemask+{]2*SPRITE_PLANE_SPAN}+]4,x
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oral spritedata+{]2*SPRITE_PLANE_SPAN}+]4,x
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sta ]3+]4
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<<<
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DirtySpriteUnder mac
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ldal spritedata+{]2*SPRITE_PLANE_SPAN}+]4,x
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and tiledata+{]1*TILE_DATA_SPAN}+32+]4,y
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ora tiledata+{]1*TILE_DATA_SPAN}+]4,y
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sta ]3+]4
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<<<
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; Special routine for a single sprite
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OneSpriteDirtyOverA
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ldy TileStore+TS_TILE_ADDR,x
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lda TileStore+TS_SCREEN_ADDR,x
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ldx sprite_ptr0
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phd
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pei DP2_TILEDATA_AND_TILESTORE_BANKS
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plb
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sei
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clc
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tcd
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_R0W1
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DirtySpriteOver 0;0;$00;0
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DirtySpriteOver 0;0;$00;2
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DirtySpriteOver 1;1;$A0;0
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DirtySpriteOver 1;1;$A0;2
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tdc
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adc #320
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tcd
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DirtySpriteOver 2;2;$00;0
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DirtySpriteOver 2;2;$00;2
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DirtySpriteOver 3;3;$A0;0
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DirtySpriteOver 3;3;$A0;2
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tdc
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adc #320
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tcd
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DirtySpriteOver 4;4;$00;0
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DirtySpriteOver 4;4;$00;2
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DirtySpriteOver 5;5;$A0;0
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DirtySpriteOver 5;5;$A0;2
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tdc
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adc #320
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tcd
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DirtySpriteOver 6;6;$00;0
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DirtySpriteOver 6;6;$00;2
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DirtySpriteOver 7;7;$A0;0
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DirtySpriteOver 7;7;$A0;2
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_R0W0
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cli
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plb
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pld
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rts
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OneSpriteDirtyUnderA
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ldy TileStore+TS_TILE_ADDR,x
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lda TileStore+TS_SCREEN_ADDR,x
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ldx sprite_ptr0
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phd
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pei DP2_TILEDATA_AND_TILESTORE_BANKS
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plb
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sei
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clc
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tcd
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_R0W1
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DirtySpriteUnder 0;0;$00;0
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DirtySpriteUnder 0;0;$00;2
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DirtySpriteUnder 1;1;$A0;0
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DirtySpriteUnder 1;1;$A0;2
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tdc
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adc #320
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tcd
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DirtySpriteUnder 2;2;$00;0
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DirtySpriteUnder 2;2;$00;2
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DirtySpriteUnder 3;3;$A0;0
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DirtySpriteUnder 3;3;$A0;2
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tdc
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adc #320
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tcd
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DirtySpriteUnder 4;4;$00;0
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DirtySpriteUnder 4;4;$00;2
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DirtySpriteUnder 5;5;$A0;0
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DirtySpriteUnder 5;5;$A0;2
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tdc
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adc #320
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tcd
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DirtySpriteUnder 6;6;$00;0
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DirtySpriteUnder 6;6;$00;2
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DirtySpriteUnder 7;7;$A0;0
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DirtySpriteUnder 7;7;$A0;2
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_R0W0
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cli
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plb
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pld
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rts
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OneSpriteDirtyOverV
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ldy TileStore+TS_TILE_ADDR,x
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lda TileStore+TS_SCREEN_ADDR,x
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ldx sprite_ptr0
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phd
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pei DP2_TILEDATA_AND_TILESTORE_BANKS
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plb
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sei
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clc
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tcd
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_R0W1
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DirtySpriteOver 7;0;$00;0
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DirtySpriteOver 7;0;$00;2
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DirtySpriteOver 6;1;$A0;0
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DirtySpriteOver 6;1;$A0;2
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tdc
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adc #320
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tcd
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DirtySpriteOver 5;2;$00;0
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DirtySpriteOver 5;2;$00;2
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DirtySpriteOver 4;3;$A0;0
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DirtySpriteOver 4;3;$A0;2
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tdc
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adc #320
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tcd
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DirtySpriteOver 3;4;$00;0
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DirtySpriteOver 3;4;$00;2
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DirtySpriteOver 2;5;$A0;0
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DirtySpriteOver 2;5;$A0;2
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tdc
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adc #320
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tcd
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DirtySpriteOver 1;6;$00;0
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DirtySpriteOver 1;6;$00;2
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DirtySpriteOver 0;7;$A0;0
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DirtySpriteOver 0;7;$A0;2
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_R0W0
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cli
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plb
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pld
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rts
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OneSpriteDirtyUnderV
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ldy TileStore+TS_TILE_ADDR,x
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lda TileStore+TS_SCREEN_ADDR,x
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ldx sprite_ptr0
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phd
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pei DP2_TILEDATA_AND_TILESTORE_BANKS
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plb
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sei
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clc
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tcd
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_R0W1
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DirtySpriteUnder 7;0;$00;0
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DirtySpriteUnder 7;0;$00;2
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DirtySpriteUnder 6;1;$A0;0
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DirtySpriteUnder 6;1;$A0;2
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tdc
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adc #320
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tcd
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DirtySpriteUnder 5;2;$00;0
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DirtySpriteUnder 5;2;$00;2
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DirtySpriteUnder 4;3;$A0;0
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DirtySpriteUnder 4;3;$A0;2
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tdc
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adc #320
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tcd
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DirtySpriteUnder 3;4;$00;0
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DirtySpriteUnder 3;4;$00;2
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DirtySpriteUnder 2;5;$A0;0
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DirtySpriteUnder 2;5;$A0;2
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tdc
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adc #320
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tcd
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DirtySpriteUnder 1;6;$00;0
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DirtySpriteUnder 1;6;$00;2
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DirtySpriteUnder 0;7;$A0;0
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DirtySpriteUnder 0;7;$A0;2
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_R0W0
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cli
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plb
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pld
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rts
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; Generic routine for multiple sprites -- expect sprites to be in tmp_sprite_data and tmp_sprite_mask
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SpriteOverADirty
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ldy TileStore+TS_SCREEN_ADDR,x
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lda TileStore+TS_TILE_ADDR,x
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tax
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pei DP2_BANK01_AND_TILESTORE_BANKS
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plb
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]line equ 0
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lup 8
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ldal tiledata+{]line*TILE_DATA_SPAN}+0,x
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and tmp_sprite_mask+{]line*4}+0
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ora tmp_sprite_data+{]line*4}+0
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sta: {]line*SHR_LINE_WIDTH}+0,y
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; brk $00
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ldal tiledata+{]line*TILE_DATA_SPAN}+2,x
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and tmp_sprite_mask+{]line*4}+2
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ora tmp_sprite_data+{]line*4}+2
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sta: {]line*SHR_LINE_WIDTH}+2,y
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]line equ ]line+1
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--^
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plb
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rts
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SpriteUnderADirty
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ldy TileStore+TS_SCREEN_ADDR,x
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lda TileStore+TS_TILE_ADDR,x
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tax
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pei DP2_BANK01_AND_TILESTORE_BANKS
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plb
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]line equ 0
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lup 8
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lda tmp_sprite_data+{]line*4}+0
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andl tiledata+{]line*TILE_DATA_SPAN}+32,x
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oral tiledata+{]line*TILE_DATA_SPAN}+0,x
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sta: {]line*SHR_LINE_WIDTH}+0,y
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lda tmp_sprite_data+{]line*4}+2
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andl tiledata+{]line*TILE_DATA_SPAN}+32+2,x
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oral tiledata+{]line*TILE_DATA_SPAN}+2,x
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sta: {]line*SHR_LINE_WIDTH}+2,y
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]line equ ]line+1
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--^
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plb
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rts
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SpriteOverVDirty
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ldy TileStore+TS_SCREEN_ADDR,x
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lda TileStore+TS_TILE_ADDR,x
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tax
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pei DP2_BANK01_AND_TILESTORE_BANKS
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plb
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]src equ 7
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]dest equ 0
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lup 8
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ldal tiledata+{]src*TILE_DATA_SPAN}+0,x
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and tmp_sprite_mask+{]dest*4}+0
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ora tmp_sprite_data+{]dest*4}+0
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sta: {]dest*SHR_LINE_WIDTH}+0,y
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ldal tiledata+{]src*TILE_DATA_SPAN}+2,x
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and tmp_sprite_mask+{]dest*4}+2
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ora tmp_sprite_data+{]dest*4}+2
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sta: {]dest*SHR_LINE_WIDTH}+2,y
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]src equ ]src-1
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]dest equ ]dest+1
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--^
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plb
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rts
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SpriteUnderVDirty
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ldy TileStore+TS_SCREEN_ADDR,x
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lda TileStore+TS_TILE_ADDR,x
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tax
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pei DP2_BANK01_AND_TILESTORE_BANKS
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plb
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]src equ 7
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]dest equ 0
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lup 8
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lda tmp_sprite_data+{]dest*4}+0
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andl tiledata+{]src*TILE_DATA_SPAN}+32,x
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oral tiledata+{]src*TILE_DATA_SPAN}+0,x
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sta: {]dest*SHR_LINE_WIDTH}+0,y
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lda tmp_sprite_data+{]dest*4}+2
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andl tiledata+{]src*TILE_DATA_SPAN}+32+2,x
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oral tiledata+{]src*TILE_DATA_SPAN}+2,x
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sta: {]dest*SHR_LINE_WIDTH}+2,y
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]src equ ]src-1
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]dest equ ]dest+1
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--^
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plb
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rts |