581 lines
26 KiB
ArmAsm
581 lines
26 KiB
ArmAsm
; Collection of functions that deal with tiles. Primarily rendering tile data into
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; the code fields.
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;
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; Tile data can be done faily often, so these routines are performance-sensitive.
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;
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; CopyTileConst -- the first 16 tile numbers are reserved and can be used
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; to draw a solid tile block
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; CopyTileLinear -- copies the tile data from the tile bank in linear order, e.g.
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; 32 consecutive bytes are copied
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; _RenderTile
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;
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; A high-level function that takes a 16-bit tile descriptor and dispatched to the
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; appropriate tile copy routine based on the descriptor flags
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;
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; Bit 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
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; +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
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; |xx|xx|FF|MM|DD|VV|HH| | | | | | | | | |
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; +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
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; \____/ | | | | | \________________________/
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; | | | | | | Tile ID (0 to 511)
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; | | | | | |
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; | | | | | +-- H : Flip tile horizontally
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; | | | | +----- V : Flip tile vertically
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; | | | +-------- D : Render as a Dynamic Tile (Tile ID < 32, V and H have no effect)
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; | | +----------- M : Apply tile mask
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; | +-------------- F : Overlay a fringe tile
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; +------------------- Reserved (must be zero)
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;
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; Each logical tile (corresponding to each Tile ID) actually takes up 128 bytes of memory in the
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; tile bank
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;
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; +0 : 32 bytes of tile data
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; +32 : 32 bytes of tile mask
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; +64 : 32 bytes of horizontally flipped tile data
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; +96 : 32 bytes of horizontally flipped tile mask
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;
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; It is simply too slow to try to horizontally reverse the pixel data on the fly. This still allows
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; for up to 512 tiles to be stored in a single bank, which should be sufficient.
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;
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; Given an address to a Tile Store record, dispatch to the appropriate tile renderer. The Tile
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; Store record contains all of the low-level information that's needed to call the renderer.
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;
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; There are two execution paths that are handled here. First, if there is no sprite, then
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; the tile data is read directly and written into the code field in a single pass. If there
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; are sprites that overlap the tile, then the sprite data is combined with the tile data
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; and written to a temporary direct page buffer. If
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;
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; This routine sets the direct page register to the second page since we use that space to
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; build and cache tile and sprite data, when necessary
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_RenderTile2
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lda TileStore+TS_SPRITE_FLAG,x ; This is a bitfield of all the sprites that intersect this tile, only care if non-zero or not
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bne do_dirty_sprite
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; Handle the non-sprite tile blit
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CopyNoSprites
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sep #$20
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lda TileStore+TS_CODE_ADDR_HIGH,x ; load the bank of the target code field line
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pha ; and put on the stack for later
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; lda TileStore+TS_BASE_ADDR+1,x ; load the base address of the code field ($0000 or $8000)
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; sta _BASE_ADDR+1 ; so we can get by just copying the high byte
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rep #$20
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lda TileStore+TS_BASE_TILE_DISP,x ; Get the address of the renderer for this tile
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stal :tiledisp+1
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lda TileStore+TS_TILE_ID,x
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sta _TILE_ID ; Some tile blitters need to get the tile descriptor
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ldy TileStore+TS_CODE_ADDR_LOW,x ; load the address of the code field
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lda TileStore+TS_TILE_ADDR,x ; load the address of this tile's data (pre-calculated)
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pha
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lda TileStore+TS_WORD_OFFSET,x
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plx
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plb ; set the bank to the code field that will be updated
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; B is set to the correct code field bank
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; A is set to the tile word offset (0 through 80 in steps of 4)
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; Y is set to the top-left address of the tile in the code field
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; X is set to the address of the tile data
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:tiledisp jmp $0000 ; render the tile
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; The sprite code is just responsible for quickly copying all of the sprite data
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; into the direct page temp area.
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do_dirty_sprite
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pei TileStoreBankAndTileDataBank ; Special value that has the TileStore bank in LSB and TileData bank in MSB
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plb
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; Cache a couple of values into the direct page that are used across all copy routines
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lda TileStore+TS_TILE_ADDR,y ; load the address of this tile's data (pre-calculated)
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sta tileAddr
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ldx TileStore+TS_VBUFF_ADDR_COUNT,y
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jmp (dirty_sprite_dispatch,x)
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dirty_sprite_dispatch
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da CopyNoSprites
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da CopyOneSprite
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da CopyTwoSprites
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da CopyThreeSprites
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da CopyFourSprites ; MAX, don't bother with more than 4 sprites per tile
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; We can optimize later, for now just copy the sprite data and mask into its own
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; direct page buffer and combine with the tile data later
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;
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; We set up direct page pointers to the mask bank and use the bank register for the
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; data.
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CopyFourSprites
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lda TileStore+TS_VBUFF_ADDR_0,y
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sta spriteIdx
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lda TileStore+TS_VBUFF_ADDR_1,y
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sta spriteIdx+4
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lda TileStore+TS_VBUFF_ADDR_2,y
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sta spriteIdx+8
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lda TileStore+TS_VBUFF_ADDR_3,y
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sta spriteIdx+12
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; Copy three sprites into a temporary direct page buffer
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LDA_IL equ $A7 ; lda [dp]
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LDA_ILY equ $B7 ; lda [dp],y
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AND_IL equ $27 ; and [dp]
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AND_ILY equ $37 ; and [dp],y
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CopyThreeSprites
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lda TileStore+TS_VBUFF_ADDR_0,y
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sta spriteIdx
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lda TileStore+TS_VBUFF_ADDR_1,y
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sta spriteIdx+4
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lda TileStore+TS_VBUFF_ADDR_2,y
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sta spriteIdx+8
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]line equ 0
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lup 8
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ldy #]line*SPRITE_PLANE_SPAN
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lda (spriteIdx+8),y
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db AND_ILY,spriteIdx+4 ; Can't use long indirect inside LUP because of ']'
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ora (spriteIdx+4),y
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db AND_ILY,spriteIdx+0
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ora (spriteIdx+0),y
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sta tmp_sprite_data+{]line*4}
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db LDA_ILY,spriteIdx+8
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db AND_ILY,spriteIdx+4
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db AND_ILY,spriteIdx+0
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sta tmp_sprite_mask+{]line*4}
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ldy #]line*SPRITE_PLANE_SPAN+2
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lda (spriteIdx+8),y
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db AND_ILY,spriteIdx+4
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ora (spriteIdx+4),y
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db AND_ILY,spriteIdx+0
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ora (spriteIdx+0),y
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sta tmp_sprite_data+{]line*4}+2
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db LDA_ILY,spriteIdx+8
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db AND_ILY,spriteIdx+4
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db AND_ILY,spriteIdx+0
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sta tmp_sprite_mask+{]line*4}+2
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]line equ ]line+1
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--^
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; jmp FinishTile
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; Copy two sprites into a temporary direct page buffer
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CopyTwoSprites
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lda TileStore+TS_VBUFF_ADDR_0,y
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sta spriteIdx
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lda TileStore+TS_VBUFF_ADDR_1,y
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sta spriteIdx+4
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]line equ 0
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lup 8
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ldy #]line*SPRITE_PLANE_SPAN
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lda (spriteIdx+4),y
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db AND_ILY,spriteIdx+0
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ora (spriteIdx+0),y
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sta tmp_sprite_data+{]line*4}
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db LDA_ILY,spriteIdx+4
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db AND_ILY,spriteIdx+0
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sta tmp_sprite_mask+{]line*4}
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ldy #]line*SPRITE_PLANE_SPAN+2
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lda (spriteIdx+4),y
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db AND_ILY,spriteIdx+0
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ora (spriteIdx+0),y
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sta tmp_sprite_data+{]line*4}+2
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db LDA_ILY,spriteIdx+4
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db AND_ILY,spriteIdx+0
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sta tmp_sprite_mask+{]line*4}+2
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]line equ ]line+1
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--^
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; jmp FinishTile
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CopyOneSprite
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clc
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lda TileStore+TS_VBUFF_ADDR_0,y
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sta spriteIdx
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adc #2
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sta spriteIdx+4
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]line equ 0
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lup 8
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; ldal tiledata,x
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; and [spriteIdx]
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; ora (spriteIdx)
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; sta tmp_sprite_data+{]line*4}
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ldal spritedata+{]line*SPRITE_PLANE_SPAN},x
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sta tmp_sprite_data+{]line*4}
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ldal spritedata+{]line*SPRITE_PLANE_SPAN}+2,x
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sta tmp_sprite_data+{]line*4}+2
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ldal spritemask+{]line*SPRITE_PLANE_SPAN},x
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sta tmp_sprite_mask+{]line*4}
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ldal spritemask+{]line*SPRITE_PLANE_SPAN}+2,x
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sta tmp_sprite_mask+{]line*4}+2
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]line equ ]line+1
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--^
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; jmp FinishTile
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; Reference all of the tile rendering subroutines defined in the TileXXXXX files. Each file defines
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; 8 entry points:
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;
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; One set for normal, horizontally flipped, vertically flipped and hors & vert flipped.
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; A second set that are optimized for when EngineMode has BG1 disabled.
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TileProcs dw _TBSolidTile_00,_TBSolidTile_0H,_TBSolidTile_V0,_TBSolidTile_VH ; 00000 : normal tiles
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dw _TBDynamicTile_00,_TBDynamicTile_00,_TBDynamicTile_00,_TBDynamicTile_00 ; 00001 : dynamic tiles
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dw _TBMaskedTile_00,_TBMaskedTile_0H,_TBMaskedTile_V0,_TBMaskedTile_VH ; 00010 : masked normal tiles
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dw _TBDynamicMaskTile_00,_TBDynamicMaskTile_00 ; 00011 : masked dynamic tiles
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dw _TBDynamicMaskTile_00,_TBDynamicMaskTile_00
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; Fringe tiles not supported yet, so just repeat the block from above
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dw _TBSolidTile_00,_TBSolidTile_0H,_TBSolidTile_V0,_TBSolidTile_VH ; 00100 : fringed normal tiles
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dw _TBDynamicTile_00,_TBDynamicTile_00,_TBDynamicTile_00,_TBDynamicTile_00 ; 00101 : fringed dynamic tiles
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dw _TBMaskedTile_00,_TBMaskedTile_0H,_TBMaskedTile_V0,_TBMaskedTile_VH ; 00110 : fringed masked normal tiles
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dw _TBDynamicMaskTile_00,_TBDynamicMaskTile_00 ; 00111 : fringed masked dynamic tiles
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dw _TBDynamicMaskTile_00,_TBDynamicMaskTile_00
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; High-priority tiles without a sprite in front of them are just normal tiles. Repeat the top half
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dw _TBSolidTile_00,_TBSolidTile_0H,_TBSolidTile_V0,_TBSolidTile_VH ; 01000 : high-priority normal tiles
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dw _TBDynamicTile_00,_TBDynamicTile_00,_TBDynamicTile_00,_TBDynamicTile_00 ; 01001 : high-priority dynamic tiles
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dw _TBMaskedTile_00,_TBMaskedTile_0H,_TBMaskedTile_V0,_TBMaskedTile_VH ; 01010 : high-priority masked normal tiles
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dw _TBDynamicMaskTile_00,_TBDynamicMaskTile_00 ; 01011 : high-priority masked dynamic tiles
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dw _TBDynamicMaskTile_00,_TBDynamicMaskTile_00
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dw _TBSolidTile_00,_TBSolidTile_0H,_TBSolidTile_V0,_TBSolidTile_VH ; 01100 : high-priority fringed normal tiles
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dw _TBDynamicTile_00,_TBDynamicTile_00,_TBDynamicTile_00,_TBDynamicTile_00 ; 01101 : high-priority fringed dynamic tiles
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dw _TBMaskedTile_00,_TBMaskedTile_0H,_TBMaskedTile_V0,_TBMaskedTile_VH ; 01110 : high-priority fringed masked normal tiles
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dw _TBDynamicMaskTile_00,_TBDynamicMaskTile_00 ; 01111 : high-priority fringed masked dynamic tiles
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dw _TBDynamicMaskTile_00,_TBDynamicMaskTile_00
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; Here are all the sprite variants of the tiles
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dw _TBSolidSpriteTile_00,_TBSolidSpriteTile_0H
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dw _TBSolidSpriteTile_V0,_TBSolidSpriteTile_VH ; 10000 : normal tiles w/sprite
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dw _TBDynamicSpriteTile_00,_TBDynamicSpriteTile_00
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dw _TBDynamicSpriteTile_00,_TBDynamicSpriteTile_00 ; 10001 : dynamic tiles w/sprite
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dw _TBMaskedSpriteTile_00,_TBMaskedSpriteTile_0H
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dw _TBMaskedSpriteTile_V0,_TBMaskedSpriteTile_VH ; 10010 : masked normal tiles w/sprite
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dw _TBDynamicMaskedSpriteTile_00,_TBDynamicMaskedSpriteTile_00
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dw _TBDynamicMaskedSpriteTile_00,_TBDynamicMaskedSpriteTile_00 ; 10011 : masked dynamic tiles w/sprite
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dw _TBSolidTile_00,_TBSolidTile_0H,_TBSolidTile_V0,_TBSolidTile_VH ; 10100 : fringed normal tiles w/sprite
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dw _TBSolidTile_00,_TBSolidTile_0H,_TBSolidTile_V0,_TBSolidTile_VH ; 10101 : fringed dynamic tiles w/sprite
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dw _TBSolidTile_00,_TBSolidTile_0H,_TBSolidTile_V0,_TBSolidTile_VH ; 10110 : fringed masked normal tiles w/sprite
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dw _TBSolidTile_00,_TBSolidTile_0H,_TBSolidTile_V0,_TBSolidTile_VH ; 10111 : fringed masked dynamic tiles w/sprite
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dw _TBSolidPrioritySpriteTile_00,_TBSolidPrioritySpriteTile_0H,
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dw _TBSolidPrioritySpriteTile_V0,_TBSolidPrioritySpriteTile_VH ; 11000 : high-priority normal tiles w/sprite
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dw _TBDynamicPrioritySpriteTile_00,_TBDynamicPrioritySpriteTile_00
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dw _TBDynamicPrioritySpriteTile_00,_TBDynamicPrioritySpriteTile_00 ; 11001 : high-priority dynamic tiles w/sprite
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dw _TBMaskedPrioritySpriteTile_00,_TBMaskedPrioritySpriteTile_0H
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dw _TBMaskedPrioritySpriteTile_V0,_TBMaskedPrioritySpriteTile_VH ; 11010 : high-priority masked normal tiles w/sprite
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dw _TBDynamicMaskedPrioritySpriteTile_00,_TBDynamicMaskedPrioritySpriteTile_00
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dw _TBDynamicMaskedPrioritySpriteTile_00,_TBDynamicMaskedPrioritySpriteTile_00 ; 11011 : high-priority masked dynamic tiles w/sprite
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dw _TBSolidTile_00,_TBSolidTile_0H,_TBSolidTile_V0,_TBSolidTile_VH ; 11100 : high-priority fringed normal tiles w/sprite
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dw _TBSolidTile_00,_TBSolidTile_0H,_TBSolidTile_V0,_TBSolidTile_VH ; 11101 : high-priority fringed dynamic tiles w/sprite
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dw _TBSolidTile_00,_TBSolidTile_0H,_TBSolidTile_V0,_TBSolidTile_VH ; 11110 : high-priority fringed masked normal tiles w/sprite
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dw _TBSolidTile_00,_TBSolidTile_0H,_TBSolidTile_V0,_TBSolidTile_VH ; 11111 : high-priority fringed masked dynamic tiles w/sprite
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; _TBConstTile
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;
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; A specialized routine that fills in a tile with a single constant value. It's intended to be used to
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; fill in solid colors, so there are no specialized horizontal or verical flipped variants
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_TBConstTile
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sta: $0001,y
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sta: $0004,y
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sta $1001,y
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sta $1004,y
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sta $2001,y
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sta $2004,y
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sta $3001,y
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sta $3004,y
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sta $4001,y
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sta $4004,y
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sta $5001,y
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sta $5004,y
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sta $6001,y
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sta $6004,y
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sta $7001,y
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sta $7004,y
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jmp _TBFillPEAOpcode
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ClearTile
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and #$00FF
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ora #$4800
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sta: $0004,y
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sta $1004,y
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sta $2004,y
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sta $3004,y
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sta $4004,y
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sta $5004,y
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sta $6004,y
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sta $7004,y
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inc
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inc
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sta: $0001,y
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sta $1001,y
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sta $2001,y
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sta $3001,y
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sta $4001,y
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sta $5001,y
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sta $6001,y
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sta $7001,y
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sep #$20
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lda #$B1 ; This is a special case where we can set all the words to LDA (DP),y
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sta: $0000,y
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sta: $0003,y
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sta $1000,y
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sta $1003,y
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sta $2000,y
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sta $2003,y
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sta $3000,y
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sta $3003,y
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sta $4000,y
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sta $4003,y
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sta $5000,y
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sta $5003,y
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sta $6000,y
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sta $6003,y
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sta $7000,y
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sta $7003,y
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rep #$20
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rts
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; CopyBG0Tile
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;
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; A low-level function that copies 8x8 tiles directly into the code field space.
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;
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; A = Tile ID (0 - 511)
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; X = Tile column (0 - 40)
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; Y = Tile row (0 - 25)
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_CopyBG0Tile
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phb ; save the current bank
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phx ; save the original x-value
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pha ; save the tile ID
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tya ; lookup the address of the virtual line (y * 8)
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asl
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asl
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asl
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asl ; x2 because the table contains words, not
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tay
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sep #$20 ; set the bank register
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lda BTableHigh,y
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pha ; save for a few instruction
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rep #$20
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txa
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asl ; there are two columns per tile, so multiple by 4
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asl ; asl will clear the carry bit
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tax
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lda BTableLow,y
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sta _BASE_ADDR ; Used in masked tile renderer
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clc
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adc Col2CodeOffset+2,x ; Get the right edge (which is the lower physical address)
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tay
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plb ; set the bank
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pla ; pop the tile ID
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; jsr _RenderTile
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:exit
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plx ; pop the x-register
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plb ; restore the data bank and return
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rts
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; CopyBG1Tile
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;
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; A low-level function that copies 8x8 tiles directly into the BG1 data buffer.
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;
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; A = Tile ID (0 - 511)
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; X = Tile column (0 - 40)
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; Y = Tile row (0 - 25)
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_CopyBG1Tile
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phb ; save the current bank
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phx ; save the original x-value
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pha ; save the tile ID
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tya ; lookup the address of the virtual line (y * 8)
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asl
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asl
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asl
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asl
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tay
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txa
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asl
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asl ; 4 bytes per tile column
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clc
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adc BG1YTable,y
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tay
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sep #$20
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lda BG1DataBank
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pha
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plb ; set the bank
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rep #$20
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pla ; pop the tile ID
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jsr _RenderTileBG1
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plx ; pop the x-register
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plb ; restore the data bank and return
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rts
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; Tile Store that holds tile records which contain all the essential information for rendering
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; a tile.
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;
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; TileStore+TS_TILE_ID : Tile descriptor
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; TileStore+TS_DIRTY : $0000 is clean, any other value indicated a dirty tile
|
|
; TileStore+TS_TILE_ADDR : Address of the tile in the tile data buffer
|
|
; TileStore+TS_CODE_ADDR_LOW : Low word of the address in the code field that receives the tile
|
|
; TileStore+TS_CODE_ADDR_HIGH : High word of the address in the code field that receives the tile
|
|
; TileStore+TS_WORD_OFFSET : Logical number of word for this location
|
|
; TileStore+TS_BASE_ADDR : Copy of BTableAddrLow
|
|
; TileStore+TS_SCREEN_ADDR : Address on the physical screen corresponding to this tile (for direct rendering)
|
|
; TileStore+TS_SPRITE_FLAG : A bit field of all sprites that intersect this tile
|
|
; TileStore+TS_SPRITE_ADDR_1 ; Address of the sprite data that aligns with this tile. These
|
|
; TileStore+TS_SPRITE_ADDR_2 ; values are 1:1 with the TS_SPRITE_FLAG bits and are not contiguous.
|
|
; TileStore+TS_SPRITE_ADDR_3 ; If the bit position in TS_SPRITE_FLAG is not set, then the value in
|
|
; TileStore+TS_SPRITE_ADDR_4 ; the TS_SPRITE_ADDR_* field is undefined.
|
|
; TileStore+TS_SPRITE_ADDR_5
|
|
; TileStore+TS_SPRITE_ADDR_6
|
|
; TileStore+TS_SPRITE_ADDR_7
|
|
; TileStore+TS_SPRITE_ADDR_8
|
|
; TileStore+TS_SPRITE_ADDR_9
|
|
; TileStore+TS_SPRITE_ADDR_10
|
|
; TileStore+TS_SPRITE_ADDR_11
|
|
; TileStore+TS_SPRITE_ADDR_12
|
|
; TileStore+TS_SPRITE_ADDR_13
|
|
; TileStore+TS_SPRITE_ADDR_14
|
|
; TileStore+TS_SPRITE_ADDR_15
|
|
; TileStore+TS_SPRITE_ADDR_16
|
|
|
|
; To make processing the tile faster, we do them in chunks of eight. This allows the loop to be
|
|
; unrolled, which means we don't have to keep track of the register value and makes it faster to
|
|
; clear the dirty tile flag after being processed.
|
|
; _ApplyTilesUnrolled
|
|
tdc ; Move to the dedicated direct page for tile rendering
|
|
clc
|
|
adc #$100
|
|
tcd
|
|
|
|
phb ; Save the current bank
|
|
tsc
|
|
sta tmp0 ; Save it on the direct page
|
|
bra at_loop
|
|
|
|
; The DirtyTiles array and the TileStore information is in the Tile Store bank. Because we
|
|
; process up to 8 tiles as a time and the tile code sets the bank register to the target
|
|
; code field bank, we need to restore the bank register each time. So, we pre-push
|
|
; 8 copies of the TileStore bank onto the stack.
|
|
|
|
|
|
at_exit
|
|
tdc ; Move back to the original direct page
|
|
sec
|
|
sbc #$100
|
|
tcd
|
|
|
|
plb ; Restore the original data bank and return
|
|
rts
|
|
dt_base equ $FE ; top of second direct page space
|
|
|
|
at_loop
|
|
lda tmp0
|
|
tcs
|
|
|
|
lda DirtyTileCount ; This is pre-multiplied by 2
|
|
beq at_exit ; If there are no items, exit
|
|
|
|
ldx TileStoreBankDoubled
|
|
phx
|
|
phx
|
|
phx
|
|
|
|
cmp #16 ; If there are >= 8 elements, then
|
|
bcs at_chunk ; do a full chunk
|
|
|
|
stz DirtyTileCount ; Otherwise, this pass will handle them all
|
|
tax
|
|
jmp (at_table,x)
|
|
at_table da at_exit,at_one,at_two,at_three
|
|
da at_four,at_five,at_six,at_seven
|
|
|
|
at_chunk sec
|
|
sbc #16
|
|
sta DirtyTileCount ; Fall through
|
|
|
|
; Because all of the registers get used in the _RenderTile2 subroutine, we
|
|
; push the values from the DirtyTiles array onto the stack and then pop off
|
|
; the values as we go
|
|
|
|
ldy dt_base ; Reload the base index
|
|
ldx DirtyTiles+14,y ; Load the TileStore offset
|
|
stz TileStore+TS_DIRTY,x ; Clear this tile's dirty flag
|
|
jsr _RenderTile2 ; Draw the tile
|
|
plb ; Reset the data bank to the TileStore bank
|
|
|
|
at_seven
|
|
ldy dt_base
|
|
ldx DirtyTiles+12,y
|
|
stz TileStore+TS_DIRTY,x
|
|
jsr _RenderTile2
|
|
plb
|
|
|
|
at_six
|
|
ldy dt_base
|
|
ldx DirtyTiles+10,y
|
|
stz TileStore+TS_DIRTY,x
|
|
jsr _RenderTile2
|
|
plb
|
|
|
|
at_five
|
|
ldy dt_base
|
|
ldx DirtyTiles+8,y
|
|
stz TileStore+TS_DIRTY,x
|
|
jsr _RenderTile2
|
|
plb
|
|
|
|
at_four
|
|
ldy dt_base
|
|
ldx DirtyTiles+6,y
|
|
stz TileStore+TS_DIRTY,x
|
|
jsr _RenderTile2
|
|
plb
|
|
|
|
at_three
|
|
ldy dt_base
|
|
ldx DirtyTiles+4,y
|
|
jsr _RenderTile2
|
|
plb
|
|
|
|
at_two
|
|
ldy dt_base
|
|
ldx DirtyTiles+2,y
|
|
stz TileStore+TS_DIRTY,x
|
|
jsr _RenderTile2
|
|
plb
|
|
|
|
at_one
|
|
ldy dt_base
|
|
ldx DirtyTiles+0,y
|
|
stz TileStore+TS_DIRTY,x
|
|
jsr _RenderTile2
|
|
plb
|
|
|
|
jmp at_loop
|