50 lines
2.3 KiB
ArmAsm
50 lines
2.3 KiB
ArmAsm
; _TBSolidPrioritySpriteTile
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;
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; When the sprite is composited with the tile data, the tile mask is used to place the tile data on top of
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; any sprite data
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_TBSolidPrioritySpriteTile_00
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_TBSolidPrioritySpriteTile_0H
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jsr _TBCopyTileDataToCBuff ; Copy the tile data into the compositing buffer (using correct x-register)
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jsr _TBCopyTileMaskToCBuff ; Copy the tile mask into the compositing buffer (using correct x-register)
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jsr _TBApplyPrioritySpriteData ; Underlay the data fromthe sprite plane (and copy into the code field)
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jmp _TBFillPEAOpcode ; Fill in the code field opcodes
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;_TBSolidPrioritySpriteTile_0H
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; jsr _TBCopyTileDataToCBuffH
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; jsr _TBCopyTileMaskToCBuffH
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; jsr _TBApplyPrioritySpriteData
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; jmp _TBFillPEAOpcode
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_TBSolidPrioritySpriteTile_V0
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_TBSolidPrioritySpriteTile_VH
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jsr _TBCopyTileDataToCBuffV
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jsr _TBCopyTileMaskToCBuffV
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jsr _TBApplyPrioritySpriteData
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jmp _TBFillPEAOpcode
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;_TBSolidPrioritySpriteTile_VH
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; jsr _TBCopyTileDataToCBuffVH
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; jsr _TBCopyTileMaskToCBuffVH
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; jsr _TBApplyPrioritySpriteData
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; jmp _TBFillPEAOpcode
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; Need to update the X-register before calling this
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_TBApplyPrioritySpriteData
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ldx _SPR_X_REG ; set to the unaligned tile block address in the sprite plane
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]line equ 0
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lup 8
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ldal spritedata+{]line*SPRITE_PLANE_SPAN},x
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and blttmp+{]line*4}+32
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ora blttmp+{]line*4}
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sta: $0004+{]line*$1000},y
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ldal spritedata+{]line*SPRITE_PLANE_SPAN}+2,x
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and blttmp+{]line*4}+32+2
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ora blttmp+{]line*4}+2
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sta: $0001+{]line*$1000},y
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]line equ ]line+1
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--^
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ldx _X_REG ; restore the original value
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rts
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